* ========== Copyright Header Begin ==========================================
* OpenSPARC T2 Processor File: SS_ExternalMemory.h
* Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
* The above named program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public
* License version 2 as published by the Free Software Foundation.
* The above named program is distributed in the hope that it will be
* useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
* You should have received a copy of the GNU General Public
* License along with this work; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
* ========== Copyright Header End ============================================
#ifndef __SS_ExternalMemory_h__
#define __SS_ExternalMemory_h__
// SS_ExternalMemory is a class the leaves the implementation of memory to
// some external object. The api between the external object and this class
// is a simple load store functon pair. The api is used elsewhere so
// that means that this can NOT be changed.
class SS_ExternalMemory
: public BL_Memory
// The load callback is called for each load and the call returns the memory values.
// The store callback is called for each store telling what value s being stored.
// This essentially forms an alternate memory system for the CPU, usually RTL-directed.
NORMAL
= 0, // Normal load/store access ATOMIC
= 1, // Atomic operation TABLEWALK
= 2, // Operation from the cpu hardware table walker CODEFETCH
= 4, // Code fetch from cpu DEVICE
= 8 // Memory access requests initiated by device (IMU) // The pa is always 8-byte aligned.
// data bits 00-07 is the byte at (address + 7), and is byte_mask bit 0
// data bits 56-63 is the byte at (address + 0), and is byte_mask bit 7
typedef void (*LdCallBack
)( uint_t strand_id
, SS_Paddr pa
, MemFlag flag
, uint_t byte_mask
, uint64_t *data
);
typedef void (*StCallBack
)( uint_t strand_id
, SS_Paddr pa
, MemFlag flag
, uint_t byte_mask
, uint64_t data
);
// These methods are used to set the load and store callbacks
void set_ld_callback( LdCallBack _ld
) { ld_callback
= _ld
; }
void set_st_callback( StCallBack _st
) { st_callback
= _st
; }
// cas and casx are the only atomics that do load and maybe a store.
// This seems inbalanced and hence we add the option to change this.
// Default is to always do a store. However, in case the cas fails the
// store mask is 0, effectively no store. At startup you can switch off
// the dummy store behaviour by calling no_dummy_st_for_cas().
void no_dummy_st_for_cas() { dummy_st_for_cas
= true; }
// Supported User Interface Operations
void poke8( uint64_t addr
, uint8_t data
) { st8(addr
,data
); }
void poke16( uint64_t addr
, uint16_t data
) { st16(addr
,data
); }
void poke32( uint64_t addr
, uint32_t data
) { st32(addr
,data
); }
void poke64( uint64_t addr
, uint64_t data
) { st64(addr
,data
); }
uint8_t peek8u( uint64_t addr
) { return ld8u(addr
); }
int8_t peek8s( uint64_t addr
) { return ld8s(addr
); }
uint16_t peek16u( uint64_t addr
) { return ld16u(addr
); }
int16_t peek16s( uint64_t addr
) { return ld16s(addr
); }
uint32_t peek32u( uint64_t addr
) { return ld32u(addr
); }
int32_t peek32s( uint64_t addr
) { return ld32s(addr
); }
uint64_t peek64( uint64_t addr
) { return ld64(addr
); }
// Supported Fetch Operation (instruction fetch)
uint32_t fetch32 ( uint64_t addr
);
void fetch256( uint64_t addr
, uint64_t data
[4] );
void fetch512( uint64_t addr
, uint64_t data
[8] );
// Supported Load Operations. ld8[su]() to ld64() are quaranteed to be atomic. ld128() and
// above are atomic at the 64 bit granularity.
uint8_t ld8u ( uint64_t addr
);
int8_t ld8s ( uint64_t addr
);
uint16_t ld16u( uint64_t addr
);
int16_t ld16s( uint64_t addr
);
uint32_t ld32u( uint64_t addr
);
int32_t ld32s( uint64_t addr
);
uint64_t ld64 ( uint64_t addr
);
void ld128( uint64_t addr
, uint64_t data
[2] );
void ld256( uint64_t addr
, uint64_t data
[4] );
void ld512( uint64_t addr
, uint64_t data
[8] );
// Supported Store Operations. st8(), st16(), st32() and st64() are gueranteed to be atomic.
// st128() and st512() are atomic per 64bit quantity.
void st8 ( uint64_t addr
, uint8_t data
);
void st16 ( uint64_t addr
, uint16_t data
);
void st32 ( uint64_t addr
, uint32_t data
);
void st64 ( uint64_t addr
, uint64_t data
);
void st128( uint64_t addr
, uint64_t data
[2] );
void st512( uint64_t addr
, uint64_t data
[8] );
// st64partial() performs 8 byte partial store. The bytes to store are specified by mask. A 1 in bit N of
// mask denotes that byte (data >> (8*N)) & 0xff should be written to memory
void st64partial( uint64_t addr
, uint64_t data
, uint64_t mask
);
// ld128atomic() (aka load twin double, load quad atomic) atomically loads two
// 64bit values from memory at addr into rd. rd[0] is the value at addr, rd[1]
// is the value at addr + 8. Note ld128 does() not guarantee atomicity.
void ld128atomic( uint64_t addr
, uint64_t data
[2] );
// ldstub() return a byte from memory at addr, and set the byte at addr
// to 0xff. The ldstub() operation is atomic.
uint8_t ldstub( uint64_t addr
);
// swap() stores the 32bit value rd with the 32bit value at addr.
// The old 32bit value at addr is returned. The operation is atomic.
uint32_t swap( uint64_t addr
, uint32_t rd
);
// casx() compares the 64bit value rs2 with the 64bit value at addr.
// If the two values are equal, the value rd is stored in the
// 64bit value at addr. In both cases the old 64bit value at addr is
// returned, that is the value at addr before the storei happened.
// The casx() operation is atomic.
uint64_t casx( uint64_t addr
, uint64_t rd
, uint64_t rs2
);
// cas() is as casx, but for 32bit.
uint32_t cas( uint64_t addr
, uint32_t rd
, uint32_t rs2
);
// prefetch() prefetches data from memory into the cache hierarchy.
void prefetch( uint64_t addr
, uint_t size
);
// flush() writes dirty data in the cache back to memory.
void flush( uint64_t addr
, uint_t size
);
static SS_ExternalMemory memory
;
int block_read( uint64_t addr
, uint8_t *tgt
, int _size
)
int block_write( uint64_t addr
, const uint8_t *src
, int _size
)
void set_strand_id( uint_t strand_id
) { sid
= strand_id
; }
bool dummy_st_for_cas
; // When true cas and casx always do ld followed by st
uint_t sid
; // Record the strand id of each operation
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