sam-t2/sam/cpus/vonk/ss/lib/cpu/src/SS_LsuTrap.s

/*
* ========== Copyright Header Begin ==========================================
*
* OpenSPARC T2 Processor File: SS_LsuTrap.s
* Copyright (c) 2006 Sun Microsystems, Inc.  All Rights Reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
*
* The above named program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public
* License version 2 as published by the Free Software Foundation.
*
* The above named program is distributed in the hope that it will be
* useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public
* License along with this work; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
*
* ========== Copyright Header End ============================================
*/
#if !defined(ARCH_X64)

.register       %g2,#scratch
.register       %g3,#scratch

.section        ".text"

.global ss_data_trap_mem_address_not_aligned
.type ss_data_trap_mem_address_not_aligned, #function

ss_data_trap_mem_address_not_aligned:

        ldptr   [S_PTR + DATA_TRAP],%g1
        jmpl    %g1,%g0
        mov     T_MEM_ADDRESS_NOT_ALIGNED,%o5

.global ss_data_trap_lddf_mem_address_not_aligned
.type ss_data_trap_lddf_mem_address_not_aligned, #function

ss_data_trap_lddf_mem_address_not_aligned:

        and     %o4,7,%g2                               ! lddf has a special case when the lower three
        ldptr   [S_PTR + DATA_TRAP],%g1         ! bits of the address is 3'b100, it's a remnant
        cmp     %g2,4                                   ! of the old v8 mode ...
        mov     T_MEM_ADDRESS_NOT_ALIGNED,%o5
        jmpl    %g1,%g0
        move    %xcc,T_LDDF_MEM_ADDRESS_NOT_ALIGNED,%o5

.global ss_data_trap_stdf_mem_address_not_aligned
.type ss_data_trap_stdf_mem_address_not_aligned, #function

ss_data_trap_stdf_mem_address_not_aligned:

        and     %o4,7,%g2                               ! stdf has a special case when the lower three
        ldptr   [S_PTR + DATA_TRAP],%g1         ! bits of the address is 3'b100, it's a remnant
        cmp     %g2,4                                   ! of the old v8 mode ...
        mov     T_MEM_ADDRESS_NOT_ALIGNED,%o5
        jmpl    %g1,%g0
        move    %xcc,T_STDF_MEM_ADDRESS_NOT_ALIGNED,%o5

.global ss_data_trap_mem_address_range
.type ss_data_trap_mem_address_range, #function

ss_data_trap_mem_address_range:

        ldptr   [S_PTR + DATA_TRAP],%g1
        jmpl    %g1,%g0
        mov     T_MEM_ADDRESS_RANGE,%o5

.global ss_data_trap_va_watchpoint
.type ss_data_trap_va_watchpoint, #function

ss_data_trap_va_watchpoint:

        ldptr   [S_PTR + DATA_TRAP],%g1
        jmpl    %g1,%g0
        mov     T_VA_WATCHPOINT,%o5

.global ss_data_trap_dae_invalid_asi
.type ss_data_trap_dae_invalid_asi, #function

ss_data_trap_dae_invalid_asi:

        ldptr   [S_PTR + DATA_TRAP],%g1
        jmpl    %g1,%g0
        mov     T_DAE_INVALID_ASI,%o5

.global ss_data_trap_privileged_action
.type ss_data_trap_privileged_action, #function

ss_data_trap_privileged_action:

        ldptr   [S_PTR + DATA_TRAP],%g1
        jmpl    %g1,%g0
        mov     T_PRIVILEGED_ACTION,%o5

#endif