sam-t2/sam/cpus/vonk/ss/lib/cpu/src/SS_Trap.h

/*
* ========== Copyright Header Begin ==========================================
*
* OpenSPARC T2 Processor File: SS_Trap.h
* Copyright (c) 2006 Sun Microsystems, Inc.  All Rights Reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
*
* The above named program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public
* License version 2 as published by the Free Software Foundation.
*
* The above named program is distributed in the hope that it will be
* useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public
* License along with this work; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
*
* ========== Copyright Header End ============================================
*/
#ifndef __SS_Trap_h__
#define __SS_Trap_h__

#include "SS_Types.h"

class SS_TrapInfo
{
  public:
    uint_t trap_type;   // TT value of trap
    char*  name;        // Name of the trap
    uint_t priority;    // Priority * 10
    bool   privileged;  // True if trap to privileged, false if trap to hyperprivileged
    bool   disrupting;  // True if the trap is disrupting, false if precise
};


class SS_Trap
{
  public:
    SS_Trap();

    enum Type
    {
      NO_TRAP                           = 0,    // internal value for Vonk
      RESERVED                          = 0x000,
      POWER_ON_RESET                    = 0x001,
      WATCHDOG_RESET                    = 0x002,
      EXTERNALLY_INITIATED_RESET        = 0x003,
      SOFTWARE_INITIATED_RESET          = 0x004,
      RED_STATE_EXCEPTION               = 0x005,
      STORE_ERROR                       = 0x007,
      IAE_PRIVILEGE_VIOLATION           = 0x008,
      INSTRUCTION_ACCESS_MMU_MISS       = 0x009,
      INSTRUCTION_ACCESS_ERROR          = 0x00a,
      IAE_UNAUTH_ACCESS                 = 0x00b,
      IAE_NFO_PAGE                      = 0x00c,
      INSTRUCTION_ADDRESS_RANGE         = 0x00d,
      INSTRUCTION_REAL_RANGE            = 0x00e,
      ILLEGAL_INSTRUCTION               = 0x010,
      PRIVILEGED_OPCODE                 = 0x011,
      UNIMPLEMENTED_LDD                 = 0x012,
      UNIMPLEMENTED_STD                 = 0x013,
      DAE_INVALID_ASI                   = 0x014,
      DAE_PRIVILEGE_VIOLATION           = 0x015,
      DAE_NC_PAGE                       = 0x016,
      DAE_NFO_PAGE                      = 0x017,
      FP_DISABLED                       = 0x020,
      FP_EXCEPTION_IEEE_754             = 0x021,
      FP_EXCEPTION_OTHER                = 0x022,
      TAG_OVERFLOW                      = 0x023,
      CLEAN_WINDOW                      = 0x024,
      DIVISION_BY_ZERO                  = 0x028,
      INTERNAL_PROCESSOR_ERROR          = 0x029,
      INSTRUCTION_INVALID_TSB_ENTRY     = 0x02a,
      DATA_INVALID_TSB_ENTRY            = 0x02b,
      PERFORMANCE_EVENT                 = 0x02c,
      MEM_REAL_RANGE                    = 0x02d,
      MEM_ADDRESS_RANGE                 = 0x02e,
      DAE_SO_PAGE                       = 0x030,
      DATA_ACCESS_MMU_MISS              = 0x031,
      DATA_ACCESS_ERROR                 = 0x032,
      DATA_ACCESS_PROTECTION            = 0x033,
      MEM_ADDRESS_NOT_ALIGNED           = 0x034,
      LDDF_MEM_ADDRESS_NOT_ALIGNED      = 0x035,
      STDF_MEM_ADDRESS_NOT_ALIGNED      = 0x036,
      PRIVILEGED_ACTION                 = 0x037,
      LDQF_MEM_ADDRESS_NOT_ALIGNED      = 0x038,
      STQF_MEM_ADDRESS_NOT_ALIGNED      = 0x039,
      UNSUPPORTED_PAGE_SIZE             = 0x03b,
      CTRL_WORD_QUEUE_INT               = 0x03c,
      MODULAR_ARITH_INT                 = 0x03d,
      INST_REAL_TRANSLATION_MISS        = 0x03e,
      DATA_REAL_TRANSLATION_MISS        = 0x03f,
      SW_RECOVERABLE_ERROR              = 0x040,
      INTERRUPT_LEVEL_1                 = 0x041,
      INTERRUPT_LEVEL_2                 = 0x042,
      INTERRUPT_LEVEL_3                 = 0x043,
      INTERRUPT_LEVEL_4                 = 0x044,
      INTERRUPT_LEVEL_5                 = 0x045,
      INTERRUPT_LEVEL_6                 = 0x046,
      INTERRUPT_LEVEL_7                 = 0x047,
      INTERRUPT_LEVEL_8                 = 0x048,
      INTERRUPT_LEVEL_9                 = 0x049,
      INTERRUPT_LEVEL_10                = 0x04a,
      INTERRUPT_LEVEL_11                = 0x04b,
      INTERRUPT_LEVEL_12                = 0x04c,
      INTERRUPT_LEVEL_13                = 0x04d,
      INTERRUPT_LEVEL_14                = 0x04e,
      INTERRUPT_LEVEL_15                = 0x04f,
      PIC_OVERFLOW                      = 0x04F,
      HSTICK_MATCH                      = 0x05e,
      TRAP_LEVEL_ZERO                   = 0x05f,
      INTERRUPT_VECTOR                  = 0x060,
      PA_WATCHPOINT                     = 0x061,
      VA_WATCHPOINT                     = 0x062,
      HW_CORRECTED_ERROR                = 0x063,
      FAST_INSTRUCTION_ACCESS_MMU_MISS  = 0x064,
      FAST_DATA_ACCESS_MMU_MISS         = 0x068,
      FAST_DATA_ACCESS_PROTECTION       = 0x06c,
      INSTRUCTION_ACCESS_MMU_ERROR      = 0x071,
      DATA_ACCESS_MMU_ERROR             = 0x072,
      CONTROL_TRANSFER_INSTRUCTION      = 0x074,
      INSTRUCTION_VA_WATCHPOINT         = 0x075,
      INSTRUCTION_BREAKPOINT            = 0x076,
      NO_RETIRE                         = 0x077,
      SIU_INBOUND_EXCEPTION             = 0x078,
      DATA_ACCESS_SIU_ERROR             = 0x079,
      HYPERPRIV_QUEUE_0                 = 0x07a,
      HYPERPRIV_QUEUE_1                 = 0x07b,
      CPU_MONDO_TRAP                    = 0x07c,
      DEV_MONDO_TRAP                    = 0x07d,
      RESUMABLE_ERROR                   = 0x07e,
      NONRESUMABLE_ERROR                = 0x07f,
      SPILL_N_NORMAL                    = 0x080,
      SPILL_N_OTHER                     = 0x0a0,
      FILL_N_NORMAL                     = 0x0c0,
      FILL_N_OTHER                      = 0x0e0,
      TCC_INSTRUCTION                   = 0x100,
      TCC_INSTRUCTION_HPRV              = 0x180,
      RESET_GEN_WMR                     = 0x201,
      RESET_GEN_DBR                     = 0x202
    };

    enum Limit
    {
      MAX_TT = 0x203
    };

    static bool is_fill ( Type tt )             { return ( FILL_N_NORMAL <= tt) && (tt < TCC_INSTRUCTION); }
    static bool is_spill( Type tt )             { return (SPILL_N_NORMAL <= tt) && (tt < FILL_N_NORMAL   ); }
    static bool is_trap_to_priv( Type tt )      { return SS_Trap::table[tt].privileged; }

    SS_TrapInfo& operator[]( Type tt )          { return table[tt]; }

    static Type fill_normal( uint_t n )         { return Type(uint_t(FILL_N_NORMAL)  + n * 4); }
    static Type fill_other( uint_t n )          { return Type(uint_t(FILL_N_OTHER)   + n * 4); }
    static Type spill_normal( uint_t n )        { return Type(uint_t(SPILL_N_NORMAL) + n * 4); }
    static Type spill_other( uint_t n )         { return Type(uint_t(SPILL_N_OTHER)  + n * 4); }

    static SS_TrapInfo table[MAX_TT];
};

#endif