sam-t2/sam/cpus/vonk/ss/lib/ras/src/SS_MemErrDetector.h

/*
* ========== Copyright Header Begin ==========================================
*
* OpenSPARC T2 Processor File: SS_MemErrDetector.h
* Copyright (c) 2006 Sun Microsystems, Inc.  All Rights Reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
*
* The above named program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public
* License version 2 as published by the Free Software Foundation.
*
* The above named program is distributed in the hope that it will be
* useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public
* License along with this work; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
*
* ========== Copyright Header End ============================================
*/
#ifndef _SS_MEMERRDETECTOR_H
#define _SS_MEMERRDETECTOR_H
/************************************************************************
**
**  Copyright (C) 2006, Sun Microsystems, Inc.
**
**  Sun considers its source code as an unpublished, proprietary
**  trade secret and it is available only under strict license provisions.
**  This copyright notice is placed here only to protect Sun in the event
**  the source is deemed a published work. Disassembly, decompilation,
**  or other means of reducing the object code to human readable form
**  is prohibited by the license agreement under which this code is
**  provided to the user or company in possession of this copy.
**
*************************************************************************/
#include <iostream>
#include <string>
#include <map>
#include "SS_Trap.h"
#include "BL_Memory.h"
#include "MemoryTransaction.h"          // move to N2_MemErrDetector?


/**
 * The MemErrDetector class is a abstract base class used to
 * model and detect errors in the memory hierarchy for RAS.
 */

class SS_MemErrDetector {

  public:

    SS_MemErrDetector::SS_MemErrDetector() :
      memory(0),
      step_hook(0),
      tick_err_detector(0)
    {}

    // enum to define the memory hierarchy level
    enum MemoryLevel
    {
      L1_CACHE_AND_STB,                 // primary cache and store buffer
      L2_CACHE,                         // secondary cache
      MEMORY                            // memory (if needed)
    };

    // enum to define the cache type, instruction or data
    enum CacheType
    {
      INSTR_CACHE,                      // instruction cache
      DATA_CACHE                        // data cache
    };

    // detect_fetch_err() checks for memory hierarchy RAS errors due
    // to instruction fetchs.  If it throw a precise trap, it returns
    // the trap number, else 0.
    virtual SS_Trap::Type detect_fetch_err( MemoryLevel level,
                                            SS_Vaddr pc, SS_Vaddr npc,
                                            SS_Strand* s,
                                            SS_Paddr pa) = 0;

    // detect_load_err() checks for memory hierarchy RAS errors due to
    // data loads and the load half of atomics.  If it throw a precise
    // trap, it returns the trap number, else 0.
    virtual SS_Trap::Type detect_load_err( MemoryLevel level,
                                           SS_Vaddr pc, SS_Vaddr npc,
                                           SS_Strand* s, SS_Instr* line,
                                           SS_Paddr pa) = 0;

    // inject_store_err() injects errors into memory hierarchy RAS
    // errors caused by data stores and the store half of atomics.  If
    // it throw a precise trap, it returns the trap number, else 0.
    virtual SS_Trap::Type inject_store_err( MemoryLevel level,
                                            SS_Vaddr pc, SS_Vaddr npc,
                                            SS_Strand* s, SS_Instr* line,
                                            SS_Paddr pa,
                                            uint64_t data) = 0;

    // ras_flush() is called from the flush instruction execution code
    // to invalidate data in RAS related cache models if a flush
    // instrucion is executed
    virtual SS_Trap::Type ras_flush( SS_Vaddr pc, SS_Vaddr npc,
                                     SS_Strand* s,
                                     SS_Instr* line,
                                     SS_Paddr pa,
                                     uint64_t size,
                                     CacheType type) = 0;

    // ras_flush() is called by SS_Model/SS_Cpu to flush RAS related
    // cache models if a flush instrucion is executed
    virtual void ras_flush( SS_Strand*s, SS_Strand* requesting_strand, SS_Paddr pa, uint64_t size, CacheType type) = 0;

    // Routines for controlling debugging output
    // Typically used to toggle output from the UI via SWIG
    virtual void start_debug_output() {}
    virtual void stop_debug_output() {}

    SS_Trap::Type (*step_hook)(SS_Strand* s);
    bool (*tick_err_detector)(SS_Strand* s);

    // Returns a formatted string containing all I$ information about a paddr.
    virtual char* icache_info(SS_Paddr pa, SS_Strand* strand) { return (char*)""; }

    // Returns a formatted string containing all I$ information about a set.
    virtual char* icache_set(uint_t set, SS_Strand* strand)
    {
      return (char*)"Not Implemented";
    }

    // Returns a formatted string containing all D$ information about a set.
    virtual char* dcache_set(uint_t set, SS_Strand* strand)
    {
      return (char*)"Not Implemented";
    }

    // Returns a formatted string containing all L2$ information about a set.
    virtual char* l2cache_set(uint_t set, SS_Strand* strand)
    {
      return (char*)"Not Implemented";
    }

    // Returns a formatted string containing all L2$ information about a set
    // in a bank
    virtual char* l2cache_set(uint_t bank, uint_t set, SS_Strand* strand)
    {
      return (char*)"Not Implemented";
    }

    BL_Memory*                  memory;         // the memory object
};

#endif /* _SS_MEMERRDETECTOR_H */