Initial commit of OpenSPARC T2 architecture model.
[OpenSPARC-T2-SAM] / sam-t2 / sam / devices / schizo / include / safari_interface.h
/*
* ========== Copyright Header Begin ==========================================
*
* OpenSPARC T2 Processor File: safari_interface.h
* Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
*
* The above named program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public
* License version 2 as published by the Free Software Foundation.
*
* The above named program is distributed in the hope that it will be
* useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public
* License along with this work; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
*
* ========== Copyright Header End ============================================
*/
/*
* Copyright (C) 1991, Sun Microsystems, Inc.
*/
#ifndef _SAFARI_INTERFACE_H_
#define _SAFARI_INTERFACE_H_
#pragma ident "@(#)1.1 01/08/23 safari_interface.h"
#include "types.h"
/* the page numbers (e.g., pp 122) are corresponding to Excalibur
* Architecture Manual, revision 1.0, January 10, 2000 */
/* pp 122 */
#define SAFARI_DEVICE_ID_REG 0x000000
#define UPA0_ADDR_MATCH_REG 0x400000
#define UPA0_ADDR_MASK_REG 0x400008
#define UPA1_ADDRESS_MATCH_REG 0x400010
#define UPA1_ADDR_MASK_REG 0x400018
#define NEWLINK_ADDR_MATCH_REG 0x400020
#define NEWLINK_ADDR_MASK_REG 0x400028
#define NEWLINKALT_ADDR_MATCH_REG 0x400030
#define NEWLINKALT_ADDR_MASK_REG 0x400038
#define PCI_A_MEM_ADDR_MATCH_REG 0x400040
#define PCI_A_MEM_ADDR_MASK_REG 0x400048
#define PCI_A_CONFIG_ADDR_MATCH_REG 0x400050
#define PCI_A_CONFIG_ADDR_MASK_REG 0x400058
#define PCI_B_MEM_ADDR_MATCH_REG 0x400060
#define PCI_B_MEM_ADDR_MASK_REG 0x400068
#define PCI_B_CONFIG_ADDR_MATCH_REG 0x400070
#define PCI_B_CONFIG_ADDR_MASK_REG 0x400078
#define SCHIZO_CSR_REG 0x410000
#define ECC_CONTROL_REG 0x410020
#define UE_AFSR 0x410030
#define UE_AFAR 0x410038
#define CE_AFSR 0x410040
#define CE_AFAR 0x410048
#define FFB0_CONFIG_REG 0x480000 // UPA0, pp 125
#define FFB1_CONFIG_REG 0x480008 // UPA1
/*
* This file contains definitions of the safari interace block registers
*/
/* to play it safe, don't let bit field cross 32bit boundary,
* uint64_t bit-field can only be used in 64bit mode */
typedef struct s_safari_dev_id { /* pp 142 */
Word cookie:8; /* [63:56] -r 0xfc */
Word rsvd1:24; /* [55:27] -r 0x0 */
Word rsvd2:5;
Word node_id:5; /* [26:22] -r 0x0 */
Word agent_id:5; /* [21:17] -r 0x8 */
Word m_s:1; /* [16] -r 0x1 */
Word mid:6; /* [15:10] -r */
Word mt:6; /* [9:4] -r */
Word mr:4; /* [3:0] -r 0x0 */
} s_safari_dev_id;
typedef union u_safari_dev_id {
s_safari_dev_id s;
LWord l;
} u_safari_dev_id;
/* UPA64S, PCI A, and PCI B use the same address mask register format and
* address match register format. pp 144 */
typedef struct s_Addr_Match_Reg {
unsigned v:1; /* 63, -rw, 0 */
unsigned rsvd1:20; /* 62:43, -r, 0x00000 */
unsigned match1:11; /* 42:24, -rw */
unsigned match2:8;
unsigned rsvd2:24; /* 23:0, -r, 0x000000 */
} s_Addr_Match_Reg;
union u_Addr_Match_Reg {
s_Addr_Match_Reg s;
uint64_t l;
} u_Addr_Match_Reg;
typedef struct s_Addr_Mask_Reg {
unsigned rsvd1:21; /* 63:43, -r, 0x000000 */
unsigned mask1:7; /* 42:36, -r, 0x7f */
unsigned mask2:4; /* 35:24, -rw */
unsigned mask3:8;
unsigned rsvd2:24; /* 23:0, -r, 0x000000 */
} s_Addr_Mask_Reg;
union u_Addr_Mask_Reg {
s_Addr_Mask_Reg s;
uint64_t l;
} u_Addr_Mask_Reg;
/* NewLink is not used in Excalibur */
typedef struct s_NewLinkBase_addr_match {
Word v:1; /*[63] -rw */
Word rsvd:20; /*[62:43]-r0 */
Word MatchAddr1:10; /*[42:33]-rw */
Word MatchAddr2:1; /*[32]-r0 */
Word MatchAddr3:32; /*[31:0]-r0 */
} s_NewLinkBase_addr_match;
union u_NewLinkBase_addr_match {
s_NewLinkBase_addr_match s;
LWord l;
} u_NewLinkBase_addr_match;
typedef struct s_NewLinkAltBase_addr_match {
Word v:1; /*[63] -rw */
Word rsvd:20; /*[62:43]-r0 */
Word MatchAddr1:11; /*[42:32]-rw */
Word MatchAddr2:8; /*[31-24]-rw */
Word MatchAddr3:24; /*[23:0]-r0 */
} s_NewLinkAltBase_addr_match;
union u_NewLinkAltBase_addr_match {
s_NewLinkAltBase_addr_match s;
LWord l;
} u_NewLinkAltBase_addr_match;
typedef struct s_PCI_A_ConfigBase_addr_match {
Word v:1; /*[63] -rw */
Word rsvd:20; /*[62:43]-r0 */
Word MatchAddr1:11; /*[42:32]-rw */
Word MatchAddr2:8; /*[31-24]-rw */
Word MatchAddr3:24; /*[23:0]-r0 */
} s_PCI_A_ConfigBase_addr_match;
union u_PCI_A_ConfigBase_addr_match {
s_PCI_A_ConfigBase_addr_match s;
LWord l;
} u_PCI_A_ConfigBase_addr_match;
typedef struct s_PCI_B_ConfigBase_addr_match {
Word v:1; /*[63] -rw */
Word rsvd:20; /*[62:43]-r0 */
Word MatchAddr1:11; /*[42:32]-rw */
Word MatchAddr2:8; /*[31-24]-rw */
Word MatchAddr3:24; /*[23:0]-r0 */
} s_PCI_B_ConfigBase_addr_match;
union u_PCI_B_ConfigBase_addr_match {
s_PCI_B_ConfigBase_addr_match s;
LWord l;
} u_PCI_B_ConfigBase_addr_match;
typedef struct s_NewLinkBase_addr_mask {
Word rsvd:21; /* [63:43] -r0 */
Word AddrMask1:7; /* [42:36] -r1 */
Word AddrMask2:3; /* [35:33] -rw */
Word AddrMask3_1:1; /* [32:1] -r0 */
Word AddrMask3_2:31;
Word AddrMask4:1; /* [0] -r0 */
} s_NewLinkBase_addr_mask;
union u_NewLinkBase_addr_mask {
s_NewLinkBase_addr_mask s;
LWord l;
} u_NewLinkBase_addr_mask;
typedef struct s_NewLinkAltBase_addr_mask {
Word rsvd:21; /* [63:43] -r0 */
Word AddrMask1_1:11; /* [42:24]-r */
Word AddrMask1_2:8;
Word AddrMask3:24; /* [23:0] -r */
} s_NewLinkAltBase_addr_mask;
union u_NewLinkAltBase_addr_mask {
s_NewLinkAltBase_addr_mask s;
LWord l;
} u_NewLinkAltBase_addr_mask;
typedef struct s_PCI_A_ConfigBase_addr_mask {
Word rsvd:21; /*[63:43] -r0 */
Word AddrMask1:11; /*[42:32]-r */
Word AddrMask2:8; /*[31:24]-r */
Word AddrMask3:24; /*[23:0] -r */
} s_PCI_A_ConfigBase_addr_mask;
union u_PCI_A_ConfigBase_addr_mask {
s_PCI_A_ConfigBase_addr_mask s;
LWord l;
} u_PCI_A_ConfigBase_addr_mask;
typedef struct s_PCI_B_ConfigBase_addr_mask {
Word rsvd:21; /*[63:43] -r0 */
Word AddrMask1:11; /*[42:32]-r */
Word AddrMask2:8; /*[31:24]-r */
Word AddrMask3:24; /*[23:0] -r */
} s_PCI_B_ConfigBase_addr_mask;
union u_PCI_B_ConfigBase_addr_mask {
s_PCI_B_ConfigBase_addr_mask s;
LWord l;
} u_PCI_B_ConfigBase_addr_mask;
typedef struct s_ffb_config_register {
Word rsv1:32; /*[63:32]-r0 */
Word rsvd2:1; /*[31]-r1 */
Word rsvd3:3; /*[30:28]-r0 */
Word sprqs:4; /*[27:24 -rw */
Word spdqs:6; /*[23:18]-rw */
Word rsvd4:2; /*[17:16]-r0 */
Word squen:1; /*[15] */
Word oneread:1; /*[15] */
Word rsvd5:14; /*[13:0]-r0 */
} s_ffb_config_register;
union u_ffb_config_register {
s_ffb_config_register s;
LWord l;
} u_ffb_config_register;
#endif