Initial commit of OpenSPARC T2 architecture model.
[OpenSPARC-T2-SAM] / sam-t2 / sam / devices / serial / include / serial_props.h
/*
* ========== Copyright Header Begin ==========================================
*
* OpenSPARC T2 Processor File: serial_props.h
* Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
*
* The above named program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public
* License version 2 as published by the Free Software Foundation.
*
* The above named program is distributed in the hope that it will be
* useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public
* License along with this work; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
*
* ========== Copyright Header End ============================================
*/
#include <sys/pci.h>
#include "property.h"
static int pcisimc_classcode = 0x0;
static pci_regspec_t pcisimc_reg[2];
static pci_regspec_t pcisimc_assigned_addr[1];
static int three = 3;
static int two = 2;
static int pcisimc_intr;
static char pcisimc_schizoBus[5] = "pci";
static const char *pcisimc_schizoPbm;
static char pcisimc_membase[64];
static char pcisimc_memsize[64];
static char pcisimc_device[20];
static char pcisimc_isconsole[2];
static property pcisimc_props[] =
{
{ "sam-parent", 0,0}, //schizo fakeprom related props
{ "sam-dev", 0,0}, // ""
{ "sam-membase", 0,0}, // ""
{ "sam-memsize", 0,0}, // ""
{ "sam-console", 0,0}, // to let the fakeprom know if its the system console. value is "0" or "1"
{ "name", 8, "pcisimc" }, //standard 1275 properties
{ "reg", RARRAY(pcisimc_reg) },
{ "assigned-addresses", RARRAY(pcisimc_assigned_addr) },
{ "#address-cells", ARRAY(three) },
{ "#size-cells", ARRAY(two) },
{ "device_type", 7, "serial" },
{ "interrupts", ARRAY(pcisimc_intr) },
{ "port-b-ignore-cd", 0, 0 },
{ "port-a-ignore-cd", 0, 0 },
{ "class-code", ARRAY(pcisimc_classcode)},
{ 0,0,0 },
};