Initial commit of OpenSPARC T2 architecture model.

[OpenSPARC-T2-SAM] / sam-t2 / sam / include / BL_Memory.h

/*
* ========== Copyright Header Begin ==========================================
* 
* OpenSPARC T2 Processor File: BL_Memory.h
* Copyright (c) 2006 Sun Microsystems, Inc.  All Rights Reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
* 
* The above named program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public
* License version 2 as published by the Free Software Foundation.
* 
* The above named program is distributed in the hope that it will be 
* useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
* General Public License for more details.
* 
* You should have received a copy of the GNU General Public
* License along with this work; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
* 
* ========== Copyright Header End ============================================
*/
#ifndef __BL_Memory_h__
#define __BL_Memory_h__

/* Common Memory Interface - All Memory implementations *MUST* 
  derive from this abstract base class
  -- This Memory abstraction is a step in the direction of one 
     single build for all memory flavours
  -- API Supports simple Memory implementations like Sparse memory
     model as well as exotic ones like Chip-kill memory model
  -- Performance lost due to virtualization of methods can be 
     recovered by suitable downcasts and derived class 
     qualifications    
*/


class BL_Memory
{
 public:

   // Supported Fetch Operation (instruction fetch) 
  
   virtual uint32_t fetch32( uint64_t addr )=0;
   virtual void     fetch256( uint64_t addr, uint64_t data[4] )=0;
   virtual void     fetch512( uint64_t addr, uint64_t data[8] )=0;

   // Supported Store Operations. st8(), st16(), st32() and st64() are gueranteed to be atomic.
   // st128() and st512() are atomic per 64bit quantity.
  
   virtual void st8( uint64_t addr, uint8_t data )=0;
   virtual void st16( uint64_t addr, uint16_t data )=0;
   virtual void st32( uint64_t addr, uint32_t data )=0;
   virtual void st64( uint64_t addr, uint64_t data )=0;
   virtual void st128( uint64_t addr, uint64_t data[2] )=0;
   virtual void st512( uint64_t addr, uint64_t data[8] )=0;

   // Supported Load Operations. ld8[su]() to ld64() are quaranteed to be atomic. ld128() and
   // above are atomic at the 64 bit granularity.

   virtual uint8_t ld8u ( uint64_t addr )=0;
   virtual int8_t ld8s( uint64_t addr )=0;
   virtual uint16_t ld16u( uint64_t addr )=0;
   virtual int16_t ld16s( uint64_t addr )=0;
   virtual uint32_t ld32u( uint64_t addr )=0;
   virtual int32_t ld32s( uint64_t addr )=0;
   virtual uint64_t ld64( uint64_t addr )=0;
   virtual void ld128( uint64_t addr, uint64_t data[2] )=0; 
   virtual void ld512( uint64_t addr, uint64_t data[8] )=0;
   virtual void ld256( uint64_t addr, uint64_t data[4] )=0;
   
   // st64partial() performs 8 byte partial store. The bytes to store are specified by mask. A 1 in bit N of 
   // mask denotes that byte (data >> (8*N)) & 0xff should be written to memory

   virtual void st64partial( uint64_t addr, uint64_t data, uint64_t mask )=0;  
   
   // ld128atomic() (aka load twin double, load quad atomic) atomically loads two
   // 64bit values from memory at addr into rd. rd[0] is the value at addr, rd[1]
   // is the value at addr + 8. Note ld128 does() not guarantee atomicity.
   
   virtual void ld128atomic( uint64_t addr, uint64_t data[2] )=0;

   // ldstub() return a byte from memory at addr, and set the byte at addr
   // to 0xff. The ldstub() operation is atomic.
  
   virtual uint8_t ldstub( uint64_t addr )=0;

   // swap() stores the 32bit value rd with the 32bit value at addr.
   // The old 32bit value at addr is returned.  The operation is atomic.
   
   virtual uint32_t swap( uint64_t addr, uint32_t rd )=0;

   // casx() compares the 64bit value rs2 with the 64bit value at addr.
   // If the two values are equal, the value rd is stored in the
   // 64bit value at addr. In both cases the old 64bit value at addr is
   // returned, that is the value at addr before the storei happened.
   // The casx() operation is atomic.
   
   virtual uint64_t casx( uint64_t addr, uint64_t rd, uint64_t rs2 )=0;

   // cas() is as casx, but for 32bit.

   virtual uint32_t cas( uint64_t addr, uint32_t rd, uint32_t rs2 )=0;

   // flush() writes dirty data in the cache back to memory.

   virtual void flush( uint64_t addr, uint_t size ){}  // process does not provide data.
  
};

#endif /* __BL_Memory_h__ */