Updated `README.md` with instructions for building/using the kernel module.
[xeon-phi-kernel-module] / include / mic_interrupts.h
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1/*
2 * Copyright 2010-2017 Intel Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License, version 2,
6 * as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
12 *
13 * Disclaimer: The codes contained in these modules may be specific to
14 * the Intel Software Development Platform codenamed Knights Ferry,
15 * and the Intel product codenamed Knights Corner, and are not backward
16 * compatible with other Intel products. Additionally, Intel will NOT
17 * support the codes or instruction set in future products.
18 *
19 * Intel offers no warranty of any kind regarding the code. This code is
20 * licensed on an "AS IS" basis and Intel is not obligated to provide
21 * any support, assistance, installation, training, or other services
22 * of any kind. Intel is also not obligated to provide any updates,
23 * enhancements or extensions. Intel specifically disclaims any warranty
24 * of merchantability, non-infringement, fitness for any particular
25 * purpose, and any other warranty.
26 *
27 * Further, Intel disclaims all liability of any kind, including but
28 * not limited to liability for infringement of any proprietary rights,
29 * relating to the use of the code, even if Intel is notified of the
30 * possibility of such liability. Except as expressly stated in an Intel
31 * license agreement provided with this code and agreed upon with Intel,
32 * no license, express or implied, by estoppel or otherwise, to any
33 * intellectual property rights is granted herein.
34 */
35
36#include "mic_common.h"
37
38/* vnet/mic_shutdown/hvc/virtio */
39#define VNET_SBOX_INT_IDX 0
40#define MIC_SHT_SBOX_INT_IDX 1
41#define HVC_SBOX_INT_IDX 2
42#define VIRTIO_SBOX_INT_IDX 3
43#define PM_SBOX_INT_IDX 4
44
45#define MIC_BSP_INTERRUPT_VECTOR 229 // Host->Card(bootstrap) Interrupt Vector#
46/*
47 * Current usage of MIC interrupts:
48 * APICICR1 - mic shutdown interrupt
49 * APCICR0 - rest
50 *
51 * Planned Usage:
52 * SCIF - rdmasrs
53 * vnet/hvc/virtio - APICICR0
54 * mic shutdown interrupt - APICICR1
55 */
56static void __mic_send_intr(mic_ctx_t *mic_ctx, int i)
57{
58 uint32_t apicicr_low;
59 uint64_t apic_icr_offset = SBOX_APICICR0 + i * 8;
60
61 apicicr_low = SBOX_READ(mic_ctx->mmio.va, apic_icr_offset);
62 /* for KNC we need to make sure we "hit" the send_icr bit (13) */
63 if (mic_ctx->bi_family == FAMILY_KNC)
64 apicicr_low = (apicicr_low | (1 << 13));
65
66 /* MIC card only triggers when we write the lower part of the
67 * address (upper bits)
68 */
69 SBOX_WRITE(apicicr_low, mic_ctx->mmio.va, apic_icr_offset);
70}
71
72static inline void mic_send_vnet_intr(mic_ctx_t *mic_ctx)
73{
74 __mic_send_intr(mic_ctx, VNET_SBOX_INT_IDX);
75}
76
77static inline void mic_send_hvc_intr(mic_ctx_t *mic_ctx)
78{
79 __mic_send_intr(mic_ctx, HVC_SBOX_INT_IDX);
80}
81
82static inline void mic_send_scif_intr(mic_ctx_t *mic_ctx)
83{
84 __mic_send_intr(mic_ctx, 0);
85}
86
87static inline void mic_send_virtio_intr(mic_ctx_t *mic_ctx)
88{
89 __mic_send_intr(mic_ctx, VIRTIO_SBOX_INT_IDX);
90}
91
92static inline void mic_send_sht_intr(mic_ctx_t *mic_ctx)
93{
94 __mic_send_intr(mic_ctx, 1);
95}
96
97static inline void mic_send_pm_intr(mic_ctx_t *mic_ctx)
98{
99 __mic_send_intr(mic_ctx, PM_SBOX_INT_IDX);
100}
101
102static inline void mic_send_bootstrap_intr(mic_ctx_t *mic_ctx)
103{
104 uint32_t apicicr_low;
105 uint64_t apic_icr_offset = SBOX_APICICR7;
106 int vector = MIC_BSP_INTERRUPT_VECTOR;
107
108 if (mic_ctx->bi_family == FAMILY_ABR){
109 apicicr_low = vector;
110 } else {
111 /* for KNC we need to make sure we "hit" the send_icr bit (13) */
112 apicicr_low = (vector | (1 << 13));
113 }
114
115 SBOX_WRITE(mic_ctx->apic_id, mic_ctx->mmio.va, apic_icr_offset + 4);
116 // MIC card only triggers when we write the lower part of the address (upper bits)
117 SBOX_WRITE(apicicr_low, mic_ctx->mmio.va, apic_icr_offset);
118}