| 1 | /* |
| 2 | * Copyright 2010-2017 Intel Corporation. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License, version 2, |
| 6 | * as published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 11 | * General Public License for more details. |
| 12 | * |
| 13 | * Disclaimer: The codes contained in these modules may be specific to |
| 14 | * the Intel Software Development Platform codenamed Knights Ferry, |
| 15 | * and the Intel product codenamed Knights Corner, and are not backward |
| 16 | * compatible with other Intel products. Additionally, Intel will NOT |
| 17 | * support the codes or instruction set in future products. |
| 18 | * |
| 19 | * Intel offers no warranty of any kind regarding the code. This code is |
| 20 | * licensed on an "AS IS" basis and Intel is not obligated to provide |
| 21 | * any support, assistance, installation, training, or other services |
| 22 | * of any kind. Intel is also not obligated to provide any updates, |
| 23 | * enhancements or extensions. Intel specifically disclaims any warranty |
| 24 | * of merchantability, non-infringement, fitness for any particular |
| 25 | * purpose, and any other warranty. |
| 26 | * |
| 27 | * Further, Intel disclaims all liability of any kind, including but |
| 28 | * not limited to liability for infringement of any proprietary rights, |
| 29 | * relating to the use of the code, even if Intel is notified of the |
| 30 | * possibility of such liability. Except as expressly stated in an Intel |
| 31 | * license agreement provided with this code and agreed upon with Intel, |
| 32 | * no license, express or implied, by estoppel or otherwise, to any |
| 33 | * intellectual property rights is granted herein. |
| 34 | */ |
| 35 | |
| 36 | /* |
| 37 | * Definition of the PM interface to the RAS module. |
| 38 | * |
| 39 | * Throttle event interface is similar to the MC interface. |
| 40 | * If a connection is made to MR_TTL_PORT then event records |
| 41 | * will be sent to the host. Events are sent non-blocking, |
| 42 | * so if the SCIF buffer runs full, events are dropped until |
| 43 | * the block disappear (or the session is closed). |
| 44 | * |
| 45 | * Queries are technically implemented as an extension to the |
| 46 | * MT interface, and thus are accessible from the host. |
| 47 | * Except for the risk of conflicting commands written to the |
| 48 | * two power limit registers, there are no side effects from |
| 49 | * host side access via SCIF. |
| 50 | * |
| 51 | * Currently there are no plans to expose this in SysFs nodes. |
| 52 | * These routines are just wrappers for read/write access to |
| 53 | * SMC registers. No precious IP here. |
| 54 | */ |
| 55 | |
| 56 | #ifndef _MICPM_API_H_ |
| 57 | #define _MICPM_API_H_ 1 |
| 58 | |
| 59 | #ifdef __cplusplus |
| 60 | extern "C" { /* C++ guard */ |
| 61 | #endif |
| 62 | |
| 63 | |
| 64 | /* |
| 65 | ** |
| 66 | ** Configuration manifests |
| 67 | ** |
| 68 | */ |
| 69 | |
| 70 | #pragma pack(push, 4) /* Weird Windos requirement */ |
| 71 | |
| 72 | |
| 73 | /* |
| 74 | * Throttle events are reported on this port. Only one consumer can |
| 75 | * connect in order to be notified about PM throttling events. |
| 76 | */ |
| 77 | |
| 78 | #define MR_TTL_PORT SCIF_RAS_PORT_2 |
| 79 | |
| 80 | |
| 81 | /* |
| 82 | * Throttle events are provided in raw form, i.e. with as |
| 83 | * little processing on the card side as possible. |
| 84 | * For nicer throttle state display, use MT command MR_REQ_TTL. |
| 85 | * |
| 86 | * To compensate for the chance of lost events, the full |
| 87 | * throttle state is transfered in one byte on every message: |
| 88 | * |
| 89 | * Bit# Content |
| 90 | * 0 Power trottle state changed |
| 91 | * 1 New/Current power throttle state |
| 92 | * 2 Thermal throttle state changed |
| 93 | * 3 New/Current thermal throttle state |
| 94 | * 4 Power alert state changed |
| 95 | * 5 New/Current power alert state |
| 96 | * |
| 97 | * By definition, when power and thermal throttle are in effect |
| 98 | * the KnC is forced to run at reduced speed (600 MHz or so) and |
| 99 | * with lower operating voltages, i.e. software is not in control. |
| 100 | * During power alerts the KnC is consuming more power than PLim1 |
| 101 | * and the PM module can reduce speed and/or voltages to reduce |
| 102 | * power consumption. If power consumption goes beyond PLim0, the |
| 103 | * hardware (SMC really) will start real power throttles. |
| 104 | * In effect time spent in power throttle, will also be counted |
| 105 | * as being in the power alert state. See MT request MR_REQ_TTL. |
| 106 | */ |
| 107 | |
| 108 | #define PM_PWR_TTL_CHG (1 << 0) /* Power throttle change */ |
| 109 | #define PM_PWR_TTL (1 << 1) /* Power Trottle state */ |
| 110 | #define PM_TRM_TTL_CHG (1 << 2) /* Thermal throttle change */ |
| 111 | #define PM_TRM_TTL (1 << 3) /* Thermal Trottle state */ |
| 112 | #define PM_ALRT_TTL_CHG (1 << 4) /* Power alert change */ |
| 113 | #define PM_ALRT_TTL (1 << 5) /* Power alert state */ |
| 114 | |
| 115 | typedef struct ttl_info { |
| 116 | uint8_t upd; /* Throttle state update */ |
| 117 | uint8_t die; /* Die temperature (as per SBOX) */ |
| 118 | } TtlInfo; |
| 119 | |
| 120 | |
| 121 | |
| 122 | /* |
| 123 | * PM specific MT opcodes |
| 124 | * Leave one empty slot in callout table between |
| 125 | * this and the official MT API entries. |
| 126 | */ |
| 127 | |
| 128 | #define PM_REQ_PL0 (MR_REQ_MAX + 2) /* Get power limit 0 */ |
| 129 | #define PM_SET_PL0 (MR_REQ_MAX + 3) /* Set power limit 0 */ |
| 130 | #define PM_REQ_PL1 (MR_REQ_MAX + 4) /* Get power limit 1 */ |
| 131 | #define PM_SET_PL1 (MR_REQ_MAX + 5) /* Set power limit 1 */ |
| 132 | #define PM_REQ_PAVG (MR_REQ_MAX + 6) /* Get average power */ |
| 133 | #define PM_REQ_PTTL (MR_REQ_MAX + 7) /* Get power throttle */ |
| 134 | #define PM_REQ_VOLT (MR_REQ_MAX + 8) /* Get voltage */ |
| 135 | #define PM_REQ_TEMP (MR_REQ_MAX + 9) /* Get temperatures */ |
| 136 | #define PM_REQ_TACH (MR_REQ_MAX + 10) /* Get fan tachometer */ |
| 137 | #define PM_REQ_TTTL (MR_REQ_MAX + 11) /* Get thermal throttle */ |
| 138 | #define PM_REQ_FTTL (MR_REQ_MAX + 12) /* Get force throttle */ |
| 139 | #define PM_SET_FTTL (MR_REQ_MAX + 13) /* Set force throttle */ |
| 140 | #define PM_REQ_MAX PM_SET_FTTL /* Last PM command */ |
| 141 | |
| 142 | |
| 143 | /* |
| 144 | ** |
| 145 | ** Response container structures below. |
| 146 | ** |
| 147 | */ |
| 148 | |
| 149 | |
| 150 | /* |
| 151 | * Get power limit |
| 152 | * REQ_PL{0/1} notes: |
| 153 | * - Only power limit 0 have a guard band defined. |
| 154 | */ |
| 155 | typedef struct pm_rsp_plim { |
| 156 | uint32_t pwr_lim; /* Power limit, in Watt */ |
| 157 | uint32_t time_win; /* Time Window, in mSec */ |
| 158 | uint32_t guard_band; /* Guard band, in Watt */ |
| 159 | } PmRspPlim; |
| 160 | |
| 161 | |
| 162 | /* |
| 163 | * Set power limit |
| 164 | */ |
| 165 | typedef struct pm_cmd_plim { |
| 166 | uint32_t pwr_lim; /* Power limit, in Watt */ |
| 167 | uint32_t time_win; /* Time Window, in mSec */ |
| 168 | } PmCmdPlim; |
| 169 | |
| 170 | |
| 171 | /* |
| 172 | * Get average power |
| 173 | * REQ_PAVG notes: |
| 174 | * - Both values are subject to availability in the SMC. |
| 175 | * The top two status bit of each SMC register is provided |
| 176 | * separately (and stripped from the read value). Decode as |
| 177 | * 00 Data OK |
| 178 | * 01 Lower threshold reached |
| 179 | * 10 Upper threshold reached |
| 180 | * 11 Data unavailable |
| 181 | * It is unclear if data is good if outside thresholds. |
| 182 | */ |
| 183 | typedef struct pm_rsp_pavg { |
| 184 | uint8_t stat_0; /* Status bits for window 0 */ |
| 185 | uint8_t stat_1; /* Status bits for window 1 */ |
| 186 | uint32_t pwr_0; /* Average over window 0, in Watt */ |
| 187 | uint32_t pwr_1; /* Average over window 1, in Watt */ |
| 188 | } PmRspPavg; |
| 189 | |
| 190 | |
| 191 | /* |
| 192 | * Get Power throttle status |
| 193 | * REQ_PTTL notes: |
| 194 | * - Duration value is subject to availability in the SMC. |
| 195 | * The top two status bit of this SMC register is provided |
| 196 | * separately (and stripped from the read value). Decode as |
| 197 | * 00 Data OK |
| 198 | * 01 Reserved |
| 199 | * 10 Reserved |
| 200 | * 11 Data unavailable |
| 201 | */ |
| 202 | typedef struct pm_rsp_pttl { |
| 203 | uint8_t pwr_ttl; /* Power throttle asserted */ |
| 204 | uint8_t stat_dur; /* Status bits duration */ |
| 205 | uint32_t duration; /* Power throttle duration, in mSec */ |
| 206 | } PmRspPttl; |
| 207 | |
| 208 | |
| 209 | /* |
| 210 | * Get voltages |
| 211 | * REQ_VOLT notes: |
| 212 | * - VR values are subject to availability in the SMC. |
| 213 | * The top two status bit of each SMC register is provided |
| 214 | * separately (and stripped from the read value). Decode as |
| 215 | * 00 Data OK |
| 216 | * 01 Lower threshold reached |
| 217 | * 10 Upper threshold reached |
| 218 | * 11 Data unavailable |
| 219 | * It is unclear if data is good if outside thresholds. |
| 220 | */ |
| 221 | typedef struct pm_rsp_volt { |
| 222 | uint8_t stat_vccp; /* Status bits for Vddc */ |
| 223 | uint8_t stat_vddg; /* Status bits for Vddg */ |
| 224 | uint8_t stat_vddq; /* Status bits for Vddq */ |
| 225 | uint32_t vccp; /* Vccp, in mV */ |
| 226 | uint32_t vddg; /* Vddg, in mV */ |
| 227 | uint32_t vddq; /* Vddq, in mV */ |
| 228 | } PmRspVolt; |
| 229 | |
| 230 | |
| 231 | /* |
| 232 | * Get temperatures |
| 233 | * REQ_TEMP notes: |
| 234 | * - These values are subject to availability in the SMC. |
| 235 | * The top two status bit of each SMC register is provided |
| 236 | * separately (and stripped from the read value). Decode as |
| 237 | * 00 Data OK |
| 238 | * 01 Lower threshold reached |
| 239 | * 10 Upper threshold reached |
| 240 | * 11 Data unavailable |
| 241 | * It is unclear if data is good if outside thresholds. |
| 242 | */ |
| 243 | typedef struct pm_rsp_temp { |
| 244 | uint8_t stat_cpu; /* Status bits for Tcpu */ |
| 245 | uint8_t stat_vccp; /* Status bits for Tvddc */ |
| 246 | uint8_t stat_vddg; /* Status bits for Tvddg */ |
| 247 | uint8_t stat_vddq; /* Status bits for Tvddq */ |
| 248 | uint32_t cpu; /* CPU temp, in C */ |
| 249 | uint32_t vccp; /* Vccp VR temp, in C */ |
| 250 | uint32_t vddg; /* Vddg VR temp, in C */ |
| 251 | uint32_t vddq; /* Vddq VR temp, in C */ |
| 252 | } PmRspTemp; |
| 253 | |
| 254 | |
| 255 | /* |
| 256 | * Get fan tachometer |
| 257 | * REQ_TACH notes: |
| 258 | * - These values are subject to availability in the SMC. |
| 259 | * The top two status bit of each SMC register is provided |
| 260 | * separately (and stripped from the read value). Decode as |
| 261 | * 00 Data OK |
| 262 | * 01 Lower threshold reached (tach only) |
| 263 | * 10 Reserved |
| 264 | * 11 Data unavailable |
| 265 | * It is unclear if data is good if outside thresholds. |
| 266 | */ |
| 267 | typedef struct pm_rsp_tach { |
| 268 | uint8_t stat_pwm; /* Status bits for PWM */ |
| 269 | uint8_t stat_tach; /* Status bits for TACH */ |
| 270 | uint32_t fan_pwm; /* Fan power, in % */ |
| 271 | uint32_t fan_tach; /* Fan speed, in RPM */ |
| 272 | } PmRspTach; |
| 273 | |
| 274 | |
| 275 | /* |
| 276 | * Get thermal throttle status |
| 277 | * REQ_THRM notes: |
| 278 | * - Duration value is subject to availability in the SMC. |
| 279 | * The top two status bit of this SMC register is provided |
| 280 | * separately (and stripped from the read value). Decode as |
| 281 | * 00 Data OK |
| 282 | * 01 Reserved |
| 283 | * 10 Reserved |
| 284 | * 11 Data unavailable |
| 285 | */ |
| 286 | typedef struct pm_rsp_tttl { |
| 287 | uint8_t thrm_ttl; /* Power throttle asserted */ |
| 288 | uint8_t stat_dur; /* Status bits duration */ |
| 289 | uint32_t duration; /* Thermal throttle duration, in mSec */ |
| 290 | } PmRspTttl; |
| 291 | |
| 292 | |
| 293 | /* |
| 294 | * Get/Set force trottle control |
| 295 | */ |
| 296 | typedef struct pm_rsp_fttl { |
| 297 | uint8_t forced; /* Forced power throttle asserted */ |
| 298 | } PmRspFttl; |
| 299 | |
| 300 | |
| 301 | #pragma pack(pop) /* Restore to sane conditions */ |
| 302 | |
| 303 | #ifdef __cplusplus |
| 304 | } /* C++ guard */ |
| 305 | #endif |
| 306 | |
| 307 | #endif /* Recursion block */ |