| 1 | // ========== Copyright Header Begin ========================================== |
| 2 | // |
| 3 | // OpenSPARC T2 Processor File: dll_top.hpp |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 6 | // |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 8 | // |
| 9 | // This program is free software; you can redistribute it and/or modify |
| 10 | // it under the terms of the GNU General Public License as published by |
| 11 | // the Free Software Foundation; version 2 of the License. |
| 12 | // |
| 13 | // This program is distributed in the hope that it will be useful, |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | // GNU General Public License for more details. |
| 17 | // |
| 18 | // You should have received a copy of the GNU General Public License |
| 19 | // along with this program; if not, write to the Free Software |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | // |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license |
| 23 | // choice is available it will apply instead, Sun elects to use only |
| 24 | // the General Public License version 2 (GPLv2) at this time for any |
| 25 | // software where a choice of GPL license versions is made |
| 26 | // available with the language indicating that GPLv2 or any later version |
| 27 | // may be used, or where a choice of which version of the GPL is applied is |
| 28 | // otherwise unspecified. |
| 29 | // |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or |
| 32 | // have any questions. |
| 33 | // |
| 34 | // ========== Copyright Header End ============================================ |
| 35 | #ifndef DLL_TOP_h |
| 36 | #define DLL_TOP_h |
| 37 | |
| 38 | #include <systemc.h> |
| 39 | |
| 40 | #include "pcie_common/config.hpp" |
| 41 | #include "pcie_common/pciePacket.hpp" |
| 42 | #include "pcie_common/data_port.hpp" |
| 43 | #include "pcie_common/peu_csr_defines.hpp" |
| 44 | #include "pcie_common/peu_defines.hpp" |
| 45 | |
| 46 | #include "pcie_common/dll_defines.hpp" |
| 47 | #include "pcie_common/symbol_encoding.hpp" |
| 48 | #include "pcie_common/csr_if_port.hpp" |
| 49 | |
| 50 | #include <queue> |
| 51 | #include <sstream> |
| 52 | #include <iostream> |
| 53 | #include <list> |
| 54 | |
| 55 | #define WAIT(__EV__) if(!POR_RESET) wait( __EV__ | reset_ev); \ |
| 56 | if(POR_RESET) throw sc_exception(); |
| 57 | #define WAIT1(__EV__) if(!POR_RESET) wait( __EV__ | reset_ev | cs2_ev); \ |
| 58 | if(POR_RESET) throw sc_exception(); |
| 59 | |
| 60 | namespace pcie { |
| 61 | |
| 62 | /** This is the top DLL **/ |
| 63 | class dll_top : public sc_module |
| 64 | { |
| 65 | |
| 66 | public: |
| 67 | // Instance of write interface to fifo channel |
| 68 | data_out_port<RefPciePacket> dll_tl_out; |
| 69 | data_out_port<RefPciePacket> dll_pl_tlp_out; |
| 70 | data_out_port<RefPciePacket> dll_pl_dllp_out; |
| 71 | data_in_port<RefPciePacket> tl_dll_in; |
| 72 | data_in_port<RefPciePacket> pl_dll_in; |
| 73 | sc_in<bool> PhysicalLinkUp; |
| 74 | int DL_Status; |
| 75 | csr_if_port<sc_uint<32>,sc_uint<64> > csr_port; |
| 76 | |
| 77 | int FC_INIT1_Complete, FC_INIT2_Complete; |
| 78 | int DL_State; |
| 79 | int INIT_State; |
| 80 | int FC_Init_Complete; |
| 81 | |
| 82 | int Flag_FC1_P, Flag_FC1_NP, Flag_FC1_CPL, Flag_FC1; |
| 83 | int Flag_FC2_P, Flag_FC2_NP, Flag_FC2_CPL, Flag_FC2; |
| 84 | int ltssm_L0s; |
| 85 | bool sent_first_stp_pkt; |
| 86 | |
| 87 | sc_bv<2> DLL_State; |
| 88 | sc_bv<64> Csr_Write_Mask; |
| 89 | sc_bv<64> Csr_Write_Data; |
| 90 | |
| 91 | // internal registers |
| 92 | sc_uint<16> dllp_crc; |
| 93 | sc_uint<32> lcrc; |
| 94 | |
| 95 | bool NAK_SCHEDULED; //Added for error support |
| 96 | bool DO_NAK_SCHEDULED_CHECK; //Added for error support |
| 97 | bool EDB_DETECTED; //Added for error support |
| 98 | bool LCRC_MATCHED; //Added for error support |
| 99 | sc_uint<12> NEXT_TRANSMIT_SEQ; |
| 100 | sc_uint<12> NEXT_RECEIVE_SEQ; |
| 101 | sc_uint<12> ACKD_SEQ; |
| 102 | sc_uint<8> prepend_byte0; |
| 103 | sc_uint<8> prepend_byte1; |
| 104 | sc_uint<64> dll_timer; |
| 105 | sc_clock clock; |
| 106 | sc_bv<64> csr_data_reg; |
| 107 | sc_bv<64> ltssm_state_reg; |
| 108 | sc_uint<64> time_last_ack_nak_received,replay_timer_limit; |
| 109 | |
| 110 | sc_event csr_core_status_ev,tlu_ecl_ev,fire_tlu_ecl_ev,dll_tlu_ica_ev,fc_init1_complete_ev,fc_init2_complete_ev; |
| 111 | sc_event send_updatefc_ev; |
| 112 | sc_event cs2_ev; |
| 113 | sc_event credit_consumed_ev; ///< When ICR==ICA |
| 114 | |
| 115 | //Replay Buffer Data Elements |
| 116 | sc_uint<2> REPLAY_NUM; |
| 117 | sc_uint<12> REPLAY_TIMER; |
| 118 | sc_uint<64> replay_buffer_size; |
| 119 | USE_NAMESPACE(std)queue<RefPciePacket> replay_buffer; |
| 120 | USE_NAMESPACE(std)queue<RefPciePacket> tmp_replay_buffer; |
| 121 | |
| 122 | |
| 123 | USE_NAMESPACE(std)queue<RefPciePacket> queueTL,queue_DLLP,queue_TLP; |
| 124 | sc_event eventPlPktRdy, eventTlPktRdy; |
| 125 | |
| 126 | dll_top(sc_module_name module_name, sc_event *parent_global_ev, uint8 *global_event_type) : |
| 127 | sc_module (module_name), |
| 128 | clock("MY_CLK1",20,0.5,200,true), |
| 129 | PhysicalLinkUp("PhysicalLinkUp"), |
| 130 | dll_tl_out("DLL_TL_Out"), |
| 131 | tl_dll_in("TL_DLL_In"), |
| 132 | dll_pl_tlp_out("DLL_PL_TLP_Out"), |
| 133 | dll_pl_dllp_out("DLL_PL_DLLP_Out"), |
| 134 | csr_port("csr_port"), |
| 135 | pl_dll_in("PL_DLL_In") |
| 136 | { |
| 137 | this->parent_global_ev = parent_global_ev; |
| 138 | this->global_event_type = global_event_type; |
| 139 | // Producer process is ran as a thread on first processing element |
| 140 | SC_METHOD(init); |
| 141 | SC_THREAD(reset_handler); |
| 142 | SC_THREAD(credit_checker); |
| 143 | |
| 144 | LOG_DEBUG << "DLL TOP created "; |
| 145 | } |
| 146 | |
| 147 | SC_HAS_PROCESS(dll_top); |
| 148 | |
| 149 | |
| 150 | private: |
| 151 | void tl_producer(); |
| 152 | void tl_consumer(); |
| 153 | void pl_dllp_producer(); |
| 154 | void pl_tlp_producer(); |
| 155 | void pl_consumer(); |
| 156 | sc_uint<16> calculate_dllp_crc(RefPciePacket received_packet,int pkt_begin, int pkt_end); |
| 157 | sc_uint<32> calculate_lcrc(RefPciePacket received_packet,int pkt_begin, int pkt_end); |
| 158 | void dll_ctrl_mgmt(); |
| 159 | void fc_init(); |
| 160 | void init(); |
| 161 | void ltssm_state_check(); |
| 162 | void fc_update(); |
| 163 | void buffer_add(RefPciePacket packet); |
| 164 | void buffer_remove(sc_uint<12> seq_num); |
| 165 | void buffer_replay( sc_uint<12> seq_num); |
| 166 | void buffer_replay_single( sc_uint<12> seq_id); |
| 167 | bool in_replay_buffer(sc_uint<12> seq_num); |
| 168 | void write_error_csr(uint8,uint8,uint8,char[]); |
| 169 | void write_error_csr2(uint8,uint8,uint8,char[]); |
| 170 | sc_uint<14> get_mps(); |
| 171 | void reset_handler(); |
| 172 | void credit_checker(); |
| 173 | |
| 174 | enum {OE,UE,CE}; |
| 175 | |
| 176 | bool POR_RESET; |
| 177 | bool STOP_TIMER; |
| 178 | sc_event reset_ev; //Reset event for threads in the module |
| 179 | sc_event *parent_global_ev; //Reset event to the module |
| 180 | |
| 181 | uint8 *global_event_type; |
| 182 | |
| 183 | //Proc handles |
| 184 | sc_process_handle pl_consumer_ph; |
| 185 | sc_process_handle pl_dllp_producer_ph; |
| 186 | sc_process_handle pl_tlp_producer_ph; |
| 187 | sc_process_handle tl_consumer_ph; |
| 188 | sc_process_handle tl_producer_ph; |
| 189 | sc_process_handle ltssm_state_check_ph; |
| 190 | sc_process_handle fc_init_ph; |
| 191 | sc_process_handle fc_update_ph; |
| 192 | sc_process_handle dll_ctrl_mgmt_ph; |
| 193 | }; |
| 194 | |
| 195 | } |
| 196 | |
| 197 | #endif |