| 1 | /* |
| 2 | * ========== Copyright Header Begin ========================================== |
| 3 | * |
| 4 | * OpenSPARC T2 Processor File: rx_p0p1_MULTI_4DMA_rand_33.s |
| 5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 7 | * |
| 8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as published by |
| 12 | * the Free Software Foundation; version 2 of the License. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 22 | * |
| 23 | * For the avoidance of doubt, and except that if any non-GPL license |
| 24 | * choice is available it will apply instead, Sun elects to use only |
| 25 | * the General Public License version 2 (GPLv2) at this time for any |
| 26 | * software where a choice of GPL license versions is made |
| 27 | * available with the language indicating that GPLv2 or any later version |
| 28 | * may be used, or where a choice of which version of the GPL is applied is |
| 29 | * otherwise unspecified. |
| 30 | * |
| 31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 32 | * CA 95054 USA or visit www.sun.com if you need additional information or |
| 33 | * have any questions. |
| 34 | * |
| 35 | * |
| 36 | * ========== Copyright Header End ============================================ |
| 37 | */ |
| 38 | #define MAIN_PAGE_HV_ALSO |
| 39 | |
| 40 | #include "hboot.s" |
| 41 | #include "niu_defines.h" |
| 42 | #define FAIR_PKT_COUNT ((RXMAC_PKTCNT) - (RXMAC_PKTCNT%8)) |
| 43 | |
| 44 | .text |
| 45 | .global main |
| 46 | |
| 47 | main: |
| 48 | ta T_CHANGE_HPRIV |
| 49 | nop |
| 50 | # 94 "diag.j.pp" |
| 51 | ! |
| 52 | ! Thread 0 Start |
| 53 | ! |
| 54 | ! |
| 55 | !@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ |
| 56 | ! Init DMA Channel 0 @@@@@@@@@@@@@@@@@@@@@@@@@@@@ |
| 57 | !@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ |
| 58 | |
| 59 | P_NIU_RxInitDma_0: |
| 60 | setx TX_CS, %g1, %g2 |
| 61 | nop ! $EV trig_pc_d(1, @VA(.MAIN.P_NIU_RxInitDma_0)) -> NIU_InitRxDma(0, RX_DESC_RING_LENGTH, RX_COMPL_RING_LEN, RBR_CONFIG_B_DATA, RX_INITIAL_KICK, 0x0, NIU_RX_MULTI_DMA) |
| 62 | setx 0x5, %g1, %g4 |
| 63 | delay_loop_Rx_0: |
| 64 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 |
| 65 | nop |
| 66 | nop |
| 67 | nop |
| 68 | nop |
| 69 | dec %g4 |
| 70 | brnz %g4, delay_loop_Rx_0 |
| 71 | nop |
| 72 | |
| 73 | nop |
| 74 | setx 0x0, %g1, %o0 |
| 75 | setx 0x0, %g1, %o1 |
| 76 | setx RX_DESC_RING_LENGTH, %g1, %o2 |
| 77 | setx RX_COMPL_RING_LEN, %g1, %o3 |
| 78 | setx RBR_CONFIG_B_DATA, %g1, %o4 |
| 79 | setx RX_INITIAL_KICK, %g1, %o5 |
| 80 | setx 0x0, %g1, %o6 |
| 81 | call NiuInitRxDma |
| 82 | nop |
| 83 | !@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ |
| 84 | ! Init DMA Channel 1 @@@@@@@@@@@@@@@@@@@@@@@@@@@@ |
| 85 | !@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ |
| 86 | |
| 87 | P_NIU_RxInitDma_1: |
| 88 | nop ! $EV trig_pc_d(1, @VA(.MAIN.P_NIU_RxInitDma_1)) -> NIU_InitRxDma(1, RX_DESC_RING_LENGTH, RX_COMPL_RING_LEN, RBR_CONFIG_B_DATA, RX_INITIAL_KICK, 0x0, NIU_RX_MULTI_DMA) |
| 89 | setx 0x5, %g1, %g4 |
| 90 | delay_loop_Rx_1: |
| 91 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 |
| 92 | nop |
| 93 | nop |
| 94 | nop |
| 95 | nop |
| 96 | dec %g4 |
| 97 | brnz %g4, delay_loop_Rx_1 |
| 98 | nop |
| 99 | |
| 100 | nop |
| 101 | setx 0x1, %g1, %o0 |
| 102 | setx 0x1, %g1, %l2 |
| 103 | setx RX_DESC_RING_LENGTH, %g1, %o2 |
| 104 | setx RX_COMPL_RING_LEN, %g1, %o3 |
| 105 | setx RBR_CONFIG_B_DATA, %g1, %o4 |
| 106 | setx RX_INITIAL_KICK, %g1, %o5 |
| 107 | setx 0x0, %g1, %o6 |
| 108 | call NiuInitRxDma |
| 109 | nop |
| 110 | !@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ |
| 111 | ! Init DMA Channel 2 @@@@@@@@@@@@@@@@@@@@@@@@@@@@ |
| 112 | !@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ |
| 113 | |
| 114 | P_NIU_RxInitDma_2: |
| 115 | nop ! $EV trig_pc_d(1, @VA(.MAIN.P_NIU_RxInitDma_2)) -> NIU_InitRxDma(2, RX_DESC_RING_LENGTH, RX_COMPL_RING_LEN, RBR_CONFIG_B_DATA, RX_INITIAL_KICK, 0x0, NIU_RX_MULTI_DMA) |
| 116 | setx 0x5, %g1, %g4 |
| 117 | delay_loop_Rx_2: |
| 118 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 |
| 119 | nop |
| 120 | nop |
| 121 | nop |
| 122 | nop |
| 123 | dec %g4 |
| 124 | brnz %g4, delay_loop_Rx_2 |
| 125 | nop |
| 126 | |
| 127 | nop |
| 128 | setx 0x2, %g1, %o0 |
| 129 | setx 0x2, %g1, %l3 |
| 130 | setx RX_DESC_RING_LENGTH, %g1, %o2 |
| 131 | setx RX_COMPL_RING_LEN, %g1, %o3 |
| 132 | setx RBR_CONFIG_B_DATA, %g1, %o4 |
| 133 | setx RX_INITIAL_KICK, %g1, %o5 |
| 134 | setx 0x0, %g1, %o6 |
| 135 | call NiuInitRxDma |
| 136 | nop |
| 137 | !@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ |
| 138 | ! Init DMA Channel 3 @@@@@@@@@@@@@@@@@@@@@@@@@@@@ |
| 139 | !@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ |
| 140 | |
| 141 | P_NIU_RxInitDma_3: |
| 142 | nop ! $EV trig_pc_d(1, @VA(.MAIN.P_NIU_RxInitDma_3)) -> NIU_InitRxDma(3, RX_DESC_RING_LENGTH, RX_COMPL_RING_LEN, RBR_CONFIG_B_DATA, RX_INITIAL_KICK, 0x0, NIU_RX_MULTI_DMA) |
| 143 | setx 0x5, %g1, %g4 |
| 144 | delay_loop_Rx_3: |
| 145 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 |
| 146 | nop |
| 147 | nop |
| 148 | nop |
| 149 | nop |
| 150 | dec %g4 |
| 151 | brnz %g4, delay_loop_Rx_3 |
| 152 | nop |
| 153 | |
| 154 | nop |
| 155 | setx 0x3, %g1, %o0 |
| 156 | setx 0x3, %g1, %l4 |
| 157 | setx RX_DESC_RING_LENGTH, %g1, %o2 |
| 158 | setx RX_COMPL_RING_LEN, %g1, %o3 |
| 159 | setx RBR_CONFIG_B_DATA, %g1, %o4 |
| 160 | setx RX_INITIAL_KICK, %g1, %o5 |
| 161 | setx NIU_RX_MULTI_DMA, %g1, %o6 |
| 162 | call NiuInitRxDma |
| 163 | nop |
| 164 | P0_NIU_RxPkt_Conf: |
| 165 | nop ! $EV trig_pc_d(1, @VA(.MAIN.P0_NIU_RxPkt_Conf)) -> NIU_RxPktConf(RXMAC_PKTCNT,0) |
| 166 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 |
| 167 | nop |
| 168 | P1_NIU_RxPkt_Conf: |
| 169 | nop ! $EV trig_pc_d(1, @VA(.MAIN.P1_NIU_RxPkt_Conf)) -> NIU_RxPktConf(RXMAC_PKTCNT,1) |
| 170 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 |
| 171 | nop |
| 172 | P_NIU_Rx_GenPkt: |
| 173 | setx RXMAC_PKTCNT, %g1, %g6 |
| 174 | nop |
| 175 | Rx_pktcnt_loop: |
| 176 | nop ! $EV trig_pc_d(1, @VA(.MAIN.Rx_pktcnt_loop)) -> NIU_RxGenPkt(MAC_ID, 0, RXMAC_PKTCNT, NIU_RX_PKT_LEN,0x1, NIU_RX_MULTI_DMA, 1) |
| 177 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 |
| 178 | nop |
| 179 | nop |
| 180 | nop |
| 181 | nop |
| 182 | |
| 183 | delay_loop0: |
| 184 | mulx %o1, 0x200, %g4 |
| 185 | setx RCR_STAT_A, %g7, %g2 |
| 186 | add %g2, %g4, %g2 |
| 187 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g4 |
| 188 | |
| 189 | mulx %l2, 0x200, %g5 |
| 190 | setx RCR_STAT_A, %g7, %g2 |
| 191 | add %g2, %g5, %g2 |
| 192 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 |
| 193 | |
| 194 | add %g5, %g4, %l5 |
| 195 | |
| 196 | mulx %l3, 0x200, %g5 |
| 197 | setx RCR_STAT_A, %g7, %g2 |
| 198 | add %g2, %g5, %g2 |
| 199 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 |
| 200 | |
| 201 | add %g5, %l5, %l5 |
| 202 | |
| 203 | mulx %l4, 0x200, %g5 |
| 204 | setx RCR_STAT_A, %g7, %g2 |
| 205 | add %g2, %g5, %g2 |
| 206 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 |
| 207 | |
| 208 | add %g5, %l5, %g5 |
| 209 | cmp %g5, FAIR_PKT_COUNT |
| 210 | bne delay_loop0 |
| 211 | nop |
| 212 | |
| 213 | |
| 214 | test_passed: |
| 215 | nop |
| 216 | EXIT_GOOD |
| 217 | # 218 "diag.j.pp" |
| 218 | |
| 219 | /************************************************************************ |
| 220 | Test case data start |
| 221 | ************************************************************************/ |
| 222 | !SECTION SetRngConfig_init data_va=0x100000000 |
| 223 | !attr_data { |
| 224 | ! Name = SetRngConfig_init, |
| 225 | ! hypervisor, |
| 226 | ! compressimage |
| 227 | ! } |
| 228 | !.data |
| 229 | !SetRngConfig_init: |
| 230 | ! .xword 0x0060452301000484 |
| 231 | |
| 232 | SECTION SetRxLogMask1_init data_va=0x200000100 |
| 233 | attr_data { |
| 234 | Name = SetRxLogMask1_init, |
| 235 | hypervisor, |
| 236 | compressimage |
| 237 | } |
| 238 | .data |
| 239 | SetRxLogMask1_init: |
| 240 | .xword 0x0060452301000484 |
| 241 | |
| 242 | SECTION SetRxLogVal1_init data_va=0x200000200 |
| 243 | attr_data { |
| 244 | Name = SetRxLogVal1_init, |
| 245 | hypervisor, |
| 246 | compressimage |
| 247 | } |
| 248 | .data |
| 249 | SetRxLogVal1_init: |
| 250 | .xword 0x0060452301000484 |
| 251 | |
| 252 | SECTION SetRxLogRelo1_init data_va=0x200000300 |
| 253 | attr_data { |
| 254 | Name = SetRxLogRelo1_init, |
| 255 | hypervisor, |
| 256 | compressimage |
| 257 | } |
| 258 | .data |
| 259 | SetRxLogRelo1_init: |
| 260 | .xword 0x0060452301000484 |
| 261 | |
| 262 | SECTION SetRxLogPgVld_init data_va=0x200000400 |
| 263 | attr_data { |
| 264 | Name = SetRxLogPgVld_init, |
| 265 | hypervisor, |
| 266 | compressimage |
| 267 | } |
| 268 | .data |
| 269 | SetRxLogPgVld_init: |
| 270 | .xword 0x0060452301000484 |
| 271 | SECTION SetRbrConfig_A_init data_va=0x200000500 |
| 272 | attr_data { |
| 273 | Name = SetRbrConfig_A_init, |
| 274 | hypervisor, |
| 275 | compressimage |
| 276 | } |
| 277 | .data |
| 278 | SetRbrConfig_A_init: |
| 279 | .xword 0x0060452301000484 |
| 280 | SECTION SetRbrConfig_B_init data_va=0x200000600 |
| 281 | attr_data { |
| 282 | Name = SetRbrConfig_B_init, |
| 283 | hypervisor, |
| 284 | compressimage |
| 285 | } |
| 286 | .data |
| 287 | SetRbrConfig_B_init: |
| 288 | .xword 0x0060452301000484 |
| 289 | SECTION SetRcrConfig_A_init data_va=0x200000700 |
| 290 | attr_data { |
| 291 | Name = SetRcrConfig_A_init, |
| 292 | hypervisor, |
| 293 | compressimage |
| 294 | } |
| 295 | .data |
| 296 | SetRcrConfig_A_init: |
| 297 | .xword 0x0060452301000484 |
| 298 | SECTION SetRxDmaCfig_1_0_init data_va=0x200000800 |
| 299 | attr_data { |
| 300 | Name = SetRxDmaCfig_1_0_init, |
| 301 | hypervisor, |
| 302 | compressimage |
| 303 | } |
| 304 | .data |
| 305 | SetRxDmaCfig_1_0_init: |
| 306 | .xword 0x0060452301000484 |
| 307 | SECTION SetRxdmaCfig2Start_init data_va=0x200000900 |
| 308 | attr_data { |
| 309 | Name = SetRxdmaCfig2Start_init, |
| 310 | hypervisor, |
| 311 | compressimage |
| 312 | } |
| 313 | .data |
| 314 | SetRxdmaCfig2Start_init: |
| 315 | .xword 0x0060452301000484 |
| 316 | SECTION SetRxDmaCfig_1_1_init data_va=0x200000a00 |
| 317 | attr_data { |
| 318 | Name = SetRxDmaCfig_1_1_init, |
| 319 | hypervisor, |
| 320 | compressimage |
| 321 | } |
| 322 | .data |
| 323 | SetRxDmaCfig_1_1_init: |
| 324 | .xword 0x0060452301000484 |
| 325 | # 331 "diag.j.pp" |
| 326 | SECTION SetRxRingKick_init data_va=0x200000b00 |
| 327 | attr_data { |
| 328 | Name = SetRxRingKick_init, |
| 329 | hypervisor, |
| 330 | compressimage |
| 331 | } |
| 332 | .data |
| 333 | SetRxRingKick_init: |
| 334 | .xword 0x0060452301000484 |
| 335 | |
| 336 | SECTION SetRxLogMask2_init data_va=0x200000c00 |
| 337 | attr_data { |
| 338 | Name = SetRxLogMask2_init, |
| 339 | hypervisor, |
| 340 | compressimage |
| 341 | } |
| 342 | .data |
| 343 | SetRxLogMask2_init: |
| 344 | .xword 0x0060452301000484 |
| 345 | |
| 346 | SECTION SetRxLogVal2_init data_va=0x200000d00 |
| 347 | attr_data { |
| 348 | Name = SetRxLogVal2_init, |
| 349 | hypervisor, |
| 350 | compressimage |
| 351 | } |
| 352 | .data |
| 353 | SetRxLogVal2_init: |
| 354 | .xword 0x0060452301000484 |
| 355 | |
| 356 | SECTION SetRxLogRelo2_init data_va=0x200000e00 |
| 357 | attr_data { |
| 358 | Name = SetRxLogRelo2_init, |
| 359 | hypervisor, |
| 360 | compressimage |
| 361 | } |
| 362 | .data |
| 363 | SetRxLogRelo2_init: |
| 364 | .xword 0x0060452301000484 |
| 365 | # 374 "diag.j.pp" |
| 366 | |
| 367 | #if 0 |
| 368 | #endif |