projects / OpenSPARC-T2-SAM / blame
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1 | /* |
| 2 | * ========== Copyright Header Begin ========================================== | |
| 3 | * | |
| 4 | * Hypervisor Software File: ncs.h | |
| 5 | * | |
| 6 | * Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved. | |
| 7 | * | |
| 8 | * - Do no alter or remove copyright notices | |
| 9 | * | |
| 10 | * - Redistribution and use of this software in source and binary forms, with | |
| 11 | * or without modification, are permitted provided that the following | |
| 12 | * conditions are met: | |
| 13 | * | |
| 14 | * - Redistribution of source code must retain the above copyright notice, | |
| 15 | * this list of conditions and the following disclaimer. | |
| 16 | * | |
| 17 | * - Redistribution in binary form must reproduce the above copyright notice, | |
| 18 | * this list of conditions and the following disclaimer in the | |
| 19 | * documentation and/or other materials provided with the distribution. | |
| 20 | * | |
| 21 | * Neither the name of Sun Microsystems, Inc. or the names of contributors | |
| 22 | * may be used to endorse or promote products derived from this software | |
| 23 | * without specific prior written permission. | |
| 24 | * | |
| 25 | * This software is provided "AS IS," without a warranty of any kind. | |
| 26 | * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES, | |
| 27 | * INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A | |
| 28 | * PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED. SUN | |
| 29 | * MICROSYSTEMS, INC. ("SUN") AND ITS LICENSORS SHALL NOT BE LIABLE FOR | |
| 30 | * ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING OR | |
| 31 | * DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL SUN | |
| 32 | * OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA, OR | |
| 33 | * FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE | |
| 34 | * DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF LIABILITY, | |
| 35 | * ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE, EVEN IF | |
| 36 | * SUN HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. | |
| 37 | * | |
| 38 | * You acknowledge that this software is not designed, licensed or | |
| 39 | * intended for use in the design, construction, operation or maintenance of | |
| 40 | * any nuclear facility. | |
| 41 | * | |
| 42 | * ========== Copyright Header End ============================================ | |
| 43 | */ | |
| 44 | /* | |
| 45 | * Copyright 2007 Sun Microsystems, Inc. All rights reserved. | |
| 46 | * Use is subject to license terms. | |
| 47 | */ | |
| 48 | ||
| 49 | #ifndef _NCS_H | |
| 50 | #define _NCS_H | |
| 51 | ||
| 52 | #pragma ident "@(#)ncs.h 1.3 07/05/03 SMI" | |
| 53 | ||
| 54 | #ifdef __cplusplus | |
| 55 | extern "C" { | |
| 56 | #endif | |
| 57 | ||
| 58 | #include <ncs_api.h> | |
| 59 | ||
| 60 | /* | |
| 61 | * MAU states | |
| 62 | */ | |
| 63 | #define MAU_STATE_UNCONFIGURED 0x0 | |
| 64 | #define MAU_STATE_RUNNING 0x1 /* mau configured & running */ | |
| 65 | #define MAU_STATE_ERROR 0xF /* mau is in the error state */ | |
| 66 | /* | |
| 67 | * CWQ states | |
| 68 | */ | |
| 69 | #define CWQ_STATE_UNCONFIGURED 0x0 | |
| 70 | #define CWQ_STATE_RUNNING 0x1 /* cwq configured & running */ | |
| 71 | #define CWQ_STATE_ERROR 0xF /* cwq is in the error state */ | |
| 72 | ||
| 73 | /* | |
| 74 | * MAU/CWQ Queue state. | |
| 75 | */ | |
| 76 | #define NCS_QSTATE_UNCONFIGURED 0 | |
| 77 | #define NCS_QSTATE_CONFIGURED 1 | |
| 78 | ||
| 79 | #define NCS_MIN_MAU_NENTRIES 2 | |
| 80 | #define NCS_MIN_CWQ_NENTRIES 2 | |
| 81 | #define NCS_MAX_CWQ_NENTRIES 64 | |
| 82 | ||
| 83 | #ifndef _ASM | |
| 84 | /* | |
| 85 | * Queuing structure used by crypto hypervisor support | |
| 86 | * to represent queue of requests for MAU/CWQ. Kernel | |
| 87 | * side inserts requests into the queue which are | |
| 88 | * subsequently picked up in the context of the | |
| 89 | * hypervisor. | |
| 90 | * | |
| 91 | * Struct is globally kept in a per-MAU/CWQ array. | |
| 92 | * NCS code indexes into appropriate queue | |
| 93 | * using the ID of the MAU/CWQ (Core) on which | |
| 94 | * it's running at the time. | |
| 95 | */ | |
| 96 | typedef struct mau_queue { | |
| 97 | uint64_t mq_lock; | |
| 98 | uint32_t mq_state; | |
| 99 | uint32_t mq_busy; | |
| 100 | uint64_t mq_base; | |
| 101 | uint64_t mq_base_ra; | |
| 102 | uint64_t mq_end; | |
| 103 | uint64_t mq_head; | |
| 104 | uint64_t mq_head_marker; | |
| 105 | uint64_t mq_tail; | |
| 106 | uint64_t mq_nentries; | |
| 107 | uint64_t mq_cpu_pid; /* HV intr target */ | |
| 108 | } mau_queue_t; | |
| 109 | ||
| 110 | ||
| 111 | /* | |
| 112 | * The MA and CWQ interrupt cookies are obtained | |
| 113 | * via vdev_intr_register() and passed to | |
| 114 | * vdev_intr_generate() to initiate the interrupt. | |
| 115 | * | |
| 116 | * The active field gets set via the respective | |
| 117 | * mau/cwq_intr() routines. | |
| 118 | */ | |
| 119 | typedef struct crypto_intr { | |
| 120 | uint64_t ci_cookie; | |
| 121 | uint64_t ci_active; | |
| 122 | uint64_t ci_data; | |
| 123 | } crypto_intr_t; | |
| 124 | ||
| 125 | ||
| 126 | ||
| 127 | #endif /* !_ASM */ | |
| 128 | ||
| 129 | /* | |
| 130 | * Saves us from doing mulx's when using a | |
| 131 | * mau/cwq id as an index into guest.maus[] | |
| 132 | * or guest.cwqs[]. | |
| 133 | */ | |
| 134 | #define GUEST_MAUS_SHIFT SHIFT_LONG | |
| 135 | #define GUEST_CWQS_SHIFT SHIFT_LONG | |
| 136 | ||
| 137 | #ifdef __cplusplus | |
| 138 | } | |
| 139 | #endif | |
| 140 | ||
| 141 | #endif /* _NCS_H */ |