Commit | Line | Data |
---|---|---|
920dae64 AT |
1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: SS_CKMemory.h | |
5 | * Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved. | |
6 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES. | |
7 | * | |
8 | * The above named program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public | |
10 | * License version 2 as published by the Free Software Foundation. | |
11 | * | |
12 | * The above named program is distributed in the hope that it will be | |
13 | * useful, but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public | |
18 | * License along with this work; if not, write to the Free Software | |
19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. | |
20 | * | |
21 | * ========== Copyright Header End ============================================ | |
22 | */ | |
23 | #ifndef __SS_CKMemory_h__ | |
24 | #define __SS_CKMemory_h__ | |
25 | #include <iostream.h> | |
26 | #include <map> | |
27 | #include <SS_Types.h> | |
28 | #include "BL_Memory.h" | |
29 | #include "SS_Memory.h" | |
30 | #include "MemoryTransaction.h" | |
31 | #include "BL_CKEcc.h" | |
32 | #include "BL_CKSyndrome.h" | |
33 | ||
34 | ||
35 | using namespace::std; | |
36 | ||
37 | class SS_Strand; | |
38 | ||
39 | class SS_CKMemory:public BL_Memory/*{{{*/ | |
40 | { | |
41 | public: | |
42 | SS_CKMemory(SS_Memory *mem); | |
43 | ~SS_CKMemory(); | |
44 | ||
45 | // Supported User Interface Operations | |
46 | ||
47 | void poke8( uint64_t addr, uint8_t data ){ss_mem->poke8(addr,data);} | |
48 | void poke16( uint64_t addr, uint16_t data ){ss_mem->poke16(addr,data);} | |
49 | void poke32( uint64_t addr, uint32_t data ){ss_mem->poke32(addr,data);} | |
50 | void poke64( uint64_t addr, uint64_t data ){ss_mem->poke64(addr,data);} | |
51 | uint8_t peek8u( uint64_t addr ){return ss_mem->peek8u(addr);} | |
52 | int8_t peek8s( uint64_t addr ){return ss_mem->peek8s(addr);} | |
53 | uint16_t peek16u( uint64_t addr ){return ss_mem->peek16u(addr);} | |
54 | int16_t peek16s( uint64_t addr ){return ss_mem->peek16s(addr);} | |
55 | uint32_t peek32u( uint64_t addr ){return ss_mem->peek32u(addr);} | |
56 | int32_t peek32s( uint64_t addr ){return ss_mem->peek32s(addr);} | |
57 | uint64_t peek64( uint64_t addr ){return ss_mem->peek64(addr);} | |
58 | ||
59 | // Supported Fetch Operation (instruction fetch) | |
60 | ||
61 | uint32_t fetch32 ( uint64_t addr ); | |
62 | void fetch256( uint64_t addr, uint64_t data[4] ); | |
63 | void fetch512( uint64_t addr, uint64_t data[8] ); | |
64 | ||
65 | // Supported Store Operations. st8(), st16(), st32() and st64() are gueranteed to be atomic. | |
66 | // st128() and st512() are atomic per 64bit quantity. | |
67 | ||
68 | void st8 ( uint64_t addr, uint8_t data ); | |
69 | void st16 ( uint64_t addr, uint16_t data ); | |
70 | void st32 ( uint64_t addr, uint32_t data ); | |
71 | void st64 ( uint64_t addr, uint64_t data ); | |
72 | void st128( uint64_t addr, uint64_t data[2] ); | |
73 | void st512( uint64_t addr, uint64_t data[8] ); | |
74 | ||
75 | // Supported Load Operations. ld8[su]() to ld64() are quaranteed to be atomic. ld128() and | |
76 | // above are atomic at the 64 bit granularity. | |
77 | ||
78 | uint8_t ld8u ( uint64_t addr ); | |
79 | int8_t ld8s ( uint64_t addr ); | |
80 | uint16_t ld16u( uint64_t addr ); | |
81 | int16_t ld16s( uint64_t addr ); | |
82 | uint32_t ld32u( uint64_t addr ); | |
83 | int32_t ld32s( uint64_t addr ); | |
84 | uint64_t ld64 ( uint64_t addr ); | |
85 | void ld128( uint64_t addr, uint64_t data[2] ); | |
86 | void ld256( uint64_t addr, uint64_t data[4] ); | |
87 | void ld512( uint64_t addr, uint64_t data[8] ); | |
88 | ||
89 | // st64partial() performs 8 byte partial store. The bytes to store are specified by mask. A 1 in bit N of | |
90 | // mask denotes that byte (data >> (8*N)) & 0xff should be written to memory | |
91 | ||
92 | void st64partial( uint64_t addr, uint64_t data, uint64_t mask ); | |
93 | ||
94 | // ld128atomic() (aka load twin double, load quad atomic) atomically loads two | |
95 | // 64bit values from memory at addr into rd. rd[0] is the value at addr, rd[1] | |
96 | // is the value at addr + 8. Note ld128 does() not guarantee atomicity. | |
97 | ||
98 | void ld128atomic( uint64_t addr, uint64_t data[2] ); | |
99 | ||
100 | // ldstub() return a byte from memory at addr, and set the byte at addr | |
101 | // to 0xff. The ldstub() operation is atomic. | |
102 | ||
103 | uint8_t ldstub( uint64_t addr ); | |
104 | ||
105 | // swap() stores the 32bit value rd with the 32bit value at addr. | |
106 | // The old 32bit value at addr is returned. The operation is atomic. | |
107 | ||
108 | uint32_t swap( uint64_t addr, uint32_t rd ); | |
109 | ||
110 | // casx() compares the 64bit value rs2 with the 64bit value at addr. | |
111 | // If the two values are equal, the value rd is stored in the | |
112 | // 64bit value at addr. In both cases the old 64bit value at addr is | |
113 | // returned, that is the value at addr before the storei happened. | |
114 | // The casx() operation is atomic. | |
115 | ||
116 | uint64_t casx( uint64_t addr, uint64_t rd, uint64_t rs2 ); | |
117 | ||
118 | // cas() is as casx, but for 32bit. | |
119 | ||
120 | uint32_t cas( uint64_t addr, uint32_t rd, uint32_t rs2 ); | |
121 | ||
122 | //---------------------------------------------------------------------------- | |
123 | // CK additional interface | |
124 | //---------------------------------------------------------------------------- | |
125 | ||
126 | // dram_update_ecc() updates the ecc value associated with paddress. | |
127 | void dram_update_ecc(uint64_t paddr,uint64_t newDramEcc) | |
128 | { | |
129 | dram_ecc_map[paddr] = newDramEcc; | |
130 | } | |
131 | ||
132 | // Verifies if a ecc value exists for a given physical address | |
133 | bool ecc_exists(uint64_t key) const | |
134 | { | |
135 | return dram_ecc_map.find(key) != dram_ecc_map.end(); | |
136 | } | |
137 | ||
138 | // Returns the ecc value for a given physical address | |
139 | uint64_t fetch_ecc(uint64_t key) const | |
140 | { | |
141 | std::map<uint64_t,uint64_t>::const_iterator i = dram_ecc_map.find(key); | |
142 | if (i == dram_ecc_map.end()) | |
143 | { | |
144 | fprintf(stderr, "SS_CKMemory::fetchecc(): no ecc at 0x%x", key); | |
145 | exit(-1); | |
146 | } | |
147 | return i->second; | |
148 | } | |
149 | ||
150 | // Calculates ecc for 128 bits of data give a higher order physical | |
151 | // address | |
152 | uint64_t calculate_dram_ecc(uint64_t paddr) | |
153 | { | |
154 | return BL_CKEccFile::generateChipkillECC(read_raw_CK_line(paddr)); | |
155 | } | |
156 | ||
157 | // DRAM Error Detection and Handling | |
158 | // Detect ecc error | |
159 | // If the paddr has an entry in the ecc Map | |
160 | bool detect_dram_error(uint64_t paddr,BL_CKSyndrome &ck_syndrome) | |
161 | { | |
162 | if(ecc_exists(paddr)) | |
163 | { | |
164 | BL_CKSyndrome syndrome(read_raw_CK_line(paddr), fetch_ecc(paddr)); | |
165 | ck_syndrome = syndrome; | |
166 | return true; | |
167 | } | |
168 | return false; | |
169 | } | |
170 | ||
171 | // Reads one Chip-Kill line from memory without correction | |
172 | BL_CKEccFile::ChipKillLine read_raw_CK_line(uint64_t paddress) const | |
173 | { | |
174 | BL_CKEccFile::ChipKillLine line; | |
175 | line.msdw = ss_mem->peek64(paddress); | |
176 | line.lsdw = ss_mem->peek64((paddress+8)); | |
177 | ||
178 | return line; | |
179 | } | |
180 | ||
181 | // Correct Chip-Kill data errors in a memory transaction | |
182 | // data payload | |
183 | bool read_dram_error_corrected(MemoryTransaction &memXact); | |
184 | static const uint64_t DRAM_LINE_LENGTH = 16; | |
185 | ||
186 | // Chip-Kill ecc used to indicate poisoned data (NotData) | |
187 | static const uint64_t DRAM_NOT_DATA = 0x8221; | |
188 | ||
189 | ||
190 | ||
191 | private: | |
192 | ||
193 | MemoryTransaction mem_xact; | |
194 | ||
195 | uint64_t ras_ld_buf( uint64_t addr, uint_t size ); | |
196 | void ras_ld( uint64_t addr, uint_t size, uint64_t* data ); | |
197 | ||
198 | SS_Memory *ss_mem; | |
199 | std::map<uint64_t,uint64_t> dram_ecc_map; | |
200 | ||
201 | // Return "size" bytes of data located at specified physical | |
202 | // address for Chip-kill | |
203 | uint64_t read_corrected_dram_data(uint64_t paddress, uint8_t size); | |
204 | ||
205 | // Return "size" (<= 4) bytes of data located at specified physical | |
206 | // address for Chip-kill | |
207 | uint64_t read_short_corrected_dram_data(uint64_t paddress, uint8_t size); | |
208 | ||
209 | // set to artificially inject Chip-Kill errors. Note that this | |
210 | // can't be used with "real" CK error injection because it | |
211 | // could result in uncorrectable double nibble errors. | |
212 | bool debug_CK; | |
213 | ||
214 | }; | |
215 | /*}}}*/ | |
216 | ||
217 | #endif /*__SS_CKMemory_h__*/ |