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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: SS_TrcExe.cc | |
4 | // Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved. | |
5 | // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES. | |
6 | // | |
7 | // The above named program is free software; you can redistribute it and/or | |
8 | // modify it under the terms of the GNU General Public | |
9 | // License version 2 as published by the Free Software Foundation. | |
10 | // | |
11 | // The above named program is distributed in the hope that it will be | |
12 | // useful, but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | // General Public License for more details. | |
15 | // | |
16 | // You should have received a copy of the GNU General Public | |
17 | // License along with this work; if not, write to the Free Software | |
18 | // Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. | |
19 | // | |
20 | // ========== Copyright Header End ============================================ | |
21 | /*********************************************************************** | |
22 | ** | |
23 | ** Copyright (C) 2006, Sun Microsystems, Inc. | |
24 | ** | |
25 | ** Sun considers its source code as an unpublished, proprietary | |
26 | ** trade secret and it is available only under strict license provisions. | |
27 | ** This copyright notice is placed here only to protect Sun in the event | |
28 | ** the source is deemed a published work. Disassembly, decompilation, | |
29 | ** or other means of reducing the object code to human readable form | |
30 | ** is prohibited by the license agreement under which this code is | |
31 | ** provided to the user or company in possession of this copy. | |
32 | ** | |
33 | *************************************************************************/ | |
34 | ||
35 | #include "SS_Types.h" | |
36 | #include "SS_Strand.h" | |
37 | #include "SS_TrcExe.h" | |
38 | ||
39 | ||
40 | // trc_exe_passthrough() just invokes the run_exe_table[] function for | |
41 | // a decoded instruction. It is used to populate the trc_exe_table[] | |
42 | // for any entries that do not require tracing. | |
43 | ||
44 | SS_Vaddr trc_exe_passthrough( SS_Vaddr pc, SS_Vaddr npc, SS_Strand* s, SS_Instr* i )/*{{{*/ | |
45 | { | |
46 | SS_Execute exe = s->run_exe_table_ref[i->exe_tbl_idx]; | |
47 | return (*exe)(pc, npc, s, i); | |
48 | } | |
49 | ||
50 | /*}}}*/ | |
51 | // trc_exe_call() handles the call instruction in tracing mode. | |
52 | ||
53 | SS_Vaddr trc_exe_call( SS_Vaddr pc, SS_Vaddr npc, SS_Strand* s, SS_Instr* i )/*{{{*/ | |
54 | { | |
55 | s->sim_state.trap_taken(0); | |
56 | SS_Execute exe = s->run_exe_table_ref[i->exe_tbl_idx]; | |
57 | pc = (*exe)(pc, npc, s, i); | |
58 | if (s->ras_rd && !s->sim_state.trap_taken()) | |
59 | { | |
60 | SS_Vaddr trap_pc = (*s->ras_rd)(pc, npc, s, i, 15); /* %o7 */ | |
61 | if (s->sim_state.trap_taken()) | |
62 | return trap_pc; | |
63 | } | |
64 | return pc; | |
65 | } | |
66 | /*}}}*/ | |
67 | ||
68 | // trc_exe_cas_i0() handles cas*, swap, ldstub instructions in tracing mode | |
69 | // taking two registers in the EA calculation. | |
70 | extern "C" SS_Vaddr trc_exe_cas_i0( SS_Vaddr pc, SS_Vaddr npc, SS_Strand* s, SS_Instr* i)/*{{{*/ | |
71 | { | |
72 | s->sim_state.trap_taken(0); | |
73 | int reg_nr1 = SS_Strand::reg_off2idx(i->rs1); | |
74 | if (s->ras_rs1) | |
75 | { | |
76 | SS_Vaddr trap_pc = (*s->ras_rs1)(pc, npc, s, i, reg_nr1); | |
77 | if (s->sim_state.trap_taken()) | |
78 | return trap_pc; | |
79 | } | |
80 | int reg_nr2 = SS_Strand::reg_off2idx(i->rs2); | |
81 | if (s->ras_rs2) | |
82 | { | |
83 | SS_Vaddr trap_pc = (*s->ras_rs2)(pc, npc, s, i, reg_nr2); | |
84 | if (s->sim_state.trap_taken()) | |
85 | return trap_pc; | |
86 | } | |
87 | int reg_nr3 = SS_Strand::reg_off2idx(i->rd); | |
88 | if (s->ras_rs3) | |
89 | { | |
90 | SS_Vaddr trap_pc = (*s->ras_rs3)(pc, npc, s, i, reg_nr3); | |
91 | if (s->sim_state.trap_taken()) | |
92 | return trap_pc; | |
93 | } | |
94 | SS_Execute exe = s->run_exe_table_ref[i->exe_tbl_idx]; | |
95 | pc = (*exe)(pc, npc, s, i); | |
96 | if (s->ras_rd && !s->sim_state.trap_taken()) | |
97 | { | |
98 | SS_Vaddr trap_pc = (*s->ras_rd)(pc, npc, s, i, SS_Strand::reg_off2idx(i->rd)); | |
99 | if (s->sim_state.trap_taken()) | |
100 | return trap_pc; | |
101 | } | |
102 | return pc; | |
103 | } | |
104 | /*}}}*/ | |
105 | ||
106 | // trc_exe_cas_i1() handles cas*, swap, ldstub instructions in tracing mode | |
107 | // taking a register + immediate in the EA calculation. | |
108 | extern "C" SS_Vaddr trc_exe_cas_i1( SS_Vaddr pc, SS_Vaddr npc, SS_Strand* s, SS_Instr* i)/*{{{*/ | |
109 | { | |
110 | s->sim_state.trap_taken(0); | |
111 | int reg_nr1 = SS_Strand::reg_off2idx(i->rs1); | |
112 | if (s->ras_rs1) | |
113 | { | |
114 | SS_Vaddr trap_pc = (*s->ras_rs1)(pc, npc, s, i, reg_nr1); | |
115 | if (s->sim_state.trap_taken()) | |
116 | return trap_pc; | |
117 | } | |
118 | int reg_nr3 = SS_Strand::reg_off2idx(i->rd); | |
119 | if (s->ras_rs3) | |
120 | { | |
121 | SS_Vaddr trap_pc = (*s->ras_rs3)(pc, npc, s, i, reg_nr3); | |
122 | if (s->sim_state.trap_taken()) | |
123 | return trap_pc; | |
124 | } | |
125 | SS_Execute exe = s->run_exe_table_ref[i->exe_tbl_idx]; | |
126 | pc = (*exe)(pc, npc, s, i); | |
127 | if (s->ras_rd && !s->sim_state.trap_taken()) | |
128 | { | |
129 | SS_Vaddr trap_pc = (*s->ras_rd)(pc, npc, s, i, SS_Strand::reg_off2idx(i->rd)); | |
130 | if (s->sim_state.trap_taken()) | |
131 | return trap_pc; | |
132 | } | |
133 | return pc; | |
134 | } | |
135 | /*}}}*/ | |
136 | ||
137 | // trc_exe_pdist() handles the pdist instruction in tracing mode. | |
138 | extern "C" SS_Vaddr trc_exe_pdist( SS_Vaddr pc, SS_Vaddr npc, SS_Strand* s, SS_Instr* i)/*{{{*/ | |
139 | { | |
140 | s->sim_state.trap_taken(0); | |
141 | int reg_nr1 = SS_Strand::freg_off2idx(i->rs1); | |
142 | if (s->ras_drs1) | |
143 | { | |
144 | SS_Vaddr trap_pc = (*s->ras_drs1)(pc, npc, s, i, reg_nr1); | |
145 | if (s->sim_state.trap_taken()) | |
146 | return trap_pc; | |
147 | } | |
148 | int reg_nr2 = SS_Strand::freg_off2idx(i->rs2); | |
149 | if (s->ras_drs2) | |
150 | { | |
151 | SS_Vaddr trap_pc = (*s->ras_drs2)(pc, npc, s, i, reg_nr2); | |
152 | if (s->sim_state.trap_taken()) | |
153 | return trap_pc; | |
154 | } | |
155 | int reg_nr3 = SS_Strand::freg_off2idx(i->rd); | |
156 | if (s->ras_drs3) | |
157 | { | |
158 | SS_Vaddr trap_pc = (*s->ras_drs3)(pc, npc, s, i, reg_nr3); | |
159 | if (s->sim_state.trap_taken()) | |
160 | return trap_pc; | |
161 | } | |
162 | SS_Execute exe = s->run_exe_table_ref[i->exe_tbl_idx]; | |
163 | pc = (*exe)(pc, npc, s, i); | |
164 | if (s->ras_drd && !s->sim_state.trap_taken()) | |
165 | { | |
166 | SS_Vaddr trap_pc = (*s->ras_drd)(pc, npc, s, i, SS_Strand::freg_off2idx(i->rd)); | |
167 | if (s->sim_state.trap_taken()) | |
168 | return trap_pc; | |
169 | } | |
170 | return pc; | |
171 | } | |
172 | /*}}}*/ |