| 1 | /* %COPYRIGHT% */ |
| 2 | /* @(#)spix_sparc_amodes.h 1.7 */ |
| 3 | |
| 4 | #ifndef spix_sparc_amodes_h_ |
| 5 | #define spix_sparc_amodes_h_ |
| 6 | |
| 7 | |
| 8 | /* |
| 9 | * amode : SPIX_SPARC_AM_CHAR char print single character "char" |
| 10 | * | field format print instruction "field" according to "format" |
| 11 | * | SPIX_SPARC_AM_I0 amode print "amode" if i==0 (register mode) |
| 12 | * | SPIX_SPARC_AM_I1 amode print "amode" if i==1 (immediate mode) |
| 13 | */ |
| 14 | |
| 15 | #define SPIX_SPARC_AM_CHAR '\'' |
| 16 | |
| 17 | #define SPIX_SPARC_AM_I0 ':' |
| 18 | #define SPIX_SPARC_AM_I1 '?' |
| 19 | |
| 20 | /* |
| 21 | * fields |
| 22 | */ |
| 23 | #define SPIX_SPARC_AM_ASI 'a' |
| 24 | #define SPIX_SPARC_AM_DISP22 'B' |
| 25 | #define SPIX_SPARC_AM_DISP30 'C' |
| 26 | #define SPIX_SPARC_AM_IMM22 'i' |
| 27 | #define SPIX_SPARC_AM_RD 'd' |
| 28 | #define SPIX_SPARC_AM_RS1 '1' |
| 29 | #define SPIX_SPARC_AM_RS2 '2' |
| 30 | #define SPIX_SPARC_AM_RS3 '3' |
| 31 | #define SPIX_SPARC_AM_SIMM13 'S' |
| 32 | #define SPIX_SPARC_AM_SHCNT32 '<' |
| 33 | |
| 34 | #define SPIX_SPARC_AM_DISP19 'b' |
| 35 | #define SPIX_SPARC_AM_DISP2_14 'v' |
| 36 | #define SPIX_SPARC_AM_CC12_11 '7' |
| 37 | #define SPIX_SPARC_AM_CC21_20 '8' |
| 38 | #define SPIX_SPARC_AM_CC26_25 '9' |
| 39 | #define SPIX_SPARC_AM_SHCNT64 '>' |
| 40 | #define SPIX_SPARC_AM_SIMM10 'm' |
| 41 | #define SPIX_SPARC_AM_SIMM11 'M' |
| 42 | |
| 43 | /* |
| 44 | * formats |
| 45 | */ |
| 46 | #define SPIX_SPARC_AM_IMM 'u' /* unsigned immediate constant */ |
| 47 | #define SPIX_SPARC_AM_SIMM 's' /* signed immediate constant */ |
| 48 | #define SPIX_SPARC_AM_HI 'h' /* %hi immediate constant */ |
| 49 | #define SPIX_SPARC_AM_REG 'r' /* integer register # */ |
| 50 | #define SPIX_SPARC_AM_FREGS 'f' /* single fp register # */ |
| 51 | #define SPIX_SPARC_AM_FREGD 'd' /* double fp register # */ |
| 52 | #define SPIX_SPARC_AM_FREGQ 'q' /* quad fp register # */ |
| 53 | #define SPIX_SPARC_AM_PC '.' /* pc relative */ |
| 54 | #define SPIX_SPARC_AM_ASR 'a' /* ancillary state register # */ |
| 55 | |
| 56 | #define SPIX_SPARC_AM_ICC 'I' /* integer condition code */ |
| 57 | #define SPIX_SPARC_AM_FCC 'F' /* fp condition code */ |
| 58 | #define SPIX_SPARC_AM_PR 'p' /* privileged register # */ |
| 59 | #define SPIX_SPARC_AM_HPR 'H' /* hyperprivileged register # */ |
| 60 | |
| 61 | /* |
| 62 | ** Return string encoding address modes for given iop. |
| 63 | */ |
| 64 | const char * |
| 65 | spix_sparc_iop_amode(spix_sparc_iop_t iop); |
| 66 | |
| 67 | /* |
| 68 | ** Auxiliary disassembling function |
| 69 | */ |
| 70 | size_t spix_sparc_sdasam ( |
| 71 | char * pbuf, |
| 72 | spix_sparc_inst_t inst, |
| 73 | spix_addr64_t pc, |
| 74 | const char * am); |
| 75 | |
| 76 | |
| 77 | #endif /*amodes_h_*/ |