| 1 | // ========== Copyright Header Begin ========================================== |
| 2 | // |
| 3 | // OpenSPARC T2 Processor File: MemoryAccessEntry.cc |
| 4 | // Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved. |
| 5 | // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES. |
| 6 | // |
| 7 | // The above named program is free software; you can redistribute it and/or |
| 8 | // modify it under the terms of the GNU General Public |
| 9 | // License version 2 as published by the Free Software Foundation. |
| 10 | // |
| 11 | // The above named program is distributed in the hope that it will be |
| 12 | // useful, but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | // General Public License for more details. |
| 15 | // |
| 16 | // You should have received a copy of the GNU General Public |
| 17 | // License along with this work; if not, write to the Free Software |
| 18 | // Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. |
| 19 | // |
| 20 | // ========== Copyright Header End ============================================ |
| 21 | /************************************************************************ |
| 22 | ** |
| 23 | ** Copyright (C) 2002, Sun Microsystems, Inc. |
| 24 | ** |
| 25 | ** Sun considers its source code as an unpublished, proprietary |
| 26 | ** trade secret and it is available only under strict license provisions. |
| 27 | ** This copyright notice is placed here only to protect Sun in the event |
| 28 | ** the source is deemed a published work. Disassembly, decompilation, |
| 29 | ** or other means of reducing the object code to human readable form |
| 30 | ** is prohibited by the license agreement under which this code is |
| 31 | ** provided to the user or company in possession of this copy." |
| 32 | ** |
| 33 | *************************************************************************/ |
| 34 | #include "MemoryAccessEntry.h" |
| 35 | #include <sstream> |
| 36 | |
| 37 | using namespace std; |
| 38 | |
| 39 | //////////////////////////////////////////////// |
| 40 | |
| 41 | uint64_t MemoryAccessEntry::maeid = 0; |
| 42 | |
| 43 | MemoryAccessEntry::MemoryAccessEntry() : |
| 44 | dmaStore(false), |
| 45 | tsize(0), |
| 46 | writeBack(false), |
| 47 | invSet(false) |
| 48 | { |
| 49 | valid_ = true; |
| 50 | vlink_ = false; |
| 51 | acked_ = false; |
| 52 | vlink2_ = false; |
| 53 | |
| 54 | id_ = MemoryAccessEntry::maeid++; |
| 55 | } |
| 56 | |
| 57 | MemoryAccessEntry::MemoryAccessEntry(LoadStoreCmd& cmd) : |
| 58 | dmaStore(false), |
| 59 | tsize(cmd.getTsize()), |
| 60 | writeBack(false), |
| 61 | invSet(false) |
| 62 | { |
| 63 | addr_ = cmd.getAddr(); |
| 64 | data_ = cmd.getData(); |
| 65 | tid_ = cmd.getThrdId(); |
| 66 | cid_ = cmd.getCoreId(); |
| 67 | inv_ = cmd.getInv(); |
| 68 | etype_ = cmd.getCmd(); |
| 69 | itype_ = cmd.getItype(); |
| 70 | dsrc_ = cmd.getDsrc(); |
| 71 | vbyte_ = cmd.getVbyte(); |
| 72 | cacheL1_ = cmd.isCacheL1(); |
| 73 | srcBank_ = cmd.getSrcBank(); |
| 74 | way_ = cmd.getWay(); |
| 75 | set_ = cmd.getSet(); |
| 76 | switchData_ = cmd.isSwitchData(); |
| 77 | cycle_ = cmd.getCycle(); |
| 78 | executed_ = false; |
| 79 | valid_ = true; |
| 80 | vlink_ = false; |
| 81 | vlink2_ = false; |
| 82 | cinv_ = 0; |
| 83 | acked_ = false; |
| 84 | id_ = MemoryAccessEntry::maeid++; |
| 85 | dsrcMid_ = id_; |
| 86 | global_ = id_; |
| 87 | iseq_ = 0; |
| 88 | popped_ = false; |
| 89 | } |
| 90 | //////////////////////////////////////////////// |
| 91 | |
| 92 | MemoryAccessEntry::MemoryAccessEntry( const MemoryAccessEntry & orig ) |
| 93 | { |
| 94 | link_ = orig.link_; |
| 95 | addr_ = orig.addr_; |
| 96 | data_ = orig.data_; |
| 97 | tid_ = orig.tid_; |
| 98 | cid_ = orig.cid_; |
| 99 | inv_ = orig.inv_; |
| 100 | cinv_ = orig.cinv_; |
| 101 | srcBank_ = orig.srcBank_; |
| 102 | way_ = orig.way_; |
| 103 | set_ = orig.set_; |
| 104 | etype_ = orig.etype_; |
| 105 | itype_ = orig.itype_; |
| 106 | dsrc_ = orig.dsrc_; |
| 107 | vbyte_ = orig.vbyte_; |
| 108 | cacheL1_ = orig.cacheL1_; |
| 109 | executed_ = orig.executed_; |
| 110 | valid_ = orig.valid_; |
| 111 | vlink_ = orig.vlink_; |
| 112 | id_ = orig.id_; |
| 113 | acked_ = orig.acked_; |
| 114 | link2_ = orig.link2_; |
| 115 | vlink2_ = orig.vlink2_; |
| 116 | dsrcMid_ = orig.dsrcMid_; |
| 117 | global_ = orig.global_; |
| 118 | iseq_ = orig.iseq_; |
| 119 | switchData_ = orig.switchData_; |
| 120 | popped_ = orig.popped_; |
| 121 | cycle_ = orig.cycle_; |
| 122 | merged_ = orig.merged_; |
| 123 | origData_ = orig.origData_; |
| 124 | origVbyte_ = orig.origVbyte_; |
| 125 | dmaStore = orig.dmaStore; |
| 126 | tsize = orig.tsize; |
| 127 | writeBack = orig.writeBack; |
| 128 | invSet = orig.invSet; |
| 129 | } |
| 130 | |
| 131 | //////////////////////////////////////////////// |
| 132 | |
| 133 | MemoryAccessEntry::~MemoryAccessEntry() |
| 134 | { |
| 135 | } |
| 136 | |
| 137 | //////////////////////////////////////////////// |
| 138 | |
| 139 | const MemoryAccessEntry & |
| 140 | MemoryAccessEntry::operator=( const MemoryAccessEntry & rhs ) |
| 141 | { |
| 142 | // Replace the following line with your function body. |
| 143 | // RIESLING_THROW_DOMAIN_ERROR( "Unimplemented function." ); |
| 144 | |
| 145 | return *this; |
| 146 | } |
| 147 | |
| 148 | //////////////////////////////////////////////// |
| 149 | |
| 150 | bool |
| 151 | MemoryAccessEntry::operator==( const MemoryAccessEntry & rhs ) const |
| 152 | { |
| 153 | // Replace the following line with your function body. |
| 154 | // RIESLING_THROW_DOMAIN_ERROR( "Unimplemented function." ); |
| 155 | return false; |
| 156 | } |
| 157 | |
| 158 | //////////////////////////////////////////////// |
| 159 | |
| 160 | string |
| 161 | MemoryAccessEntry::toString() const |
| 162 | { |
| 163 | ostringstream os; |
| 164 | os << "MAE "; |
| 165 | os << "("; |
| 166 | os << "id=" << dec << id_; |
| 167 | os << " v=" << (int) valid_; |
| 168 | os << " e=" << mmcmd[etype_]; |
| 169 | os << " i=" << mmitype[itype_]; |
| 170 | os << " dsrc=" << mmdsrc[dsrc_]; |
| 171 | os << " cid=" << dec << cid_; |
| 172 | os << " tid=" << dec << tid_; |
| 173 | os << " inv=0x" << hex << inv_; |
| 174 | os << " cinv=0x" << hex << cinv_; |
| 175 | os << " bank=" << dec << srcBank_; |
| 176 | os << " s=" << dec << set_; |
| 177 | os << " w=" << dec << way_; |
| 178 | os << " ack=" << (int) acked_; |
| 179 | os << " a=0x" << hex << addr_; |
| 180 | os << " d=0x" << hex << data_; |
| 181 | os << " vb=0x" << hex << (int) vbyte_; |
| 182 | os << " cas=" << dec << (int) switchData_; |
| 183 | os << " exe=" << dec << (int) executed_; |
| 184 | os << " $=" << dec << (int) cacheL1_; |
| 185 | os << " ds=" << dec << dsrcMid_; |
| 186 | os << " di=" << dec << global_; |
| 187 | os << " iseq=" << dec << iseq_; |
| 188 | os << " pop=" << dec << (int) popped_; |
| 189 | os << " dmaSt=" << dmaStore; |
| 190 | os << " invSet=" << invSet; |
| 191 | os << " tsize=" << dec << tsize; |
| 192 | // if (vlink_) { |
| 193 | // os << " l:id=" << dec << link_->getId(); |
| 194 | // os << " l:e=" << mmcmd[link_->getEntryType()]; |
| 195 | // os << " l:tid=" << link_->getThrdId(); |
| 196 | // os << " l:a=0x" << hex << link_->getAddr(); |
| 197 | // os << " l:d=0x" << hex << link_->getData(); |
| 198 | // } |
| 199 | os << " cycle=" << dec << cycle_; |
| 200 | os << ")"; |
| 201 | os << endl; |
| 202 | |
| 203 | return os.str(); |
| 204 | } |
| 205 | |
| 206 | |
| 207 | |