| 1 | /* |
| 2 | * ========== Copyright Header Begin ========================================== |
| 3 | * |
| 4 | * OpenSPARC T2 Processor File: SS_MemErrDetector.h |
| 5 | * Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved. |
| 6 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES. |
| 7 | * |
| 8 | * The above named program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public |
| 10 | * License version 2 as published by the Free Software Foundation. |
| 11 | * |
| 12 | * The above named program is distributed in the hope that it will be |
| 13 | * useful, but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 15 | * General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public |
| 18 | * License along with this work; if not, write to the Free Software |
| 19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. |
| 20 | * |
| 21 | * ========== Copyright Header End ============================================ |
| 22 | */ |
| 23 | #ifndef _SS_MEMERRDETECTOR_H |
| 24 | #define _SS_MEMERRDETECTOR_H |
| 25 | /************************************************************************ |
| 26 | ** |
| 27 | ** Copyright (C) 2006, Sun Microsystems, Inc. |
| 28 | ** |
| 29 | ** Sun considers its source code as an unpublished, proprietary |
| 30 | ** trade secret and it is available only under strict license provisions. |
| 31 | ** This copyright notice is placed here only to protect Sun in the event |
| 32 | ** the source is deemed a published work. Disassembly, decompilation, |
| 33 | ** or other means of reducing the object code to human readable form |
| 34 | ** is prohibited by the license agreement under which this code is |
| 35 | ** provided to the user or company in possession of this copy. |
| 36 | ** |
| 37 | *************************************************************************/ |
| 38 | #include <iostream> |
| 39 | #include <string> |
| 40 | #include <map> |
| 41 | #include "SS_Trap.h" |
| 42 | #include "BL_Memory.h" |
| 43 | #include "MemoryTransaction.h" // move to N2_MemErrDetector? |
| 44 | |
| 45 | |
| 46 | /** |
| 47 | * The MemErrDetector class is a abstract base class used to |
| 48 | * model and detect errors in the memory hierarchy for RAS. |
| 49 | */ |
| 50 | |
| 51 | class SS_MemErrDetector { |
| 52 | |
| 53 | public: |
| 54 | |
| 55 | SS_MemErrDetector::SS_MemErrDetector() : |
| 56 | memory(0), |
| 57 | step_hook(0), |
| 58 | tick_err_detector(0) |
| 59 | {} |
| 60 | |
| 61 | // enum to define the memory hierarchy level |
| 62 | enum MemoryLevel |
| 63 | { |
| 64 | L1_CACHE_AND_STB, // primary cache and store buffer |
| 65 | L2_CACHE, // secondary cache |
| 66 | MEMORY // memory (if needed) |
| 67 | }; |
| 68 | |
| 69 | // enum to define the cache type, instruction or data |
| 70 | enum CacheType |
| 71 | { |
| 72 | INSTR_CACHE, // instruction cache |
| 73 | DATA_CACHE // data cache |
| 74 | }; |
| 75 | |
| 76 | // detect_fetch_err() checks for memory hierarchy RAS errors due |
| 77 | // to instruction fetchs. If it throw a precise trap, it returns |
| 78 | // the trap number, else 0. |
| 79 | virtual SS_Trap::Type detect_fetch_err( MemoryLevel level, |
| 80 | SS_Vaddr pc, SS_Vaddr npc, |
| 81 | SS_Strand* s, |
| 82 | SS_Paddr pa) = 0; |
| 83 | |
| 84 | // detect_load_err() checks for memory hierarchy RAS errors due to |
| 85 | // data loads and the load half of atomics. If it throw a precise |
| 86 | // trap, it returns the trap number, else 0. |
| 87 | virtual SS_Trap::Type detect_load_err( MemoryLevel level, |
| 88 | SS_Vaddr pc, SS_Vaddr npc, |
| 89 | SS_Strand* s, SS_Instr* line, |
| 90 | SS_Paddr pa) = 0; |
| 91 | |
| 92 | // inject_store_err() injects errors into memory hierarchy RAS |
| 93 | // errors caused by data stores and the store half of atomics. If |
| 94 | // it throw a precise trap, it returns the trap number, else 0. |
| 95 | virtual SS_Trap::Type inject_store_err( MemoryLevel level, |
| 96 | SS_Vaddr pc, SS_Vaddr npc, |
| 97 | SS_Strand* s, SS_Instr* line, |
| 98 | SS_Paddr pa, |
| 99 | uint64_t data) = 0; |
| 100 | |
| 101 | // ras_flush() is called from the flush instruction execution code |
| 102 | // to invalidate data in RAS related cache models if a flush |
| 103 | // instrucion is executed |
| 104 | virtual SS_Trap::Type ras_flush( SS_Vaddr pc, SS_Vaddr npc, |
| 105 | SS_Strand* s, |
| 106 | SS_Instr* line, |
| 107 | SS_Paddr pa, |
| 108 | uint64_t size, |
| 109 | CacheType type) = 0; |
| 110 | |
| 111 | // ras_flush() is called by SS_Model/SS_Cpu to flush RAS related |
| 112 | // cache models if a flush instrucion is executed |
| 113 | virtual void ras_flush( SS_Strand*s, SS_Strand* requesting_strand, SS_Paddr pa, uint64_t size, CacheType type) = 0; |
| 114 | |
| 115 | // Routines for controlling debugging output |
| 116 | // Typically used to toggle output from the UI via SWIG |
| 117 | virtual void start_debug_output() {} |
| 118 | virtual void stop_debug_output() {} |
| 119 | |
| 120 | SS_Trap::Type (*step_hook)(SS_Strand* s); |
| 121 | bool (*tick_err_detector)(SS_Strand* s); |
| 122 | |
| 123 | // Returns a formatted string containing all I$ information about a paddr. |
| 124 | virtual char* icache_info(SS_Paddr pa, SS_Strand* strand) { return (char*)""; } |
| 125 | |
| 126 | // Returns a formatted string containing all I$ information about a set. |
| 127 | virtual char* icache_set(uint_t set, SS_Strand* strand) |
| 128 | { |
| 129 | return (char*)"Not Implemented"; |
| 130 | } |
| 131 | |
| 132 | // Returns a formatted string containing all D$ information about a set. |
| 133 | virtual char* dcache_set(uint_t set, SS_Strand* strand) |
| 134 | { |
| 135 | return (char*)"Not Implemented"; |
| 136 | } |
| 137 | |
| 138 | // Returns a formatted string containing all L2$ information about a set. |
| 139 | virtual char* l2cache_set(uint_t set, SS_Strand* strand) |
| 140 | { |
| 141 | return (char*)"Not Implemented"; |
| 142 | } |
| 143 | |
| 144 | // Returns a formatted string containing all L2$ information about a set |
| 145 | // in a bank |
| 146 | virtual char* l2cache_set(uint_t bank, uint_t set, SS_Strand* strand) |
| 147 | { |
| 148 | return (char*)"Not Implemented"; |
| 149 | } |
| 150 | |
| 151 | BL_Memory* memory; // the memory object |
| 152 | }; |
| 153 | |
| 154 | #endif /* _SS_MEMERRDETECTOR_H */ |