<!-- interpreter=xml2reg args='-t' -->
<register name=
"SOC_ERROR_STEERING_REG (SOC_ERROR_STEERING_REG)">
<class_name>N2_SocErrorSteeringReg
</class_name>
<submodule>N2
</submodule>
SOC Error Steering Register. This register controls which virtual core
will be sent SOC error interrupts. TABLE
12-
53 shows the format of
the SOC Error Steering Register. TABLE
12-
53 SOC Error Steering Register - SOC_ERROR_STEERING_REG (
0x90-
0104-
1000)
<base_address>0x9001041000ULL
</base_address>
<start_offset>6</start_offset>
<end_offset>63</end_offset>
<initial_value>0</initial_value>
<protection>RO
</protection>
<field_type>ZERO
</field_type>
<start_offset>0</start_offset>
<end_offset>5</end_offset>
<initial_value>0</initial_value>
<protection>RW
</protection>
<field_type>NORMAL
</field_type>
ID of virtual core that will be the target of SOC error interrupts.