| 1 | // (c) 2020 Aaron Taylor <ataylor at subgeniuskitty dot com> |
| 2 | // See LICENSE.txt file for copyright and license details. |
| 3 | |
| 4 | #ifndef SGK_PDP11_REGISTER_H |
| 5 | #define SGK_PDP11_REGISTER_H |
| 6 | |
| 7 | |
| 8 | /* |
| 9 | * ============================================================================= |
| 10 | * Register Access Macros |
| 11 | * ============================================================================= |
| 12 | */ |
| 13 | |
| 14 | /* |
| 15 | * Use these macros along with the register address/field definitions in this |
| 16 | * file to get/set memory mapped registers. |
| 17 | * |
| 18 | * For example: |
| 19 | * SET(KISDR2,PDR_PAGELEN,0100); |
| 20 | * SET(MMR3,MMR3_EN_22BIT,1); |
| 21 | * uint16_t value = GET(PSW,PSW_REGSET); |
| 22 | */ |
| 23 | |
| 24 | #define GET(reg,regspec) GET_EXPANDED(reg,regspec) |
| 25 | #define GET_EXPANDED(reg,mask,offset) ((reg & (mask << offset)) >> offset) |
| 26 | |
| 27 | #define SET(reg,regspec,value) SET_EXPANDED(reg,regspec,value) |
| 28 | #define SET_EXPANDED(reg,mask,offset,value) (reg = ((reg & (~(mask << offset))) | (value << offset))) |
| 29 | |
| 30 | |
| 31 | /* |
| 32 | * ============================================================================= |
| 33 | * Register Address Definitions |
| 34 | * ============================================================================= |
| 35 | */ |
| 36 | |
| 37 | // Register names correspond to KDJ11-B User Guide (EK-KDJ1B-UG). |
| 38 | // http://bitsavers.org/pdf/dec/pdp11/1173/EK-KDJ1B-UG_KDJ11-B_Nov86.pdf |
| 39 | |
| 40 | /* CPU */ |
| 41 | |
| 42 | #define PSW (*((volatile uint16_t *)0177776)) |
| 43 | #define PIRQ (*((volatile uint16_t *)0177772)) |
| 44 | #define CPUERR (*((volatile uint16_t *)0177766)) |
| 45 | |
| 46 | /* MMU */ |
| 47 | |
| 48 | #define MMR0 (*((volatile uint16_t *)0177572)) |
| 49 | #define MMR1 (*((volatile uint16_t *)0177574)) |
| 50 | #define MMR2 (*((volatile uint16_t *)0177576)) |
| 51 | #define MMR3 (*((volatile uint16_t *)0172516)) |
| 52 | |
| 53 | #define UISDR0 (*((volatile uint16_t *)0177600)) |
| 54 | #define UISDR1 (*((volatile uint16_t *)0177602)) |
| 55 | #define UISDR2 (*((volatile uint16_t *)0177604)) |
| 56 | #define UISDR3 (*((volatile uint16_t *)0177606)) |
| 57 | #define UISDR4 (*((volatile uint16_t *)0177610)) |
| 58 | #define UISDR5 (*((volatile uint16_t *)0177612)) |
| 59 | #define UISDR6 (*((volatile uint16_t *)0177614)) |
| 60 | #define UISDR7 (*((volatile uint16_t *)0177616)) |
| 61 | |
| 62 | #define UDSDR0 (*((volatile uint16_t *)0177620)) |
| 63 | #define UDSDR1 (*((volatile uint16_t *)0177622)) |
| 64 | #define UDSDR2 (*((volatile uint16_t *)0177624)) |
| 65 | #define UDSDR3 (*((volatile uint16_t *)0177626)) |
| 66 | #define UDSDR4 (*((volatile uint16_t *)0177630)) |
| 67 | #define UDSDR5 (*((volatile uint16_t *)0177632)) |
| 68 | #define UDSDR6 (*((volatile uint16_t *)0177634)) |
| 69 | #define UDSDR7 (*((volatile uint16_t *)0177636)) |
| 70 | |
| 71 | #define UISAR0 (*((volatile uint16_t *)0177640)) |
| 72 | #define UISAR1 (*((volatile uint16_t *)0177642)) |
| 73 | #define UISAR2 (*((volatile uint16_t *)0177644)) |
| 74 | #define UISAR3 (*((volatile uint16_t *)0177646)) |
| 75 | #define UISAR4 (*((volatile uint16_t *)0177650)) |
| 76 | #define UISAR5 (*((volatile uint16_t *)0177652)) |
| 77 | #define UISAR6 (*((volatile uint16_t *)0177654)) |
| 78 | #define UISAR7 (*((volatile uint16_t *)0177656)) |
| 79 | |
| 80 | #define UDSAR0 (*((volatile uint16_t *)0177660)) |
| 81 | #define UDSAR1 (*((volatile uint16_t *)0177662)) |
| 82 | #define UDSAR2 (*((volatile uint16_t *)0177664)) |
| 83 | #define UDSAR3 (*((volatile uint16_t *)0177666)) |
| 84 | #define UDSAR4 (*((volatile uint16_t *)0177670)) |
| 85 | #define UDSAR5 (*((volatile uint16_t *)0177672)) |
| 86 | #define UDSAR6 (*((volatile uint16_t *)0177674)) |
| 87 | #define UDSAR7 (*((volatile uint16_t *)0177676)) |
| 88 | |
| 89 | #define SISDR0 (*((volatile uint16_t *)0172200)) |
| 90 | #define SISDR1 (*((volatile uint16_t *)0172202)) |
| 91 | #define SISDR2 (*((volatile uint16_t *)0172204)) |
| 92 | #define SISDR3 (*((volatile uint16_t *)0172206)) |
| 93 | #define SISDR4 (*((volatile uint16_t *)0172210)) |
| 94 | #define SISDR5 (*((volatile uint16_t *)0172212)) |
| 95 | #define SISDR6 (*((volatile uint16_t *)0172214)) |
| 96 | #define SISDR7 (*((volatile uint16_t *)0172216)) |
| 97 | |
| 98 | #define SDSDR0 (*((volatile uint16_t *)0172220)) |
| 99 | #define SDSDR1 (*((volatile uint16_t *)0172222)) |
| 100 | #define SDSDR2 (*((volatile uint16_t *)0172224)) |
| 101 | #define SDSDR3 (*((volatile uint16_t *)0172226)) |
| 102 | #define SDSDR4 (*((volatile uint16_t *)0172230)) |
| 103 | #define SDSDR5 (*((volatile uint16_t *)0172232)) |
| 104 | #define SDSDR6 (*((volatile uint16_t *)0172234)) |
| 105 | #define SDSDR7 (*((volatile uint16_t *)0172236)) |
| 106 | |
| 107 | #define SISAR0 (*((volatile uint16_t *)0172240)) |
| 108 | #define SISAR1 (*((volatile uint16_t *)0172242)) |
| 109 | #define SISAR2 (*((volatile uint16_t *)0172244)) |
| 110 | #define SISAR3 (*((volatile uint16_t *)0172246)) |
| 111 | #define SISAR4 (*((volatile uint16_t *)0172250)) |
| 112 | #define SISAR5 (*((volatile uint16_t *)0172252)) |
| 113 | #define SISAR6 (*((volatile uint16_t *)0172254)) |
| 114 | #define SISAR7 (*((volatile uint16_t *)0172256)) |
| 115 | |
| 116 | #define SDSAR0 (*((volatile uint16_t *)0172260)) |
| 117 | #define SDSAR1 (*((volatile uint16_t *)0172262)) |
| 118 | #define SDSAR2 (*((volatile uint16_t *)0172264)) |
| 119 | #define SDSAR3 (*((volatile uint16_t *)0172266)) |
| 120 | #define SDSAR4 (*((volatile uint16_t *)0172270)) |
| 121 | #define SDSAR5 (*((volatile uint16_t *)0172272)) |
| 122 | #define SDSAR6 (*((volatile uint16_t *)0172274)) |
| 123 | #define SDSAR7 (*((volatile uint16_t *)0172276)) |
| 124 | |
| 125 | #define KISDR0 (*((volatile uint16_t *)0172300)) |
| 126 | #define KISDR1 (*((volatile uint16_t *)0172302)) |
| 127 | #define KISDR2 (*((volatile uint16_t *)0172304)) |
| 128 | #define KISDR3 (*((volatile uint16_t *)0172306)) |
| 129 | #define KISDR4 (*((volatile uint16_t *)0172310)) |
| 130 | #define KISDR5 (*((volatile uint16_t *)0172312)) |
| 131 | #define KISDR6 (*((volatile uint16_t *)0172314)) |
| 132 | #define KISDR7 (*((volatile uint16_t *)0172316)) |
| 133 | |
| 134 | #define KDSDR0 (*((volatile uint16_t *)0172320)) |
| 135 | #define KDSDR1 (*((volatile uint16_t *)0172322)) |
| 136 | #define KDSDR2 (*((volatile uint16_t *)0172324)) |
| 137 | #define KDSDR3 (*((volatile uint16_t *)0172326)) |
| 138 | #define KDSDR4 (*((volatile uint16_t *)0172330)) |
| 139 | #define KDSDR5 (*((volatile uint16_t *)0172332)) |
| 140 | #define KDSDR6 (*((volatile uint16_t *)0172334)) |
| 141 | #define KDSDR7 (*((volatile uint16_t *)0172336)) |
| 142 | |
| 143 | |
| 144 | #define KISAR0 (*((volatile uint16_t *)0172340)) |
| 145 | #define KISAR1 (*((volatile uint16_t *)0172342)) |
| 146 | #define KISAR2 (*((volatile uint16_t *)0172344)) |
| 147 | #define KISAR3 (*((volatile uint16_t *)0172346)) |
| 148 | #define KISAR4 (*((volatile uint16_t *)0172350)) |
| 149 | #define KISAR5 (*((volatile uint16_t *)0172352)) |
| 150 | #define KISAR6 (*((volatile uint16_t *)0172354)) |
| 151 | #define KISAR7 (*((volatile uint16_t *)0172356)) |
| 152 | |
| 153 | #define KDSAR0 (*((volatile uint16_t *)0172360)) |
| 154 | #define KDSAR1 (*((volatile uint16_t *)0172362)) |
| 155 | #define KDSAR2 (*((volatile uint16_t *)0172364)) |
| 156 | #define KDSAR3 (*((volatile uint16_t *)0172366)) |
| 157 | #define KDSAR4 (*((volatile uint16_t *)0172370)) |
| 158 | #define KDSAR5 (*((volatile uint16_t *)0172372)) |
| 159 | #define KDSAR6 (*((volatile uint16_t *)0172374)) |
| 160 | #define KDSAR7 (*((volatile uint16_t *)0172376)) |
| 161 | |
| 162 | |
| 163 | /* |
| 164 | * ============================================================================= |
| 165 | * Register Field Definitions |
| 166 | * ============================================================================= |
| 167 | */ |
| 168 | |
| 169 | /* |
| 170 | * These take the form of "(width),(offset)". For example, if a field is |
| 171 | * 4-bits wide and occupies bits 2-5 (starting from 0), then it would be |
| 172 | * defined as "(017),(2)". |
| 173 | */ |
| 174 | |
| 175 | #define MMR0_AB_NONRES (01),(15) |
| 176 | #define MMR0_AB_PAGLEN (01),(14) |
| 177 | #define MMR0_AB_RO (01),(13) |
| 178 | #define MMR0_PG_MODE (03),(5) |
| 179 | #define MMR0_PG_SPLTID (01),(4) |
| 180 | #define MMR0_PG_NUMBER (07),(1) |
| 181 | #define MMR0_EN_MMU (01),(0) |
| 182 | |
| 183 | #define MMR1_A_CHANGE (037),(11) |
| 184 | #define MMR1_A_REGSTR (07),(8) |
| 185 | #define MMR1_B_CHANGE (037),(3) |
| 186 | #define MMR1_B_REGSTR (07),(0) |
| 187 | |
| 188 | #define MMR2_PC (0177777),(0) |
| 189 | |
| 190 | #define MMR3_EN_22BIT (01),(4) |
| 191 | #define MMR3_EN_CSMINS (01),(3) |
| 192 | #define MMR3_KRNSPLTID (01),(2) |
| 193 | #define MMR3_SUPSPLTID (01),(1) |
| 194 | #define MMR3_USRSPLTID (01),(0) |
| 195 | |
| 196 | #define PAR_PAF (0177777),(0) |
| 197 | |
| 198 | #define PDR_BYPASCACHE (01),(15) |
| 199 | #define PDR_PAGELEN (0177),(8) |
| 200 | #define PDR_PAGEWRITEN (01),(6) |
| 201 | #define PDR_EXPANDDIR (01),(3) |
| 202 | #define PDR_ACCESSCTRL (03),(1) |
| 203 | |
| 204 | |
| 205 | #endif // SGK_PDP11_REGISTER_H |