Commit | Line | Data |
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7c77452d KM |
1 | /* Copyright (c) 1984 Regents of the University of California */ |
2 | ||
2a48bcf5 | 3 | #ifndef lint |
cc385f63 | 4 | static char sccsid[] = "@(#)langpats.c 2.8 (Berkeley) %G%"; |
2a48bcf5 SL |
5 | #endif |
6 | ||
7c77452d | 7 | #include "inline.h" |
2a48bcf5 SL |
8 | |
9 | /* | |
7c77452d KM |
10 | * Pattern table for kernel specific routines. |
11 | * These patterns are based on the old asm.sed script. | |
2a48bcf5 | 12 | */ |
7c77452d | 13 | struct pats language_ptab[] = { |
2a48bcf5 | 14 | |
7c77452d KM |
15 | #ifdef vax |
16 | { "0,_spl0\n", | |
2a48bcf5 SL |
17 | " mfpr $18,r0\n\ |
18 | mtpr $0,$18\n" }, | |
19 | ||
7c77452d | 20 | { "0,_spl1\n", |
2a48bcf5 SL |
21 | " mfpr $18,r0\n\ |
22 | mtpr $1,$18\n" }, | |
23 | ||
7c77452d | 24 | { "0,_splsoftclock\n", |
2a48bcf5 SL |
25 | " mfpr $18,r0\n\ |
26 | mtpr $0x8,$18\n" }, | |
27 | ||
7c77452d | 28 | { "0,_splnet\n", |
2a48bcf5 SL |
29 | " mfpr $18,r0\n\ |
30 | mtpr $0xc,$18\n" }, | |
31 | ||
7c77452d | 32 | { "0,_splimp\n", |
2a48bcf5 SL |
33 | " mfpr $18,r0\n\ |
34 | mtpr $0x16,$18\n" }, | |
35 | ||
7c77452d | 36 | { "0,_spl4\n", |
2a48bcf5 SL |
37 | " mfpr $18,r0\n\ |
38 | mtpr $0x14,$18\n" }, | |
39 | ||
7c77452d | 40 | { "0,_splbio\n", |
2a48bcf5 SL |
41 | " mfpr $18,r0\n\ |
42 | mtpr $0x15,$18\n" }, | |
43 | ||
7c77452d | 44 | { "0,_spltty\n", |
2a48bcf5 SL |
45 | " mfpr $18,r0\n\ |
46 | mtpr $0x15,$18\n" }, | |
2a48bcf5 | 47 | |
7c77452d | 48 | { "0,_spl5\n", |
2a48bcf5 SL |
49 | " mfpr $18,r0\n\ |
50 | mtpr $0x15,$18\n" }, | |
51 | ||
7c77452d | 52 | { "0,_splclock\n", |
2a48bcf5 SL |
53 | " mfpr $18,r0\n\ |
54 | mtpr $0x18,$18\n" }, | |
55 | ||
7c77452d | 56 | { "0,_spl6\n", |
2a48bcf5 SL |
57 | " mfpr $18,r0\n\ |
58 | mtpr $0x18,$18\n" }, | |
59 | ||
f5649c72 | 60 | { "0,_splhigh\n", |
2a48bcf5 SL |
61 | " mfpr $18,r0\n\ |
62 | mtpr $0x1f,$18\n" }, | |
63 | ||
92d94671 | 64 | { "0,_spl7\n", |
6a1722ed MK |
65 | " mfpr $18,r0\n\ |
66 | mtpr $0x1f,$18\n" }, | |
67 | ||
7c77452d KM |
68 | { "1,_splx\n", |
69 | " movl (sp)+,r1\n\ | |
70 | mfpr $18,r0\n\ | |
71 | mtpr r1,$18\n" }, | |
2a48bcf5 | 72 | |
7c77452d KM |
73 | { "1,_mfpr\n", |
74 | " movl (sp)+,r5\n\ | |
75 | mfpr r5,r0\n" }, | |
2a48bcf5 | 76 | |
7c77452d KM |
77 | { "2,_mtpr\n", |
78 | " movl (sp)+,r4\n\ | |
79 | movl (sp)+,r5\n\ | |
80 | mtpr r5,r4\n" }, | |
2a48bcf5 | 81 | |
7c77452d | 82 | { "0,_setsoftclock\n", |
2a48bcf5 SL |
83 | " mtpr $0x8,$0x14\n" }, |
84 | ||
7c77452d KM |
85 | { "1,_resume\n", |
86 | " movl (sp)+,r5\n\ | |
87 | ashl $9,r5,r0\n\ | |
88 | movpsl -(sp)\n\ | |
2a48bcf5 SL |
89 | jsb _Resume\n" }, |
90 | ||
7c77452d | 91 | { "3,_copyin\n", |
af0d1cb8 KM |
92 | " movl (sp)+,r1\n\ |
93 | movl (sp)+,r3\n\ | |
94 | movl (sp)+,r5\n\ | |
95 | jsb _Copyin\n" }, | |
2a48bcf5 | 96 | |
7c77452d | 97 | { "3,_copyout\n", |
af0d1cb8 KM |
98 | " movl (sp)+,r1\n\ |
99 | movl (sp)+,r3\n\ | |
100 | movl (sp)+,r5\n\ | |
101 | jsb _Copyout\n" }, | |
2a48bcf5 | 102 | |
7c77452d | 103 | { "1,_fubyte\n", |
2a48bcf5 SL |
104 | " movl (sp)+,r0\n\ |
105 | jsb _Fubyte\n" }, | |
106 | ||
7c77452d KM |
107 | { "1,_fuibyte\n", |
108 | " movl (sp)+,r0\n\ | |
2a48bcf5 SL |
109 | jsb _Fubyte\n" }, |
110 | ||
7c77452d KM |
111 | { "1,_fuword\n", |
112 | " movl (sp)+,r0\n\ | |
2a48bcf5 SL |
113 | jsb _Fuword\n" }, |
114 | ||
7c77452d KM |
115 | { "1,_fuiword\n", |
116 | " movl (sp)+,r0\n\ | |
2a48bcf5 SL |
117 | jsb _Fuword\n" }, |
118 | ||
7c77452d | 119 | { "2,_subyte\n", |
2a48bcf5 SL |
120 | " movl (sp)+,r0\n\ |
121 | movl (sp)+,r1\n\ | |
122 | jsb _Subyte\n" }, | |
123 | ||
7c77452d KM |
124 | { "2,_suibyte\n", |
125 | " movl (sp)+,r0\n\ | |
2a48bcf5 SL |
126 | movl (sp)+,r1\n\ |
127 | jsb _Subyte\n" }, | |
128 | ||
7c77452d KM |
129 | { "2,_suword\n", |
130 | " movl (sp)+,r0\n\ | |
2a48bcf5 SL |
131 | movl (sp)+,r1\n\ |
132 | jsb _Suword\n" }, | |
133 | ||
7c77452d KM |
134 | { "2,_suiword\n", |
135 | " movl (sp)+,r0\n\ | |
2a48bcf5 SL |
136 | movl (sp)+,r1\n\ |
137 | jsb _Suword\n" }, | |
138 | ||
7c77452d KM |
139 | { "1,_setrq\n", |
140 | " movl (sp)+,r0\n\ | |
2a48bcf5 SL |
141 | jsb _Setrq\n" }, |
142 | ||
7c77452d KM |
143 | { "1,_remrq\n", |
144 | " movl (sp)+,r0\n\ | |
2a48bcf5 SL |
145 | jsb _Remrq\n" }, |
146 | ||
7c77452d | 147 | { "0,_swtch\n", |
2a48bcf5 SL |
148 | " movpsl -(sp)\n\ |
149 | jsb _Swtch\n" }, | |
150 | ||
7c77452d KM |
151 | { "1,_setjmp\n", |
152 | " movl (sp)+,r1\n\ | |
153 | clrl r0\n\ | |
154 | movl fp,(r1)+\n\ | |
7a619593 | 155 | moval 1(pc),(r1)\n" }, |
2a48bcf5 | 156 | |
7c77452d KM |
157 | { "1,_longjmp\n", |
158 | " movl (sp)+,r0\n\ | |
2a48bcf5 SL |
159 | jsb _Longjmp\n" }, |
160 | ||
7c77452d | 161 | { "1,_ffs\n", |
2a48bcf5 | 162 | " movl (sp)+,r1\n\ |
7c77452d KM |
163 | ffs $0,$32,r1,r0\n\ |
164 | bneq 1f\n\ | |
165 | mnegl $1,r0\n\ | |
166 | 1:\n\ | |
2a48bcf5 SL |
167 | incl r0\n" }, |
168 | ||
7c77452d KM |
169 | { "1,_htons\n", |
170 | " movl (sp)+,r5\n\ | |
171 | rotl $8,r5,r0\n\ | |
a2231391 KM |
172 | rotl $-8,r5,r1\n\ |
173 | movb r1,r0\n\ | |
7c77452d KM |
174 | movzwl r0,r0\n" }, |
175 | ||
176 | { "1,_ntohs\n", | |
177 | " movl (sp)+,r5\n\ | |
a2231391 KM |
178 | rotl $8,r5,r0\n\ |
179 | rotl $-8,r5,r1\n\ | |
180 | movb r1,r0\n\ | |
7c77452d KM |
181 | movzwl r0,r0\n" }, |
182 | ||
183 | { "1,_htonl\n", | |
184 | " movl (sp)+,r5\n\ | |
a2231391 | 185 | rotl $-8,r5,r0\n\ |
2a48bcf5 | 186 | insv r0,$16,$8,r0\n\ |
a2231391 KM |
187 | rotl $8,r5,r1\n\ |
188 | movb r1,r0\n" }, | |
2a48bcf5 | 189 | |
7c77452d KM |
190 | { "1,_ntohl\n", |
191 | " movl (sp)+,r5\n\ | |
a2231391 | 192 | rotl $-8,r5,r0\n\ |
2a48bcf5 | 193 | insv r0,$16,$8,r0\n\ |
a2231391 KM |
194 | rotl $8,r5,r1\n\ |
195 | movb r1,r0\n" }, | |
2a48bcf5 | 196 | |
7c77452d KM |
197 | { "2,__insque\n", |
198 | " movl (sp)+,r4\n\ | |
199 | movl (sp)+,r5\n\ | |
200 | insque (r4),(r5)\n" }, | |
2a48bcf5 | 201 | |
7c77452d KM |
202 | { "1,__remque\n", |
203 | " movl (sp)+,r5\n\ | |
204 | remque (r5),r0\n" }, | |
2a48bcf5 | 205 | |
7c77452d | 206 | { "2,__queue\n", |
2a48bcf5 SL |
207 | " movl (sp)+,r0\n\ |
208 | movl (sp)+,r1\n\ | |
06b6c74a | 209 | insque (r1),*4(r0)\n" }, |
2a48bcf5 | 210 | |
7c77452d | 211 | { "1,__dequeue\n", |
2a48bcf5 SL |
212 | " movl (sp)+,r0\n\ |
213 | remque *(r0),r0\n" }, | |
52eb78c8 KM |
214 | |
215 | { "2,_imin\n", | |
216 | " movl (sp)+,r0\n\ | |
217 | movl (sp)+,r5\n\ | |
218 | cmpl r0,r5\n\ | |
219 | bleq 1f\n\ | |
220 | movl r5,r0\n\ | |
221 | 1:\n" }, | |
222 | ||
223 | { "2,_imax\n", | |
224 | " movl (sp)+,r0\n\ | |
225 | movl (sp)+,r5\n\ | |
226 | cmpl r0,r5\n\ | |
227 | bgeq 1f\n\ | |
228 | movl r5,r0\n\ | |
229 | 1:\n" }, | |
230 | ||
231 | { "2,_min\n", | |
232 | " movl (sp)+,r0\n\ | |
233 | movl (sp)+,r5\n\ | |
234 | cmpl r0,r5\n\ | |
235 | blequ 1f\n\ | |
236 | movl r5,r0\n\ | |
237 | 1:\n" }, | |
238 | ||
239 | { "2,_max\n", | |
240 | " movl (sp)+,r0\n\ | |
241 | movl (sp)+,r5\n\ | |
242 | cmpl r0,r5\n\ | |
243 | bgequ 1f\n\ | |
244 | movl r5,r0\n\ | |
245 | 1:\n" }, | |
7c77452d KM |
246 | #endif vax |
247 | ||
248 | #ifdef mc68000 | |
249 | /* someday... */ | |
250 | #endif mc68000 | |
251 | ||
252 | { "", "" } | |
2a48bcf5 | 253 | }; |