Commit | Line | Data |
---|---|---|
d52f1552 TL |
1 | /* |
2 | * MBA definitions | |
3 | */ | |
4 | /* | |
5 | * register offsets | |
6 | */ | |
7 | # define M_csr 0 /* configuration/staus reg */ | |
8 | # define M_cr 1 /* control reg */ | |
9 | # define M_sr 2 /* status reg */ | |
10 | # define M_var 3 /* virtual address reg */ | |
11 | # define M_bc 4 /* byte count reg */ | |
12 | # define M_map 0x200 /* start of map regs-longword offset */ | |
13 | /* | |
14 | * misc | |
15 | */ | |
16 | # define M_BASE 0x20010000 /* phys addr MBA 0 */ | |
17 | # define NEXSPC 0x2000 /* no.bytes/NEXUS space */ | |
18 | # define MAXMBA 4 /* max. no. of MBA's */ | |
19 | # define MBAinit 1 /* MBA init in cr */ | |
20 | # define M_extern 0x400 /* offset from MBA base to extern reg's */ | |
21 | # define EXTSIZ 0x80 /* extern reg space size/device */ | |
22 | # define M_BCMAX 65536 /* max byte transfer by MBA */ | |
23 | /* | |
24 | * Status Reg | |
25 | */ | |
26 | # define M_RDT 1 /* Read Data Timeout */ | |
27 | # define M_IST 2 /* Interface Sequence Timeout */ | |
28 | # define M_RDS 4 /* Read Data Substitute */ | |
29 | # define M_EC 8 /* Error Confirmation */ | |
30 | # define M_IM 0x10 /* Invalid Map */ | |
31 | # define M_MPE 0x20 /* Map Parity Error */ | |
32 | # define M_MDPE 0x40 /* Massbus Data Parity Error */ | |
33 | # define M_ME 0x80 /* Massbus Exception */ | |
34 | # define M_MT 0x100 /* Missed Transfer */ | |
35 | # define M_WCKL 0x200 /* Write Check Lower */ | |
36 | # define M_WCKU 0x400 /* Write Check Upper */ | |
37 | # define M_DTL 0x800 /* Data Transfer Late */ | |
38 | # define M_DTA 0x1000 /* Data Transfer Abort */ | |
39 | # define M_DTC 0x2000 /* Data Transfer Complete */ | |
40 | # define M_MA 0x10000 /* Massbus Attention */ | |
41 | # define M_MCPE 0x20000 /* Massbus Control Parity Error */ | |
42 | # define M_NED 0x40000 /* Non-Existent Drive */ | |
43 | # define M_PE 0x80000 /* Programming Error */ | |
44 | # define M_CRD 0x20000000 /* Corrected Read Data */ | |
45 | # define M_NRC 0x40000000 /* No Response Confirmation */ | |
46 | # define M_DTB 0x80000000 /* Data Transfer Busy */ |