projects / unix-history / blame
| Commit | Line | Data |
|---|---|---|
| a0eab615 | 1 | /* tmreg.h 4.5 81/03/09 */ |
| 5ab036bb | 2 | |
| bbe0bf68 BJ |
3 | /* |
| 4 | * TM11 controller registers | |
| 5 | */ | |
| 0f9e7f9b | 6 | struct device { |
| bbe0bf68 BJ |
7 | u_short tmer; /* error register, per drive */ |
| 8 | u_short tmcs; /* control-status register */ | |
| 9 | short tmbc; /* byte/frame count */ | |
| 10 | u_short tmba; /* address */ | |
| 11 | short tmdb; /* data buffer */ | |
| 12 | short tmrd; /* read lines */ | |
| 13 | short tmmr; /* maintenance register */ | |
| 0f9e7f9b BJ |
14 | }; |
| 15 | ||
| 16 | #define b_repcnt b_bcount | |
| 17 | #define b_command b_resid | |
| 18 | ||
| 19 | /* bits in tmcs */ | |
| bbe0bf68 BJ |
20 | #define TM_GO 0000001 |
| 21 | #define TM_OFFL 0000000 /* offline */ | |
| 22 | #define TM_RCOM 0000002 /* read */ | |
| 23 | #define TM_WCOM 0000004 /* write */ | |
| 24 | #define TM_WEOF 0000006 /* write-eof */ | |
| 25 | #define TM_SFORW 0000010 /* space forward */ | |
| 26 | #define TM_SREV 0000012 /* space backwards */ | |
| 27 | #define TM_WIRG 0000014 /* write with xtra interrecord gap */ | |
| 28 | #define TM_REW 0000016 /* rewind */ | |
| 29 | #define TM_SENSE TM_IE /* sense (internal to driver) */ | |
| 4656c503 BJ |
30 | |
| 31 | #define tmreverseop(cmd) ((cmd)==TM_SREV || (cmd)==TM_REW) | |
| 32 | ||
| bbe0bf68 BJ |
33 | /* TM_SNS is a pseudo-op used to get tape status */ |
| 34 | #define TM_IE 0000100 /* interrupt enable */ | |
| 35 | #define TM_CUR 0000200 /* control unit is ready */ | |
| 36 | #define TM_DCLR 0010000 /* drive clear */ | |
| 37 | #define TM_D800 0060000 /* select 800 bpi density */ | |
| 38 | #define TM_ERR 0100000 /* drive error summary */ | |
| 0f9e7f9b BJ |
39 | |
| 40 | /* bits in tmer */ | |
| a0eab615 BJ |
41 | #define TMER_ILC 0100000 /* illegal command */ |
| 42 | #define TMER_EOF 0040000 /* end of file */ | |
| 43 | #define TMER_CRE 0020000 /* cyclic redundancy error */ | |
| 44 | #define TMER_PAE 0010000 /* parity error */ | |
| 45 | #define TMER_BGL 0004000 /* bus grant late */ | |
| 46 | #define TMER_EOT 0002000 /* at end of tape */ | |
| 47 | #define TMER_RLE 0001000 /* record length error */ | |
| 48 | #define TMER_BTE 0000400 /* bad tape error */ | |
| 49 | #define TMER_NXM 0000200 /* non-existant memory */ | |
| 50 | #define TMER_SELR 0000100 /* tape unit properly selected */ | |
| 51 | #define TMER_BOT 0000040 /* at beginning of tape */ | |
| 52 | #define TMER_CH7 0000020 /* 7 channel tape */ | |
| 53 | #define TMER_SDWN 0000010 /* gap settling down */ | |
| 54 | #define TMER_WRL 0000004 /* tape unit write protected */ | |
| 55 | #define TMER_RWS 0000002 /* tape unit rewinding */ | |
| 56 | #define TMER_TUR 0000001 /* tape unit ready */ | |
| 57 | ||
| 58 | #define TMER_BITS \ | |
| 4656c503 BJ |
59 | "\10\20ILC\17EOF\16CRE\15PAE\14BGL\13EOT\12RLE\11BTE\10NXM\ |
| 60 | \7SELR\6BOT\5CH7\4SDWN\3WRL\2RWS\1TUR" | |
| 61 | ||
| a0eab615 BJ |
62 | #define TMER_HARD (TMER_ILC|TMER_EOT) |
| 63 | #define TMER_SOFT (TMER_CRE|TMER_PAE|TMER_BGL|TMER_RLE|TMER_BTE|TMER_NXM) |