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| Commit | Line | Data |
|---|---|---|
| af5295ff KM |
1 | /* |
| 2 | * Copyright (c) 1992 The Regents of the University of California. | |
| 3 | * All rights reserved. | |
| 4 | * | |
| 5 | * This code is derived from software contributed to Berkeley by | |
| 6 | * Sony Corp. and Kazumasa Utashiro of Software Research Associates, Inc. | |
| 7 | * | |
| 8 | * %sccs.include.redist.c% | |
| 9 | * | |
| 10 | * from: $Hdr: dmac_0448.h,v 4.300 91/06/09 06:21:36 root Rel41 $ SONY | |
| 11 | * | |
| 12 | * @(#)dmac_0448.h 7.1 (Berkeley) %G% | |
| 13 | */ | |
| 14 | ||
| 15 | /* | |
| 16 | * Copyright (c) 1989- by SONY Corporation. | |
| 17 | */ | |
| 18 | /* | |
| 19 | * dmac_0448.h | |
| 20 | * DMAC L7A0448 | |
| 21 | */ | |
| 22 | ||
| 23 | /* dmac register base address */ | |
| 24 | #define DMAC_BASE 0xbfe00000 | |
| 25 | ||
| 26 | /* register definition */ | |
| 27 | #define DMAC_GSTAT (DMAC_BASE + 0xf) | |
| 28 | #define DMAC_GSEL (DMAC_BASE + 0xe) | |
| 29 | ||
| 30 | #define DMAC_CSTAT (DMAC_BASE + 0x2) | |
| 31 | #define DMAC_CCTL (DMAC_BASE + 0x3) | |
| 32 | #define DMAC_CTRCL (DMAC_BASE + 0x4) | |
| 33 | #define DMAC_CTRCM (DMAC_BASE + 0x5) | |
| 34 | #define DMAC_CTRCH (DMAC_BASE + 0x6) | |
| 35 | #define DMAC_CTAG (DMAC_BASE + 0x7) | |
| 36 | #define DMAC_CWID (DMAC_BASE + 0x8) | |
| 37 | #define DMAC_COFSL (DMAC_BASE + 0x9) | |
| 38 | #define DMAC_COFSH (DMAC_BASE + 0xa) | |
| 39 | #define DMAC_CMAP (DMAC_BASE + 0xc) | |
| 40 | #define DMAC_CMAPH (DMAC_BASE + 0xc) | |
| 41 | #define DMAC_CMAPL (DMAC_BASE + 0xd) | |
| 42 | ||
| 43 | #ifdef mips | |
| 44 | #define VOLATILE volatile | |
| 45 | #else | |
| 46 | #define VOLATILE | |
| 47 | #endif | |
| 48 | ||
| 49 | #ifndef U_CHAR | |
| 50 | #define U_CHAR unsigned VOLATILE char | |
| 51 | #endif | |
| 52 | ||
| 53 | #ifndef U_SHORT | |
| 54 | #define U_SHORT unsigned VOLATILE short | |
| 55 | #endif | |
| 56 | ||
| 57 | #define dmac_gstat *(U_CHAR *)DMAC_GSTAT | |
| 58 | #define dmac_gsel *(U_CHAR *)DMAC_GSEL | |
| 59 | ||
| 60 | #define dmac_cstat *(U_CHAR *)DMAC_CSTAT | |
| 61 | #define dmac_cctl *(U_CHAR *)DMAC_CCTL | |
| 62 | #define dmac_ctrcl *(U_CHAR *)DMAC_CTRCL | |
| 63 | #define dmac_ctrcm *(U_CHAR *)DMAC_CTRCM | |
| 64 | #define dmac_ctrch *(U_CHAR *)DMAC_CTRCH | |
| 65 | #define dmac_ctag *(U_CHAR *)DMAC_CTAG | |
| 66 | #define dmac_cwid *(U_CHAR *)DMAC_CWID | |
| 67 | #define dmac_cofsl *(U_CHAR *)DMAC_COFSL | |
| 68 | #define dmac_cofsh *(U_CHAR *)DMAC_COFSH | |
| 69 | #define dmac_cmap *(U_SHORT *)DMAC_CMAP | |
| 70 | #define dmac_cmaph *(U_CHAR *)DMAC_CMAPH | |
| 71 | #define dmac_cmapl *(U_CHAR *)DMAC_CMAPL | |
| 72 | ||
| 73 | /* status/control bit definition */ | |
| 74 | #define DM_TCZ 0x80 | |
| 75 | #define DM_A28 0x40 | |
| 76 | #define DM_AFIX 0x20 | |
| 77 | #define DM_APAD 0x10 | |
| 78 | #define DM_ZINTEN 0x8 | |
| 79 | #define DM_RST 0x4 | |
| 80 | #define DM_MODE 0x2 | |
| 81 | #define DM_ENABLE 1 | |
| 82 | ||
| 83 | /* general status bit definition */ | |
| 84 | #define CH_INT(x) (u_char)(1 << (2 * x)) | |
| 85 | #define CH0_INT 1 | |
| 86 | #define CH1_INT 4 | |
| 87 | #define CH2_INT 0x10 | |
| 88 | #define CH3_INT 0x40 | |
| 89 | ||
| 90 | #define CH_MRQ(x) (u_char)(1 << (2 * x + 1)) | |
| 91 | #define CH0_MRQ 2 | |
| 92 | #define CH1_MRQ 8 | |
| 93 | #define CH2_MRQ 0x20 | |
| 94 | #define CH3_MRQ 0x80 | |
| 95 | ||
| 96 | /* channel definition */ | |
| 97 | #define CH_SCSI 0 | |
| 98 | #define CH_FDC 1 | |
| 99 | #define CH_AUDIO 2 | |
| 100 | #define CH_VIDEO 3 | |
| 101 | ||
| 102 | /* dma status */ | |
| 103 | ||
| 104 | struct dm_stat { | |
| 105 | unsigned int dm_gstat; | |
| 106 | unsigned int dm_cstat; | |
| 107 | unsigned int dm_cctl; | |
| 108 | unsigned int dm_tcnt; | |
| 109 | unsigned int dm_offset; | |
| 110 | unsigned int dm_tag; | |
| 111 | unsigned int dm_width; | |
| 112 | } ; | |
| 113 | ||
| 114 | #define DMAC_WAIT nops(10) | |
| 115 | ||
| 116 | #define PINTEN 0xbfc80001 | |
| 117 | # define DMA_INTEN 0x10 | |
| 118 | #define PINTSTAT 0xbfc80003 |