projects / unix-history / blame
| Commit | Line | Data |
|---|---|---|
| 7e79487c BJ |
1 | /* tdump.c 4.1 11/9/80 */ |
| 2 | ||
| 3 | #include "../h/param.h" | |
| 4 | #include "../h/vm.h" | |
| 5 | #include "../h/pte.h" | |
| 6 | #include "../h/systm.h" | |
| 7 | #include "../h/cmap.h" | |
| 8 | ||
| 9 | /* | |
| 10 | * Dump core to magtape. | |
| 11 | * Assumes memory mapping has been disabled | |
| 12 | * and IPL has been set high ( > 0x15 ) | |
| 13 | */ | |
| 14 | ||
| 15 | #define UBA 0x20006000 | |
| 16 | #define mba0 0x20010000 | |
| 17 | #define mba1 0x20012000 | |
| 18 | ||
| 19 | struct mba_regs { | |
| 20 | int mba_csr; | |
| 21 | int mba_cr; | |
| 22 | int mba_sr; | |
| 23 | int mba_var; | |
| 24 | int mba_bcr; | |
| 25 | }; | |
| 26 | ||
| 27 | struct device | |
| 28 | { | |
| 29 | int htcs1; | |
| 30 | int htds; | |
| 31 | int hter; | |
| 32 | int htmr; | |
| 33 | int htas; | |
| 34 | int htfc; | |
| 35 | int htdt; | |
| 36 | int htck; | |
| 37 | int htsn; | |
| 38 | int httc; | |
| 39 | }; | |
| 40 | ||
| 41 | #define HTADDR ((struct device *)(mba1 + 0x400)) | |
| 42 | #define HTMAP ((struct pte *) (mba1 + 0x800)) | |
| 43 | ||
| 44 | #define GO 01 | |
| 45 | #define WCOM 060 | |
| 46 | #define RCOM 070 | |
| 47 | #define NOP 0 | |
| 48 | #define WEOF 026 | |
| 49 | #define SFORW 030 | |
| 50 | #define SREV 032 | |
| 51 | #define ERASE 024 | |
| 52 | #define REW 06 | |
| 53 | #define DCLR 010 | |
| 54 | #define P800 01300 /* 800 + pdp11 mode */ | |
| 55 | #define P1600 02300 /* 1600 + pdp11 mode */ | |
| 56 | #define IENABLE 0100 | |
| 57 | #define RDY 0200 | |
| 58 | #define TM 04 | |
| 59 | #define DRY 0200 | |
| 60 | #define EOT 02000 | |
| 61 | #define CS 02000 | |
| 62 | #define COR 0100000 | |
| 63 | #define PES 040 | |
| 64 | #define WRL 04000 | |
| 65 | #define MOL 010000 | |
| 66 | #define ERR 040000 | |
| 67 | #define FCE 01000 | |
| 68 | #define TRE 040000 | |
| 69 | #define HARD 064023 /* UNS|OPI|NEF|FMT|RMR|ILR|ILF */ | |
| 70 | ||
| 71 | #define SIO 1 | |
| 72 | #define SSFOR 2 | |
| 73 | #define SSREV 3 | |
| 74 | #define SRETRY 4 | |
| 75 | #define SCOM 5 | |
| 76 | #define SOK 6 | |
| 77 | ||
| 78 | #define DBSIZE 20 | |
| 79 | ||
| 80 | dump() | |
| 81 | { | |
| 82 | ||
| 83 | HTADDR->httc = P800; /* set 800 bpi mode */ | |
| 84 | ||
| 85 | twall((char *)0, maxfree); /* write out memory */ | |
| 86 | ||
| 87 | teof(); | |
| 88 | teof(); | |
| 89 | rewind(); | |
| 90 | twait(); | |
| 91 | } | |
| 92 | ||
| 93 | twall(start, num) | |
| 94 | char *start; | |
| 95 | int num; | |
| 96 | { | |
| 97 | int blk; | |
| 98 | ||
| 99 | HTADDR->htcs1 = DCLR | GO; | |
| 100 | while (num > 0) { | |
| 101 | blk = num > DBSIZE ? DBSIZE : num; | |
| 102 | twrite(start, blk); | |
| 103 | start += blk*NBPG; | |
| 104 | num -= blk; | |
| 105 | } | |
| 106 | } | |
| 107 | ||
| 108 | twrite(buf, num) | |
| 109 | char *buf; | |
| 110 | { | |
| 111 | register struct pte *hpte = HTMAP; | |
| 112 | register int i; | |
| 113 | ||
| 114 | twait(); | |
| 115 | HTADDR->htfc = -(num*NBPG); | |
| 116 | for (i = 0; i < num; i++) | |
| 117 | *(int *)hpte++ = (btop(buf)+i) | PG_V; | |
| 118 | ((struct mba_regs *)mba1)->mba_sr = -1; | |
| 119 | ((struct mba_regs *)mba1)->mba_bcr = -(num*NBPG); | |
| 120 | ((struct mba_regs *)mba1)->mba_var = 0; | |
| 121 | HTADDR->htcs1 = WCOM | GO; | |
| 122 | } | |
| 123 | ||
| 124 | twait() | |
| 125 | { | |
| 126 | register s; | |
| 127 | ||
| 128 | do | |
| 129 | s = HTADDR->htds; | |
| 130 | while ((s & RDY) == 0); | |
| 131 | } | |
| 132 | ||
| 133 | rewind() | |
| 134 | { | |
| 135 | ||
| 136 | twait(); | |
| 137 | HTADDR->htcs1 = REW | GO; | |
| 138 | } | |
| 139 | ||
| 140 | teof() | |
| 141 | { | |
| 142 | ||
| 143 | twait(); | |
| 144 | HTADDR->htcs1 = WEOF | GO; | |
| 145 | } |