[unix-history] / usr / src / sys / luna68k / dev / if_lereg.h

/*
 * Copyright (c) 1982, 1990 The Regents of the University of California.
 * All rights reserved.
 *
 * %sccs.include.redist.c%
 *
 * from: hp300/dev/if_lereg.h	7.4 (Berkeley) 7/6/92
 *
 *	@(#)if_lereg.h	7.3 (Berkeley) %G%
 */

#include <hp/dev/iotypes.h>	/* XXX */

#define	LEID		21

#define	LEMTU		1518
#define	LEMINSIZE	60	/* should be 64 if mode DTCR is set */
#define	LERBUF		8
#define	LERBUFLOG2	3
#define	LE_RLEN		(LERBUFLOG2 << 13)
#define	LETBUF		2
#define	LETBUFLOG2	1
#define	LE_TLEN		(LETBUFLOG2 << 13)

/*
 * LANCE registers.
 */
struct lereg0 {
	u_char	ler0_pad0;
	vu_char	ler0_id;	/* ID */
	u_char	ler0_pad1;
	vu_char	ler0_status;	/* interrupt enable/status */
};

struct lereg1 {
	u_short	ler1_rdp;	/* data port */
	u_short	ler1_rap;	/* register select port */
};

/*
 * Overlayed on 16K dual-port RAM.
 * Current size is 15,284 bytes with 8 x 1518 receive buffers and
 * 2 x 1518 transmit buffers.
 */
struct lereg2 {
	/* init block */
	u_short	ler2_mode;		/* +0x0000 */
	u_char	ler2_padr[6];		/* +0x0002 */
	u_long	ler2_ladrf[2];		/* +0x0008 */
	u_short	ler2_rdra;		/* +0x0010 */
	u_short	ler2_rlen;		/* +0x0012 */
	u_short	ler2_tdra;		/* +0x0014 */
	u_short	ler2_tlen;		/* +0x0016 */
	/* receive message descriptors */
	struct	lermd {			/* +0x0018 */
		u_short	rmd0;
		u_short	rmd1;
		short	rmd2;
		u_short	rmd3;
	} ler2_rmd[LERBUF];
	/* transmit message descriptors */
	struct	letmd {			/* +0x0058 */
		u_short	tmd0;
		u_short	tmd1;
		short	tmd2;
		u_short	tmd3;
	} ler2_tmd[LETBUF];
	char	ler2_rbuf[LERBUF][LEMTU]; /* +0x0068 */
	char	ler2_tbuf[LETBUF][LEMTU]; /* +0x2FD8 */
};

/*
 * Control and status bits -- lereg0
 */
#define	LE_IE		0x80		/* interrupt enable */
#define	LE_IR		0x40		/* interrupt requested */
#define	LE_LOCK		0x08		/* lock status register */
#define	LE_ACK		0x04		/* ack of lock */
#define	LE_JAB		0x02		/* loss of tx clock (???) */

/*
 * Control and status bits -- lereg1
 */
#define	LE_CSR0		0
#define	LE_CSR1		1
#define	LE_CSR2		2
#define	LE_CSR3		3

#define	LE_SERR		0x8000
#define	LE_BABL		0x4000
#define	LE_CERR		0x2000
#define	LE_MISS		0x1000
#define	LE_MERR		0x0800
#define	LE_RINT		0x0400
#define	LE_TINT		0x0200
#define	LE_IDON		0x0100
#define	LE_INTR		0x0080
#define	LE_INEA		0x0040
#define	LE_RXON		0x0020
#define	LE_TXON		0x0010
#define	LE_TDMD		0x0008
#define	LE_STOP		0x0004
#define	LE_STRT		0x0002
#define	LE_INIT		0x0001

#define	LE_BSWP		0x4
#define	LE_MODE		0x0

/*
 * Control and status bits -- lereg2
 */
#define	LE_OWN		0x8000
#define	LE_ERR		0x4000
#define	LE_STP		0x0200
#define	LE_ENP		0x0100

#define	LE_FRAM		0x2000
#define	LE_OFLO		0x1000
#define	LE_CRC		0x0800
#define	LE_RBUFF	0x0400
#define	LE_MORE		0x1000
#define	LE_ONE		0x0800
#define	LE_DEF		0x0400
#define	LE_TBUFF	0x8000
#define	LE_UFLO		0x4000
#define	LE_LCOL		0x1000
#define	LE_LCAR		0x0800
#define	LE_RTRY		0x0400
Commit	Line	Data
1273d7ec	1	/*
c4b4b65a	2	* Copyright (c) 1982, 1990 The Regents of the University of California.
1273d7ec AF	3	* All rights reserved.
	4	*
	5	* %sccs.include.redist.c%
	6	*
c4b4b65a AF	7	* from: hp300/dev/if_lereg.h 7.4 (Berkeley) 7/6/92
c4b4b65a AF	8	*
38a01dbe	9	* @(#)if_lereg.h 7.3 (Berkeley) %G%
1273d7ec AF	10	*/
1273d7ec AF	11
38a01dbe	12	#include <hp/dev/iotypes.h> /* XXX */
c4b4b65a	13
1273d7ec AF	14	#define LEID 21
	15
	16	#define LEMTU 1518
	17	#define LEMINSIZE 60 /* should be 64 if mode DTCR is set */
	18	#define LERBUF 8
	19	#define LERBUFLOG2 3
	20	#define LE_RLEN (LERBUFLOG2 << 13)
	21	#define LETBUF 2
	22	#define LETBUFLOG2 1
	23	#define LE_TLEN (LETBUFLOG2 << 13)
	24
1273d7ec AF	25	/*
	26	* LANCE registers.
	27	*/
	28	struct lereg0 {
	29	u_char ler0_pad0;
	30	vu_char ler0_id; /* ID */
	31	u_char ler0_pad1;
	32	vu_char ler0_status; /* interrupt enable/status */
	33	};
	34
	35	struct lereg1 {
	36	u_short ler1_rdp; /* data port */
	37	u_short ler1_rap; /* register select port */
	38	};
	39
	40	/*
	41	* Overlayed on 16K dual-port RAM.
c4b4b65a AF	42	* Current size is 15,284 bytes with 8 x 1518 receive buffers and
c4b4b65a AF	43	* 2 x 1518 transmit buffers.
1273d7ec AF	44	*/
	45	struct lereg2 {
	46	/* init block */
	47	u_short ler2_mode; /* +0x0000 */
	48	u_char ler2_padr[6]; /* +0x0002 */
c4b4b65a	49	u_long ler2_ladrf[2]; /* +0x0008 */
1273d7ec AF	50	u_short ler2_rdra; /* +0x0010 */
	51	u_short ler2_rlen; /* +0x0012 */
	52	u_short ler2_tdra; /* +0x0014 */
	53	u_short ler2_tlen; /* +0x0016 */
	54	/* receive message descriptors */
	55	struct lermd { /* +0x0018 */
	56	u_short rmd0;
	57	u_short rmd1;
	58	short rmd2;
	59	u_short rmd3;
	60	} ler2_rmd[LERBUF];
	61	/* transmit message descriptors */
	62	struct letmd { /* +0x0058 */
	63	u_short tmd0;
	64	u_short tmd1;
	65	short tmd2;
	66	u_short tmd3;
	67	} ler2_tmd[LETBUF];
c4b4b65a AF	68	char ler2_rbuf[LERBUF][LEMTU]; /* +0x0068 */
c4b4b65a AF	69	char ler2_tbuf[LETBUF][LEMTU]; /* +0x2FD8 */
1273d7ec AF	70	};
	71
	72	/*
	73	* Control and status bits -- lereg0
	74	*/
	75	#define LE_IE 0x80 /* interrupt enable */
	76	#define LE_IR 0x40 /* interrupt requested */
	77	#define LE_LOCK 0x08 /* lock status register */
	78	#define LE_ACK 0x04 /* ack of lock */
	79	#define LE_JAB 0x02 /* loss of tx clock (???) */
	80
	81	/*
	82	* Control and status bits -- lereg1
	83	*/
	84	#define LE_CSR0 0
	85	#define LE_CSR1 1
	86	#define LE_CSR2 2
	87	#define LE_CSR3 3
	88
	89	#define LE_SERR 0x8000
	90	#define LE_BABL 0x4000
	91	#define LE_CERR 0x2000
	92	#define LE_MISS 0x1000
	93	#define LE_MERR 0x0800
	94	#define LE_RINT 0x0400
	95	#define LE_TINT 0x0200
	96	#define LE_IDON 0x0100
	97	#define LE_INTR 0x0080
	98	#define LE_INEA 0x0040
	99	#define LE_RXON 0x0020
	100	#define LE_TXON 0x0010
	101	#define LE_TDMD 0x0008
	102	#define LE_STOP 0x0004
	103	#define LE_STRT 0x0002
	104	#define LE_INIT 0x0001
	105
	106	#define LE_BSWP 0x4
	107	#define LE_MODE 0x0
	108
	109	/*
	110	* Control and status bits -- lereg2
	111	*/
	112	#define LE_OWN 0x8000
	113	#define LE_ERR 0x4000
	114	#define LE_STP 0x0200
	115	#define LE_ENP 0x0100
	116
	117	#define LE_FRAM 0x2000
	118	#define LE_OFLO 0x1000
	119	#define LE_CRC 0x0800
	120	#define LE_RBUFF 0x0400
	121	#define LE_MORE 0x1000
	122	#define LE_ONE 0x0800
	123	#define LE_DEF 0x0400
	124	#define LE_TBUFF 0x8000
	125	#define LE_UFLO 0x4000
	126	#define LE_LCOL 0x1000
	127	#define LE_LCAR 0x0800
	128	#define LE_RTRY 0x0400