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bebfe1ff C |
1 | /* This file contains the definitions and documentation for the |
2 | Register Transfer Expressions (rtx's) that make up the | |
3 | Register Transfer Language (rtl) used in the Back End of the GNU compiler. | |
4 | Copyright (C) 1987-1991 Free Software Foundation, Inc. | |
5 | ||
6 | This file is part of GNU CC. | |
7 | ||
8 | GNU CC is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2, or (at your option) | |
11 | any later version. | |
12 | ||
13 | GNU CC is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GNU CC; see the file COPYING. If not, write to | |
20 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
21 | ||
22 | ||
23 | /* Expression definitions and descriptions for all targets are in this file. | |
24 | Some will not be used for some targets. | |
25 | ||
26 | The fields in the cpp macro call "DEF_RTL_EXPR()" | |
27 | are used to create declarations in the C source of the compiler. | |
28 | ||
29 | The fields are: | |
30 | ||
31 | 1. The internal name of the rtx used in the C source. | |
32 | It is a tag in the enumeration "enum rtx_code" defined in "rtl.h". | |
33 | By convention these are in UPPER_CASE. | |
34 | ||
35 | 2. The name of the rtx in the external ASCII format read by | |
36 | read_rtx(), and printed by print_rtx(). | |
37 | These names are stored in rtx_name[]. | |
38 | By convention these are the internal (field 1) names in lower_case. | |
39 | ||
40 | 3. The print format, and type of each rtx->fld[] (field) in this rtx. | |
41 | These formats are stored in rtx_format[]. | |
42 | The meaning of the formats is documented in front of this array in rtl.c | |
43 | ||
44 | 4. The class of the rtx. These are stored in rtx_class and are accessed | |
45 | via the GET_RTX_CLASS macro. They are defined as follows: | |
46 | ||
47 | "o" an rtx code that can be used to represent an object (e.g, REG, MEM) | |
48 | "<" an rtx code for a comparison (e.g, EQ, NE, LT) | |
49 | "1" an rtx code for a unary arithmetic expression (e.g, NEG, NOT) | |
50 | "c" an rtx code for a commutative binary operation (e.g,, PLUS, MULT) | |
51 | "3" an rtx code for a non-bitfield three input operation (IF_THEN_ELSE) | |
52 | "2" an rtx code for a non-commutative binary operation (e.g., MINUS, DIV) | |
53 | "b" an rtx code for a bit-field operation (ZERO_EXTRACT, SIGN_EXTRACT) | |
54 | "i" an rtx code for a machine insn (INSN, JUMP_INSN, CALL_INSN) | |
55 | "m" an rtx code for something that matches in insns (e.g, MATCH_DUP) | |
56 | "x" everything else | |
57 | ||
58 | */ | |
59 | ||
60 | /* --------------------------------------------------------------------- | |
61 | Expressions (and "meta" expressions) used for structuring the | |
62 | rtl representation of a program. | |
63 | --------------------------------------------------------------------- */ | |
64 | ||
65 | /* an expression code name unknown to the reader */ | |
66 | DEF_RTL_EXPR(UNKNOWN, "UnKnown", "*", 'x') | |
67 | ||
68 | /* (NIL) is used by rtl reader and printer to represent a null pointer. */ | |
69 | ||
70 | DEF_RTL_EXPR(NIL, "nil", "*", 'x') | |
71 | ||
72 | /* --------------------------------------------------------------------- | |
73 | Expressions used in constructing lists. | |
74 | --------------------------------------------------------------------- */ | |
75 | ||
76 | /* a linked list of expressions */ | |
77 | DEF_RTL_EXPR(EXPR_LIST, "expr_list", "ee", 'x') | |
78 | ||
79 | /* a linked list of instructions. | |
80 | The insns are represented in print by their uids. */ | |
81 | DEF_RTL_EXPR(INSN_LIST, "insn_list", "ue", 'x') | |
82 | ||
83 | /* ---------------------------------------------------------------------- | |
84 | Expression types for machine descriptions. | |
85 | These do not appear in actual rtl code in the compiler. | |
86 | ---------------------------------------------------------------------- */ | |
87 | ||
88 | /* Appears only in machine descriptions. | |
89 | Means use the function named by the second arg (the string) | |
90 | as a predicate; if matched, store the structure that was matched | |
91 | in the operand table at index specified by the first arg (the integer). | |
92 | If the second arg is the null string, the structure is just stored. | |
93 | ||
94 | A third string argument indicates to the register allocator restrictions | |
95 | on where the operand can be allocated. | |
96 | ||
97 | If the target needs no restriction on any instruction this field should | |
98 | be the null string. | |
99 | ||
100 | The string is prepended by: | |
101 | '=' to indicate the operand is only written to. | |
102 | '+' to indicate the operand is both read and written to. | |
103 | ||
104 | Each character in the string represents an allocatable class for an operand. | |
105 | 'g' indicates the operand can be any valid class. | |
106 | 'i' indicates the operand can be immediate (in the instruction) data. | |
107 | 'r' indicates the operand can be in a register. | |
108 | 'm' indicates the operand can be in memory. | |
109 | 'o' a subset of the 'm' class. Those memory addressing modes that | |
110 | can be offset at compile time (have a constant added to them). | |
111 | ||
112 | Other characters indicate target dependent operand classes and | |
113 | are described in each target's machine description. | |
114 | ||
115 | For instructions with more than one operand, sets of classes can be | |
116 | separated by a comma to indicate the appropriate multi-operand constraints. | |
117 | There must be a 1 to 1 correspondence between these sets of classes in | |
118 | all operands for an instruction. | |
119 | */ | |
120 | DEF_RTL_EXPR(MATCH_OPERAND, "match_operand", "iss", 'm') | |
121 | ||
122 | /* Appears only in machine descriptions. | |
123 | Means match a SCRATCH or a register. When used to generate rtl, a | |
124 | SCRATCH is generated. As for MATCH_OPERAND, the mode specifies | |
125 | the desired mode and the first argument is the operand number. | |
126 | The second argument is the constraint. */ | |
127 | DEF_RTL_EXPR(MATCH_SCRATCH, "match_scratch", "is", 'm') | |
128 | ||
129 | /* Appears only in machine descriptions. | |
130 | Means match only something equal to what is stored in the operand table | |
131 | at the index specified by the argument. */ | |
132 | DEF_RTL_EXPR(MATCH_DUP, "match_dup", "i", 'm') | |
133 | ||
134 | /* Appears only in machine descriptions. | |
135 | Means apply a predicate, AND match recursively the operands of the rtx. | |
136 | Operand 0 is the operand-number, as in match_operand. | |
137 | Operand 1 is a predicate to apply (as a string, a function name). | |
138 | Operand 2 is a vector of expressions, each of which must match | |
139 | one subexpression of the rtx this construct is matching. */ | |
140 | DEF_RTL_EXPR(MATCH_OPERATOR, "match_operator", "isE", 'm') | |
141 | ||
142 | /* Appears only in machine descriptions. | |
143 | Means to match a PARALLEL of arbitrary length. The predicate is applied | |
144 | to the PARALLEL and the initial expressions in the PARALLEL are matched. | |
145 | Operand 0 is the operand-number, as in match_operand. | |
146 | Operand 1 is a predicate to apply to the PARALLEL. | |
147 | Operand 2 is a vector of expressions, each of which must match the | |
148 | corresponding element in the PARALLEL. */ | |
149 | DEF_RTL_EXPR(MATCH_PARALLEL, "match_parallel", "isE", 'm') | |
150 | ||
151 | /* Appears only in machine descriptions. | |
152 | Means match only something equal to what is stored in the operand table | |
153 | at the index specified by the argument. For MATCH_OPERATOR. */ | |
154 | DEF_RTL_EXPR(MATCH_OP_DUP, "match_op_dup", "iE", 'm') | |
155 | ||
156 | /* Appears only in machine descriptions. | |
157 | Means match only something equal to what is stored in the operand table | |
158 | at the index specified by the argument. For MATCH_PARALLEL. */ | |
159 | DEF_RTL_EXPR(MATCH_PAR_DUP, "match_par_dup", "iE", 'm') | |
160 | ||
161 | /* Appears only in machine descriptions. | |
162 | Defines the pattern for one kind of instruction. | |
163 | Operand: | |
164 | 0: names this instruction. | |
165 | If the name is the null string, the instruction is in the | |
166 | machine description just to be recognized, and will never be emitted by | |
167 | the tree to rtl expander. | |
168 | 1: is the pattern. | |
169 | 2: is a string which is a C expression | |
170 | giving an additional condition for recognizing this pattern. | |
171 | A null string means no extra condition. | |
172 | 3: is the action to execute if this pattern is matched. | |
173 | If this assembler code template starts with a * then it is a fragment of | |
174 | C code to run to decide on a template to use. Otherwise, it is the | |
175 | template to use. | |
176 | 4: optionally, a vector of attributes for this insn. | |
177 | */ | |
178 | DEF_RTL_EXPR(DEFINE_INSN, "define_insn", "sEssV", 'x') | |
179 | ||
180 | /* Definition of a peephole optimization. | |
181 | 1st operand: vector of insn patterns to match | |
182 | 2nd operand: C expression that must be true | |
183 | 3rd operand: template or C code to produce assembler output. | |
184 | 4: optionally, a vector of attributes for this insn. | |
185 | */ | |
186 | DEF_RTL_EXPR(DEFINE_PEEPHOLE, "define_peephole", "EssV", 'x') | |
187 | ||
188 | /* Definition of a split operation. | |
189 | 1st operand: insn pattern to match | |
190 | 2nd operand: C expression that must be true | |
191 | 3rd operand: vector of insn patterns to place into a SEQUENCE | |
192 | 4th operand: optionally, some C code to execute before generating the | |
193 | insns. This might, for example, create some RTX's and store them in | |
194 | elements of `recog_operand' for use by the vector of insn-patterns. | |
195 | (`operands' is an alias here for `recog_operand'). */ | |
196 | DEF_RTL_EXPR(DEFINE_SPLIT, "define_split", "EsES", 'x') | |
197 | ||
198 | /* Definition of a combiner pattern. | |
199 | Operands not defined yet. */ | |
200 | DEF_RTL_EXPR(DEFINE_COMBINE, "define_combine", "Ess", 'x') | |
201 | ||
202 | /* Define how to generate multiple insns for a standard insn name. | |
203 | 1st operand: the insn name. | |
204 | 2nd operand: vector of insn-patterns. | |
205 | Use match_operand to substitute an element of `recog_operand'. | |
206 | 3rd operand: C expression that must be true for this to be available. | |
207 | This may not test any operands. | |
208 | 4th operand: Extra C code to execute before generating the insns. | |
209 | This might, for example, create some RTX's and store them in | |
210 | elements of `recog_operand' for use by the vector of insn-patterns. | |
211 | (`operands' is an alias here for `recog_operand'). */ | |
212 | DEF_RTL_EXPR(DEFINE_EXPAND, "define_expand", "sEss", 'x') | |
213 | ||
214 | /* Define a requirement for delay slots. | |
215 | 1st operand: Condition involving insn attributes that, if true, | |
216 | indicates that the insn requires the number of delay slots | |
217 | shown. | |
218 | 2nd operand: Vector whose length is the three times the number of delay | |
219 | slots required. | |
220 | Each entry gives three conditions, each involving attributes. | |
221 | The first must be true for an insn to occupy that delay slot | |
222 | location. The second is true for all insns that can be | |
223 | annulled if the branch is true and the third is true for all | |
224 | insns that can be annulled if the branch is false. | |
225 | ||
226 | Multiple DEFINE_DELAYs may be present. They indicate differing | |
227 | requirements for delay slots. */ | |
228 | DEF_RTL_EXPR(DEFINE_DELAY, "define_delay", "eE", 'x') | |
229 | ||
230 | /* Define a set of insns that requires a function unit. This means that | |
231 | these insns produce their result after a delay and that there may be | |
232 | restrictions on the number of insns of this type that can be scheduled | |
233 | simultaneously. | |
234 | ||
235 | More than one DEFINE_FUNCTION_UNIT can be specified for a function unit. | |
236 | Each gives a set of operations and associated delays. The first three | |
237 | operands must be the same for each operation for the same function unit. | |
238 | ||
239 | All delays are specified in cycles. | |
240 | ||
241 | 1st operand: Name of function unit (mostly for documentation) | |
242 | 2nd operand: Number of identical function units in CPU | |
243 | 3rd operand: Total number of simultaneous insns that can execute on this | |
244 | function unit; 0 if unlimited. | |
245 | 4th operand: Condition involving insn attribute, that, if true, specifies | |
246 | those insns that this expression applies to. | |
247 | 5th operand: Constant delay after which insn result will be | |
248 | available. | |
249 | 6th operand: Delay until next insn can be scheduled on the function unit | |
250 | executing this operation. The meaning depends on whether or | |
251 | not the next operand is supplied. | |
252 | 7th operand: If this operand is not specified, the 6th operand gives the | |
253 | number of cycles after the instruction matching the 4th | |
254 | operand begins using the function unit until a subsequent | |
255 | insn can begin. A value of zero should be used for a | |
256 | unit with no issue constraints. If only one operation can | |
257 | be executed a time and the unit is busy for the entire time, | |
258 | the 3rd operand should be specified as 1, the 6th operand | |
259 | sould be specified as 0, and the 7th operand should not | |
260 | be specified. | |
261 | ||
262 | If this operand is specified, it is a list of attribute | |
263 | expressions. If an insn for which any of these expressions | |
264 | is true is currently executing on the function unit, the | |
265 | issue delay will be given by the 6th operand. Otherwise, | |
266 | the insn can be immediately scheduled (subject to the limit | |
267 | on the number of simultaneous operations executing on the | |
268 | unit.) */ | |
269 | DEF_RTL_EXPR(DEFINE_FUNCTION_UNIT, "define_function_unit", "siieiiV", 'x') | |
270 | ||
271 | /* Define attribute computation for `asm' instructions. */ | |
272 | DEF_RTL_EXPR(DEFINE_ASM_ATTRIBUTES, "define_asm_attributes", "V", 'x' ) | |
273 | ||
274 | /* SEQUENCE appears in the result of a `gen_...' function | |
275 | for a DEFINE_EXPAND that wants to make several insns. | |
276 | Its elements are the bodies of the insns that should be made. | |
277 | `emit_insn' takes the SEQUENCE apart and makes separate insns. */ | |
278 | DEF_RTL_EXPR(SEQUENCE, "sequence", "E", 'x') | |
279 | ||
280 | /* Refers to the address of its argument. | |
281 | This appears only in machine descriptions, indicating that | |
282 | any expression that would be acceptable as the operand of MEM | |
283 | should be matched. */ | |
284 | DEF_RTL_EXPR(ADDRESS, "address", "e", 'm') | |
285 | ||
286 | /* ---------------------------------------------------------------------- | |
287 | Expressions used for insn attributes. These also do not appear in | |
288 | actual rtl code in the compiler. | |
289 | ---------------------------------------------------------------------- */ | |
290 | ||
291 | /* Definition of an insn attribute. | |
292 | 1st operand: name of the attribute | |
293 | 2nd operand: comma-separated list of possible attribute values | |
294 | 3rd operand: expression for the default value of the attribute. */ | |
295 | DEF_RTL_EXPR(DEFINE_ATTR, "define_attr", "sse", 'x') | |
296 | ||
297 | /* Marker for the name of an attribute. */ | |
298 | DEF_RTL_EXPR(ATTR, "attr", "s", 'x') | |
299 | ||
300 | /* For use in the last (optional) operand of DEFINE_INSN or DEFINE_PEEPHOLE and | |
301 | in DEFINE_ASM_INSN to specify an attribute to assign to insns matching that | |
302 | pattern. | |
303 | ||
304 | (set_attr "name" "value") is equivalent to | |
305 | (set (attr "name") (const_string "value")) */ | |
306 | DEF_RTL_EXPR(SET_ATTR, "set_attr", "ss", 'x') | |
307 | ||
308 | /* In the last operand of DEFINE_INSN and DEFINE_PEEPHOLE, this can be used to | |
309 | specify that attribute values are to be assigned according to the | |
310 | alternative matched. | |
311 | ||
312 | The following three expressions are equivalent: | |
313 | ||
314 | (set (attr "att") (cond [(eq_attrq "alternative" "1") (const_string "a1") | |
315 | (eq_attrq "alternative" "2") (const_string "a2")] | |
316 | (const_string "a3"))) | |
317 | (set_attr_alternative "att" [(const_string "a1") (const_string "a2") | |
318 | (const_string "a3")]) | |
319 | (set_attr "att" "a1,a2,a3") | |
320 | */ | |
321 | DEF_RTL_EXPR(SET_ATTR_ALTERNATIVE, "set_attr_alternative", "sE", 'x') | |
322 | ||
323 | /* A conditional expression true if the value of the specified attribute of | |
324 | the current insn equals the specified value. The first operand is the | |
325 | attribute name and the second is the comparison value. */ | |
326 | DEF_RTL_EXPR(EQ_ATTR, "eq_attr", "ss", 'x') | |
327 | ||
328 | /* ---------------------------------------------------------------------- | |
329 | Expression types used for things in the instruction chain. | |
330 | ||
331 | All formats must start with "iuu" to handle the chain. | |
332 | Each insn expression holds an rtl instruction and its semantics | |
333 | during back-end processing. | |
334 | See macros's in "rtl.h" for the meaning of each rtx->fld[]. | |
335 | ||
336 | ---------------------------------------------------------------------- */ | |
337 | ||
338 | /* An instruction that cannot jump. */ | |
339 | DEF_RTL_EXPR(INSN, "insn", "iuueiee", 'i') | |
340 | ||
341 | /* An instruction that can possibly jump. | |
342 | Fields ( rtx->fld[] ) have exact same meaning as INSN's. */ | |
343 | DEF_RTL_EXPR(JUMP_INSN, "jump_insn", "iuueiee0", 'i') | |
344 | ||
345 | /* An instruction that can possibly call a subroutine | |
346 | but which will not change which instruction comes next | |
347 | in the current function. | |
348 | Fields ( rtx->fld[] ) have exact same meaning as INSN's. */ | |
349 | DEF_RTL_EXPR(CALL_INSN, "call_insn", "iuueiee", 'i') | |
350 | ||
351 | /* A marker that indicates that control will not flow through. */ | |
352 | DEF_RTL_EXPR(BARRIER, "barrier", "iuu", 'x') | |
353 | ||
354 | /* Holds a label that is followed by instructions. | |
355 | Operand: | |
356 | 3: is a number that is unique in the entire compilation. | |
357 | 4: is the user-given name of the label, if any. | |
358 | 5: is used in jump.c for the use-count of the label. | |
359 | and in flow.c to point to the chain of label_ref's to this label. */ | |
360 | DEF_RTL_EXPR(CODE_LABEL, "code_label", "iuuis0", 'x') | |
361 | ||
362 | /* Say where in the code a source line starts, for symbol table's sake. | |
363 | Contains a filename and a line number. Line numbers <= 0 are special: | |
364 | 0 is used in a dummy placed at the front of every function | |
365 | just so there will never be a need to delete the first insn; | |
366 | -1 indicates a dummy; insns to be deleted by flow analysis and combining | |
367 | are really changed to NOTEs with a number of -1. | |
368 | -2 means beginning of a name binding contour; output N_LBRAC. | |
369 | -3 means end of a contour; output N_RBRAC. */ | |
370 | DEF_RTL_EXPR(NOTE, "note", "iuusn", 'x') | |
371 | ||
372 | /* INLINE_HEADER is use by inline function machinery. The information | |
373 | it contains helps to build the mapping function between the rtx's of | |
374 | the function to be inlined and the current function being expanded. */ | |
375 | ||
376 | DEF_RTL_EXPR(INLINE_HEADER, "inline_header", "iuuuiiiiiieiiEe", 'x') | |
377 | ||
378 | /* ---------------------------------------------------------------------- | |
379 | Top level constituents of INSN, JUMP_INSN and CALL_INSN. | |
380 | ---------------------------------------------------------------------- */ | |
381 | ||
382 | /* Several operations to be done in parallel. */ | |
383 | DEF_RTL_EXPR(PARALLEL, "parallel", "E", 'x') | |
384 | ||
385 | /* A string that is passed through to the assembler as input. | |
386 | One can obviously pass comments through by using the | |
387 | assembler comment syntax. | |
388 | These occur in an insn all by themselves as the PATTERN. | |
389 | They also appear inside an ASM_OPERANDS | |
390 | as a convenient way to hold a string. */ | |
391 | DEF_RTL_EXPR(ASM_INPUT, "asm_input", "s", 'x') | |
392 | ||
393 | /* An assembler instruction with operands. | |
394 | 1st operand is the instruction template. | |
395 | 2nd operand is the constraint for the output. | |
396 | 3rd operand is the number of the output this expression refers to. | |
397 | When an insn stores more than one value, a separate ASM_OPERANDS | |
398 | is made for each output; this integer distinguishes them. | |
399 | 4th is a vector of values of input operands. | |
400 | 5th is a vector of modes and constraints for the input operands. | |
401 | Each element is an ASM_INPUT containing a constraint string | |
402 | and whose mode indicates the mode of the input operand. | |
403 | 6th is the name of the containing source file. | |
404 | 7th is the source line number. */ | |
405 | DEF_RTL_EXPR(ASM_OPERANDS, "asm_operands", "ssiEEsi", 'x') | |
406 | ||
407 | /* A machine-specific operation. | |
408 | 1st operand is a vector of operands being used by the operation so that | |
409 | any needed reloads can be done. | |
410 | 2nd operand is a unique value saying which of a number of machine-specific | |
411 | operations is to be performed. | |
412 | (Note that the vector must be the first operand because of the way that | |
413 | genrecog.c record positions within an insn.) | |
414 | This can occur all by itself in a PATTERN, as a component of a PARALLEL, | |
415 | or inside an expression. */ | |
416 | DEF_RTL_EXPR(UNSPEC, "unspec", "Ei", 'x') | |
417 | ||
418 | /* Similar, but a volatile operation and one which may trap. */ | |
419 | DEF_RTL_EXPR(UNSPEC_VOLATILE, "unspec_volatile", "Ei", 'x') | |
420 | ||
421 | /* Vector of addresses, stored as full words. */ | |
422 | /* Each element is a LABEL_REF to a CODE_LABEL whose address we want. */ | |
423 | DEF_RTL_EXPR(ADDR_VEC, "addr_vec", "E", 'x') | |
424 | ||
425 | /* Vector of address differences X0 - BASE, X1 - BASE, ... | |
426 | First operand is BASE; the vector contains the X's. | |
427 | The machine mode of this rtx says how much space to leave | |
428 | for each difference. */ | |
429 | DEF_RTL_EXPR(ADDR_DIFF_VEC, "addr_diff_vec", "eE", 'x') | |
430 | ||
431 | /* ---------------------------------------------------------------------- | |
432 | At the top level of an instruction (perhaps under PARALLEL). | |
433 | ---------------------------------------------------------------------- */ | |
434 | ||
435 | /* Assignment. | |
436 | Operand 1 is the location (REG, MEM, PC, CC0 or whatever) assigned to. | |
437 | Operand 2 is the value stored there. | |
438 | ALL assignment must use SET. | |
439 | Instructions that do multiple assignments must use multiple SET, | |
440 | under PARALLEL. */ | |
441 | DEF_RTL_EXPR(SET, "set", "ee", 'x') | |
442 | ||
443 | /* Indicate something is used in a way that we don't want to explain. | |
444 | For example, subroutine calls will use the register | |
445 | in which the static chain is passed. */ | |
446 | DEF_RTL_EXPR(USE, "use", "e", 'x') | |
447 | ||
448 | /* Indicate something is clobbered in a way that we don't want to explain. | |
449 | For example, subroutine calls will clobber some physical registers | |
450 | (the ones that are by convention not saved). */ | |
451 | DEF_RTL_EXPR(CLOBBER, "clobber", "e", 'x') | |
452 | ||
453 | /* Call a subroutine. | |
454 | Operand 1 is the address to call. | |
455 | Operand 2 is the number of arguments. */ | |
456 | ||
457 | DEF_RTL_EXPR(CALL, "call", "ee", 'x') | |
458 | ||
459 | /* Return from a subroutine. */ | |
460 | ||
461 | DEF_RTL_EXPR(RETURN, "return", "", 'x') | |
462 | ||
463 | /* Conditional trap. | |
464 | Operand 1 is the condition. | |
465 | Operand 2 is the trap code. | |
466 | For an unconditional trap, make the condition (const_int 1). */ | |
467 | DEF_RTL_EXPR(TRAP_IF, "trap_if", "ei", 'x') | |
468 | ||
469 | /* ---------------------------------------------------------------------- | |
470 | Primitive values for use in expressions. | |
471 | ---------------------------------------------------------------------- */ | |
472 | ||
473 | /* numeric integer constant */ | |
474 | DEF_RTL_EXPR(CONST_INT, "const_int", "w", 'o') | |
475 | ||
476 | /* numeric double constant. | |
477 | Operand 0 is the MEM that stores this constant in memory, | |
478 | or various other things (see comments at immed_double_const in varasm.c). | |
479 | Operand 1 is a chain of all CONST_DOUBLEs in use in the current function. | |
480 | Remaining operands hold the actual value. | |
481 | The number of operands may be more than 2 if cross-compiling; | |
482 | see init_rtl. */ | |
483 | DEF_RTL_EXPR(CONST_DOUBLE, "const_double", "e0ww", 'o') | |
484 | ||
485 | /* String constant. Used only for attributes right now. */ | |
486 | DEF_RTL_EXPR(CONST_STRING, "const_string", "s", 'o') | |
487 | ||
488 | /* This is used to encapsulate an expression whose value is constant | |
489 | (such as the sum of a SYMBOL_REF and a CONST_INT) so that it will be | |
490 | recognized as a constant operand rather than by arithmetic instructions. */ | |
491 | ||
492 | DEF_RTL_EXPR(CONST, "const", "e", 'o') | |
493 | ||
494 | /* program counter. Ordinary jumps are represented | |
495 | by a SET whose first operand is (PC). */ | |
496 | DEF_RTL_EXPR(PC, "pc", "", 'o') | |
497 | ||
498 | /* A register. The "operand" is the register number, accessed | |
499 | with the REGNO macro. If this number is less than FIRST_PSEUDO_REGISTER | |
500 | than a hardware register is being referred to. */ | |
501 | DEF_RTL_EXPR(REG, "reg", "i", 'o') | |
502 | ||
503 | /* A scratch register. This represents a register used only within a | |
504 | single insn. It will be turned into a REG during register allocation | |
505 | or reload unless the constraint indicates that the register won't be | |
506 | needed, in which case it can remain a SCRATCH. This code is | |
507 | marked as having one operand so it can be turned into a REG. */ | |
508 | DEF_RTL_EXPR(SCRATCH, "scratch", "0", 'o') | |
509 | ||
510 | /* One word of a multi-word value. | |
511 | The first operand is the complete value; the second says which word. | |
512 | The WORDS_BIG_ENDIAN flag controls whether word number 0 | |
513 | (as numbered in a SUBREG) is the most or least significant word. | |
514 | ||
515 | This is also used to refer to a value in a different machine mode. | |
516 | For example, it can be used to refer to a SImode value as if it were | |
517 | Qimode, or vice versa. Then the word number is always 0. */ | |
518 | DEF_RTL_EXPR(SUBREG, "subreg", "ei", 'x') | |
519 | ||
520 | /* This one-argument rtx is used for move instructions | |
521 | that are guaranteed to alter only the low part of a destination. | |
522 | Thus, (SET (SUBREG:HI (REG...)) (MEM:HI ...)) | |
523 | has an unspecified effect on the high part of REG, | |
524 | but (SET (STRICT_LOW_PART (SUBREG:HI (REG...))) (MEM:HI ...)) | |
525 | is guaranteed to alter only the bits of REG that are in HImode. | |
526 | ||
527 | The actual instruction used is probably the same in both cases, | |
528 | but the register constraints may be tighter when STRICT_LOW_PART | |
529 | is in use. */ | |
530 | ||
531 | DEF_RTL_EXPR(STRICT_LOW_PART, "strict_low_part", "e", 'x') | |
532 | ||
533 | /* A memory location; operand is the address. | |
534 | Can be nested inside a VOLATILE. */ | |
535 | DEF_RTL_EXPR(MEM, "mem", "e", 'o') | |
536 | ||
537 | /* Reference to an assembler label in the code for this function. | |
538 | The operand is a CODE_LABEL found in the insn chain. | |
539 | The unprinted fields 1 and 2 are used in flow.c for the | |
540 | LABEL_NEXTREF and CONTAINING_INSN. */ | |
541 | DEF_RTL_EXPR(LABEL_REF, "label_ref", "u00", 'o') | |
542 | ||
543 | /* Reference to a named label: the string that is the first operand, | |
544 | with `_' added implicitly in front. | |
545 | Exception: if the first character explicitly given is `*', | |
546 | to give it to the assembler, remove the `*' and do not add `_'. */ | |
547 | DEF_RTL_EXPR(SYMBOL_REF, "symbol_ref", "s", 'o') | |
548 | ||
549 | /* The condition code register is represented, in our imagination, | |
550 | as a register holding a value that can be compared to zero. | |
551 | In fact, the machine has already compared them and recorded the | |
552 | results; but instructions that look at the condition code | |
553 | pretend to be looking at the entire value and comparing it. */ | |
554 | DEF_RTL_EXPR(CC0, "cc0", "", 'o') | |
555 | ||
556 | /* ===================================================================== | |
557 | A QUEUED expression really points to a member of the queue of instructions | |
558 | to be output later for postincrement/postdecrement. | |
559 | QUEUED expressions never become part of instructions. | |
560 | When a QUEUED expression would be put into an instruction, | |
561 | instead either the incremented variable or a copy of its previous | |
562 | value is used. | |
563 | ||
564 | Operands are: | |
565 | 0. the variable to be incremented (a REG rtx). | |
566 | 1. the incrementing instruction, or 0 if it hasn't been output yet. | |
567 | 2. A REG rtx for a copy of the old value of the variable, or 0 if none yet. | |
568 | 3. the body to use for the incrementing instruction | |
569 | 4. the next QUEUED expression in the queue. | |
570 | ====================================================================== */ | |
571 | ||
572 | DEF_RTL_EXPR(QUEUED, "queued", "eeeee", 'x') | |
573 | ||
574 | /* ---------------------------------------------------------------------- | |
575 | Expressions for operators in an rtl pattern | |
576 | ---------------------------------------------------------------------- */ | |
577 | ||
578 | /* if_then_else. This is used in representing ordinary | |
579 | conditional jump instructions. | |
580 | Operand: | |
581 | 0: condition | |
582 | 1: then expr | |
583 | 2: else expr */ | |
584 | DEF_RTL_EXPR(IF_THEN_ELSE, "if_then_else", "eee", '3') | |
585 | ||
586 | /* General conditional. The first operand is a vector composed of pairs of | |
587 | expressions. The first element of each pair is evaluated, in turn. | |
588 | The value of the conditional is the second expression of the first pair | |
589 | whose first expression evaluates non-zero. If none of the expressions is | |
590 | true, the second operand will be used as the value of the conditional. | |
591 | ||
592 | This should be replaced with use of IF_THEN_ELSE. */ | |
593 | DEF_RTL_EXPR(COND, "cond", "Ee", 'x') | |
594 | ||
595 | /* Comparison, produces a condition code result. */ | |
596 | DEF_RTL_EXPR(COMPARE, "compare", "ee", '2') | |
597 | ||
598 | /* plus */ | |
599 | DEF_RTL_EXPR(PLUS, "plus", "ee", 'c') | |
600 | ||
601 | /* Operand 0 minus operand 1. */ | |
602 | DEF_RTL_EXPR(MINUS, "minus", "ee", '2') | |
603 | ||
604 | /* Minus operand 0. */ | |
605 | DEF_RTL_EXPR(NEG, "neg", "e", '1') | |
606 | ||
607 | DEF_RTL_EXPR(MULT, "mult", "ee", 'c') | |
608 | ||
609 | /* Operand 0 divided by operand 1. */ | |
610 | DEF_RTL_EXPR(DIV, "div", "ee", '2') | |
611 | /* Remainder of operand 0 divided by operand 1. */ | |
612 | DEF_RTL_EXPR(MOD, "mod", "ee", '2') | |
613 | ||
614 | /* Unsigned divide and remainder. */ | |
615 | DEF_RTL_EXPR(UDIV, "udiv", "ee", '2') | |
616 | DEF_RTL_EXPR(UMOD, "umod", "ee", '2') | |
617 | ||
618 | /* Bitwise operations. */ | |
619 | DEF_RTL_EXPR(AND, "and", "ee", 'c') | |
620 | ||
621 | DEF_RTL_EXPR(IOR, "ior", "ee", 'c') | |
622 | ||
623 | DEF_RTL_EXPR(XOR, "xor", "ee", 'c') | |
624 | ||
625 | DEF_RTL_EXPR(NOT, "not", "e", '1') | |
626 | ||
627 | /* Operand: | |
628 | 0: value to be shifted. | |
629 | 1: number of bits. | |
630 | ASHIFT and LSHIFT are distinguished because on some machines | |
631 | these allow a negative operand and shift right in that case. */ | |
632 | DEF_RTL_EXPR(LSHIFT, "lshift", "ee", '2') | |
633 | DEF_RTL_EXPR(ASHIFT, "ashift", "ee", '2') | |
634 | DEF_RTL_EXPR(ROTATE, "rotate", "ee", '2') | |
635 | ||
636 | /* Right shift operations, for machines where these are not the same | |
637 | as left shifting with a negative argument. */ | |
638 | ||
639 | DEF_RTL_EXPR(ASHIFTRT, "ashiftrt", "ee", '2') | |
640 | DEF_RTL_EXPR(LSHIFTRT, "lshiftrt", "ee", '2') | |
641 | DEF_RTL_EXPR(ROTATERT, "rotatert", "ee", '2') | |
642 | ||
643 | /* Minimum and maximum values of two operands. We need both signed and | |
644 | unsigned forms. (We cannot use MIN for SMIN because it conflicts | |
645 | with a macro of the same name.) */ | |
646 | ||
647 | DEF_RTL_EXPR(SMIN, "smin", "ee", 'c') | |
648 | DEF_RTL_EXPR(SMAX, "smax", "ee", 'c') | |
649 | DEF_RTL_EXPR(UMIN, "umin", "ee", 'c') | |
650 | DEF_RTL_EXPR(UMAX, "umax", "ee", 'c') | |
651 | ||
652 | /* These unary operations are used to represent incrementation | |
653 | and decrementation as they occur in memory addresses. | |
654 | The amount of increment or decrement are not represented | |
655 | because they can be understood from the machine-mode of the | |
656 | containing MEM. These operations exist in only two cases: | |
657 | 1. pushes onto the stack. | |
658 | 2. created automatically by the life_analysis pass in flow.c. */ | |
659 | DEF_RTL_EXPR(PRE_DEC, "pre_dec", "e", 'x') | |
660 | DEF_RTL_EXPR(PRE_INC, "pre_inc", "e", 'x') | |
661 | DEF_RTL_EXPR(POST_DEC, "post_dec", "e", 'x') | |
662 | DEF_RTL_EXPR(POST_INC, "post_inc", "e", 'x') | |
663 | ||
664 | /* Comparison operations. The ordered comparisons exist in two | |
665 | flavors, signed and unsigned. */ | |
666 | DEF_RTL_EXPR(NE, "ne", "ee", '<') | |
667 | DEF_RTL_EXPR(EQ, "eq", "ee", '<') | |
668 | DEF_RTL_EXPR(GE, "ge", "ee", '<') | |
669 | DEF_RTL_EXPR(GT, "gt", "ee", '<') | |
670 | DEF_RTL_EXPR(LE, "le", "ee", '<') | |
671 | DEF_RTL_EXPR(LT, "lt", "ee", '<') | |
672 | DEF_RTL_EXPR(GEU, "geu", "ee", '<') | |
673 | DEF_RTL_EXPR(GTU, "gtu", "ee", '<') | |
674 | DEF_RTL_EXPR(LEU, "leu", "ee", '<') | |
675 | DEF_RTL_EXPR(LTU, "ltu", "ee", '<') | |
676 | ||
677 | /* Represents the result of sign-extending the sole operand. | |
678 | The machine modes of the operand and of the SIGN_EXTEND expression | |
679 | determine how much sign-extension is going on. */ | |
680 | DEF_RTL_EXPR(SIGN_EXTEND, "sign_extend", "e", '1') | |
681 | ||
682 | /* Similar for zero-extension (such as unsigned short to int). */ | |
683 | DEF_RTL_EXPR(ZERO_EXTEND, "zero_extend", "e", '1') | |
684 | ||
685 | /* Similar but here the operand has a wider mode. */ | |
686 | DEF_RTL_EXPR(TRUNCATE, "truncate", "e", '1') | |
687 | ||
688 | /* Similar for extending floating-point values (such as SFmode to DFmode). */ | |
689 | DEF_RTL_EXPR(FLOAT_EXTEND, "float_extend", "e", '1') | |
690 | DEF_RTL_EXPR(FLOAT_TRUNCATE, "float_truncate", "e", '1') | |
691 | ||
692 | /* Conversion of fixed point operand to floating point value. */ | |
693 | DEF_RTL_EXPR(FLOAT, "float", "e", '1') | |
694 | ||
695 | /* With fixed-point machine mode: | |
696 | Conversion of floating point operand to fixed point value. | |
697 | Value is defined only when the operand's value is an integer. | |
698 | With floating-point machine mode (and operand with same mode): | |
699 | Operand is rounded toward zero to produce an integer value | |
700 | represented in floating point. */ | |
701 | DEF_RTL_EXPR(FIX, "fix", "e", '1') | |
702 | ||
703 | /* Conversion of unsigned fixed point operand to floating point value. */ | |
704 | DEF_RTL_EXPR(UNSIGNED_FLOAT, "unsigned_float", "e", '1') | |
705 | ||
706 | /* With fixed-point machine mode: | |
707 | Conversion of floating point operand to *unsigned* fixed point value. | |
708 | Value is defined only when the operand's value is an integer. */ | |
709 | DEF_RTL_EXPR(UNSIGNED_FIX, "unsigned_fix", "e", '1') | |
710 | ||
711 | /* Absolute value */ | |
712 | DEF_RTL_EXPR(ABS, "abs", "e", '1') | |
713 | ||
714 | /* Square root */ | |
715 | DEF_RTL_EXPR(SQRT, "sqrt", "e", '1') | |
716 | ||
717 | /* Find first bit that is set. | |
718 | Value is 1 + number of trailing zeros in the arg., | |
719 | or 0 if arg is 0. */ | |
720 | DEF_RTL_EXPR(FFS, "ffs", "e", '1') | |
721 | ||
722 | /* Reference to a signed bit-field of specified size and position. | |
723 | Operand 0 is the memory unit (usually SImode or QImode) which | |
724 | contains the field's first bit. Operand 1 is the width, in bits. | |
725 | Operand 2 is the number of bits in the memory unit before the | |
726 | first bit of this field. | |
727 | If BITS_BIG_ENDIAN is defined, the first bit is the msb and | |
728 | operand 2 counts from the msb of the memory unit. | |
729 | Otherwise, the first bit is the lsb and operand 2 counts from | |
730 | the lsb of the memory unit. */ | |
731 | DEF_RTL_EXPR(SIGN_EXTRACT, "sign_extract", "eee", 'b') | |
732 | ||
733 | /* Similar for unsigned bit-field. */ | |
734 | DEF_RTL_EXPR(ZERO_EXTRACT, "zero_extract", "eee", 'b') | |
735 | ||
736 | /* For RISC machines. These save memory when splitting insns. */ | |
737 | ||
738 | /* HIGH are the high-order bits of a constant expression. */ | |
739 | DEF_RTL_EXPR(HIGH, "high", "e", 'o') | |
740 | ||
741 | /* LO_SUM is the sum of a register and the low-order bits | |
742 | of a constant expression. */ | |
743 | DEF_RTL_EXPR(LO_SUM, "lo_sum", "ee", 'o') | |
744 | ||
745 | /* | |
746 | Local variables: | |
747 | mode:c | |
748 | version-control: t | |
749 | End: | |
750 | */ |