Commit | Line | Data |
---|---|---|
4656c503 | 1 | /* mbareg.h 4.9 81/02/25 */ |
3ed87cd4 BJ |
2 | |
3 | /* | |
4 | * VAX Massbus adapter registers | |
5 | */ | |
6 | ||
97fedd9e | 7 | struct mba_regs |
4d9e9e73 | 8 | { |
97fedd9e BJ |
9 | int mba_csr; /* configuration register */ |
10 | int mba_cr; /* control register */ | |
11 | int mba_sr; /* status register */ | |
12 | int mba_var; /* virtual address register */ | |
13 | int mba_bcr; /* byte count register */ | |
14 | int mba_dr; | |
15 | int mba_pad1[250]; | |
16 | struct mba_drv { /* per drive registers */ | |
17 | int mbd_cs1; /* control status */ | |
18 | int mbd_ds; /* drive status */ | |
19 | int mbd_er1; /* error register */ | |
20 | int mbd_mr1; /* maintenance register */ | |
21 | int mbd_as; /* attention status */ | |
22 | int mbd_da; /* desired address (disks) */ | |
23 | #define mbd_fc mbd_da /* frame count (tapes) */ | |
24 | int mbd_dt; /* drive type */ | |
25 | int mbd_la; /* look ahead (disks) */ | |
26 | #define mbd_ck mbd_la /* ??? (tapes) */ | |
27 | int mbd_sn; /* serial number */ | |
28 | int mbd_of; /* ??? */ | |
29 | #define mbd_tc mbd_of /* ??? */ | |
30 | int mbd_fill[22]; | |
31 | } mba_drv[8]; | |
32 | struct pte mba_map[256]; /* io space virtual map */ | |
33 | int mba_pad2[256*5]; /* to size of a nexus */ | |
4d9e9e73 | 34 | }; |
97fedd9e BJ |
35 | |
36 | /* | |
37 | * Bits in mba_cr | |
38 | */ | |
39 | #define MBAINIT 0x1 /* init mba */ | |
40 | #define MBAIE 0x4 /* enable mba interrupts */ | |
41 | ||
4d9e9e73 | 42 | /* |
97fedd9e BJ |
43 | * Bits in mba_sr |
44 | */ | |
45 | #define MBS_DTBUSY 0x80000000 /* data transfer busy */ | |
46 | #define MBS_NRCONF 0x40000000 /* no response confirmation */ | |
47 | #define MBS_CRD 0x20000000 /* corrected read data */ | |
48 | #define MBS_CBHUNG 0x00800000 /* control bus hung */ | |
49 | #define MBS_PGE 0x00080000 /* programming error */ | |
50 | #define MBS_NED 0x00040000 /* non-existant drive */ | |
51 | #define MBS_MCPE 0x00020000 /* massbus control parity error */ | |
52 | #define MBS_ATTN 0x00010000 /* attention from massbus */ | |
53 | #define MBS_SPE 0x00004000 /* silo parity error */ | |
54 | #define MBS_DTCMP 0x00002000 /* data transfer completed */ | |
55 | #define MBS_DTABT 0x00001000 /* data transfer aborted */ | |
56 | #define MBS_DLT 0x00000800 /* data late */ | |
57 | #define MBS_WCKUP 0x00000400 /* write check upper */ | |
58 | #define MBS_WCKLWR 0x00000200 /* write check lower */ | |
59 | #define MBS_MXF 0x00000100 /* miss transfer error */ | |
60 | #define MBS_MBEXC 0x00000080 /* massbus exception */ | |
61 | #define MBS_MDPE 0x00000040 /* massbus data parity error */ | |
62 | #define MBS_MAPPE 0x00000020 /* page frame map parity error */ | |
63 | #define MBS_INVMAP 0x00000010 /* invalid map */ | |
64 | #define MBS_ERRCONF 0x00000008 /* error confirmation */ | |
65 | #define MBS_RDS 0x00000004 /* read data substitute */ | |
66 | #define MBS_ISTIMO 0x00000002 /* interface sequence timeout */ | |
67 | #define MBS_RDTIMO 0x00000001 /* read data timeout */ | |
68 | ||
4656c503 BJ |
69 | #define MBASR_BITS \ |
70 | "\20\40DTBUSY\37NRCONF\36CRD\30CBHUNG\24PGE\23NED\22MCPE\21ATTN\ | |
71 | \17SPE\16DTCMP\15DTABT\14DLT\13WCKUP\12WCKLWR\11MXF\10MBEXC\7MDPE\ | |
72 | \6MAPPE\5INVMAP\4ERRCONF\3RDS\2ISTIMO\1RDTIMO" | |
97fedd9e | 73 | #define MBAEBITS (~(MBS_DTBUSY|MBS_CRD|MBS_ATTN|MBS_DTCMP)) |
4656c503 | 74 | extern char mbasr_bits[]; |
97fedd9e BJ |
75 | |
76 | /* | |
77 | * Commands for mbd_cs1 | |
78 | */ | |
79 | #define MBD_WCOM 0x30 | |
80 | #define MBD_RCOM 0x38 | |
81 | #define MBD_GO 0x1 | |
82 | ||
83 | /* | |
84 | * Bits in mbd_ds. | |
85 | */ | |
86 | #define MBD_DRY 0x80 /* drive ready */ | |
87 | #define MBD_MOL 0x1000 /* medium on line */ | |
88 | #define MBD_DPR 0x100 /* drive present */ | |
89 | #define MBD_ERR 0x4000 /* error in drive */ | |
90 | ||
91 | /* | |
92 | * Bits in mbd_dt | |
4d9e9e73 BJ |
93 | */ |
94 | #define MBDT_NSA 0x8000 /* not sector addressible */ | |
95 | #define MBDT_TAP 0x4000 /* is a tape */ | |
96 | #define MBDT_MOH 0x2000 /* moving head */ | |
97 | #define MBDT_7CH 0x1000 /* 7 channel */ | |
98 | #define MBDT_DRQ 0x800 /* drive request required */ | |
99 | #define MBDT_SPR 0x400 /* slave present */ | |
100 | ||
101 | #define MBDT_TYPE 0x1ff | |
102 | #define MBDT_MASK (MBDT_NSA|MBDT_TAP|MBDT_TYPE) | |
103 | ||
97fedd9e | 104 | /* type codes for disk drives */ |
4d9e9e73 BJ |
105 | #define MBDT_RP04 020 |
106 | #define MBDT_RP05 021 | |
107 | #define MBDT_RP06 022 | |
108 | #define MBDT_RP07 042 | |
109 | #define MBDT_RM03 024 | |
110 | #define MBDT_RM05 027 | |
111 | #define MBDT_RM80 026 | |
112 | ||
97fedd9e | 113 | /* type codes for tape drives */ |
4d9e9e73 BJ |
114 | #define MBDT_TM03 050 |
115 | #define MBDT_TE16 051 | |
116 | #define MBDT_TU45 052 | |
117 | #define MBDT_TU77 054 | |
97fedd9e | 118 | #define MBDT_TU78 0140 /* can't handle these (yet) */ |
4d9e9e73 BJ |
119 | |
120 | /* | |
97fedd9e BJ |
121 | * Each driver has an array of pointers to these structures, one for |
122 | * each device it is willing to handle. At bootstrap time, the | |
123 | * driver tables are filled in; | |
4d9e9e73 | 124 | */ |
97fedd9e BJ |
125 | struct mba_info { |
126 | struct mba_driver *mi_driver; | |
127 | short mi_name; /* two character generic name */ | |
128 | short mi_unit; /* unit number to the system */ | |
129 | short mi_mbanum; /* the mba it is on */ | |
130 | short mi_drive; /* controller on mba */ | |
131 | short mi_slave; /* slave to controller (TM03/TU16) */ | |
6a2942e9 | 132 | short mi_dk; /* driver number for iostat */ |
97fedd9e BJ |
133 | short mi_alive; /* device exists */ |
134 | short mi_type; /* driver specific unit type */ | |
97fedd9e BJ |
135 | struct buf mi_tab; /* head of queue for this device */ |
136 | struct mba_info *mi_forw; | |
137 | /* we could compute these every time, but hereby save time */ | |
138 | struct mba_regs *mi_mba; | |
139 | struct mba_drv *mi_drv; | |
140 | struct mba_hd *mi_hd; | |
3ed87cd4 BJ |
141 | }; |
142 | ||
97fedd9e BJ |
143 | /* |
144 | * The initialization routine uses the information in the mbinit table | |
145 | * to initialize the drive type routines in the drivers and the | |
146 | * mbahd array summarizing which devices are hooked to which massbus slots. | |
147 | */ | |
148 | struct mba_hd { | |
149 | short mh_active; | |
bbe0bf68 | 150 | short mh_ndrive; |
97fedd9e BJ |
151 | struct mba_regs *mh_mba; /* virt addr of mba */ |
152 | struct mba_regs *mh_physmba; /* phys addr of mba */ | |
153 | struct mba_info *mh_mbip[8]; /* what is attached */ | |
154 | struct mba_info *mh_actf; /* head of queue to transfer */ | |
155 | struct mba_info *mh_actl; /* tail of queue to transfer */ | |
156 | } mba_hd[4]; | |
97fedd9e BJ |
157 | /* |
158 | * Values for flags; normally MH_NOSEEK will be set when there is | |
159 | * only a single drive on an massbus. | |
160 | */ | |
161 | #define MH_NOSEEK 1 | |
162 | #define MH_NOSEARCH 2 | |
3ed87cd4 | 163 | |
97fedd9e BJ |
164 | /* |
165 | * Each massbus driver defines entries for a set of routines | |
166 | * as well as an array of types which are acceptable to it. | |
167 | */ | |
168 | struct mba_driver { | |
169 | int (*md_dkinit)(); /* setup dk info (mspw) */ | |
170 | int (*md_ustart)(); /* unit start routine */ | |
171 | int (*md_start)(); /* setup a data transfer */ | |
172 | int (*md_dtint)(); /* data transfer complete */ | |
173 | int (*md_ndint)(); /* non-data transfer interrupt */ | |
174 | short *md_type; /* array of drive type codes */ | |
175 | struct mba_info **md_info; /* backpointers to mbinit structs */ | |
176 | }; | |
3ed87cd4 | 177 | |
97fedd9e BJ |
178 | /* |
179 | * Possible return values from unit start routines. | |
180 | */ | |
181 | #define MBU_NEXT 0 /* skip to next operation */ | |
182 | #define MBU_BUSY 1 /* dual port busy; wait for intr */ | |
183 | #define MBU_STARTED 2 /* non-data transfer started */ | |
184 | #define MBU_DODATA 3 /* data transfer ready; start mba */ | |
3ed87cd4 | 185 | |
97fedd9e BJ |
186 | /* |
187 | * Possible return values from data transfer interrupt handling routines | |
188 | */ | |
189 | #define MBD_DONE 0 /* data transfer complete */ | |
190 | #define MBD_RETRY 1 /* error occurred, please retry */ | |
191 | #define MBD_RESTARTED 2 /* driver restarted i/o itself */ | |
3ed87cd4 | 192 | |
97fedd9e BJ |
193 | /* |
194 | * Possible return values from non-data-transfer interrupt handling routines | |
195 | */ | |
196 | #define MBN_DONE 0 /* non-data transfer complete */ | |
197 | #define MBN_RETRY 1 /* failed; retry the operation */ | |
d75b699b | 198 | |
97fedd9e BJ |
199 | /* |
200 | * Clear attention status for specified drive. | |
201 | */ | |
202 | #define mbclrattn(mi) ((mi)->mi_mba->mba_drv[0].mbd_as = 1 << (mi)->mi_drive) | |
6a2942e9 BJ |
203 | |
204 | /* | |
205 | * Kernel definitions related to mba. | |
206 | */ | |
207 | #ifdef KERNEL | |
208 | extern Xmba0int(), Xmba1int(), Xmba2int(), Xmba3int(); | |
209 | extern struct mba_info mbinit[]; /* blanks for filling mba_info */ | |
210 | int nummba; | |
211 | #endif |