projects / unix-history / blame
| Commit | Line | Data |
|---|---|---|
| c6306105 C |
1 | /* rlreg.h 6.1 83/07/29 */ |
| 2 | ||
| 3 | struct rldevice { | |
| 4 | short rlcs; /* control status */ | |
| 5 | u_short rlba; /* bus address */ | |
| 6 | union { /* disk address */ | |
| 7 | u_short seek; /* disk seek address */ | |
| 8 | u_short rw; /* disk read/write address */ | |
| 9 | u_short getstat; /* get disk status command */ | |
| 10 | } rlda; | |
| 11 | union { /* multi-purpose register */ | |
| 12 | u_short getstat; /* get status */ | |
| 13 | u_short readhdr; /* read header */ | |
| 14 | u_short rw; /* read/write word count */ | |
| 15 | } rlmp; | |
| 16 | }; | |
| 17 | ||
| 18 | #define NRLCYLN 512 /* number of cylinders per disk */ | |
| 19 | #define NRLTRKS 2 /* number of tracks per cylinder */ | |
| 20 | #define NRLSECT 40 /* number of sectors per track */ | |
| 21 | #define NRLBPSC 256 /* bytes per sector */ | |
| 22 | ||
| 23 | /* rlcs */ | |
| 24 | /* commands */ | |
| 25 | #define RL_NOOP 0000000 /* no-operation */ | |
| 26 | #define RL_WCHECK 0000002 /* write check */ | |
| 27 | #define RL_GETSTAT 0000004 /* get status */ | |
| 28 | #define RL_SEEK 0000006 /* seek */ | |
| 29 | #define RL_RHDR 0000010 /* read header */ | |
| 30 | #define RL_WRITE 0000012 /* write data */ | |
| 31 | #define RL_READ 0000014 /* read data */ | |
| 32 | #define RL_RDNCK 0000016 /* read data without hdr check */ | |
| 33 | ||
| 34 | #define RL_DRDY 0000001 /* When set indicates drive ready */ | |
| 35 | #define RL_BAE 0000060 /* UNIBUS address bits 16 & 17 */ | |
| 36 | #define RL_IE 0000100 /* interrupt enable */ | |
| 37 | #define RL_CRDY 0000200 /* controller ready */ | |
| 38 | #define RL_DS0 0000400 /* drive select 0 */ | |
| 39 | #define RL_DS1 0001000 /* drive select 1 */ | |
| 40 | #define RL_OPI 0002000 /* operation incomplete */ | |
| 41 | #define RL_DCRC 0004000 /* CRC error occurred */ | |
| 42 | #define RL_DLT 0010000 /* data late or header not found */ | |
| 43 | #define RL_NXM 0020000 /* non-existant memory */ | |
| 44 | #define RL_DE 0040000 /* selected drive flagged an error */ | |
| 45 | #define RL_ERR 0100000 /* composite error */ | |
| 46 | ||
| 47 | #define RL_DCRDY (RL_DRDY | RL_CRDY) | |
| 48 | ||
| 49 | #define RLCS_BITS \ | |
| 50 | "\10\20ERR\17DE\16NXM\15DLT\14DCRC\13OPI\1DRDY" | |
| 51 | ||
| 52 | /* da_seek */ | |
| 53 | #define RLDA_LOW 0000001 /* lower cylinder seek */ | |
| 54 | #define RLDA_HGH 0000005 /* higher cylinder seek */ | |
| 55 | #define RLDA_HSU 0000000 /* upper head select */ | |
| 56 | #define RLDA_HSL 0000020 /* lower head select */ | |
| 57 | #define RLDA_CA 0177600 /* cylinder address */ | |
| 58 | ||
| 59 | /* da_rw */ | |
| 60 | #define RLDA_SA 0000077 /* sector address */ | |
| 61 | #define RLDA_HST 0000000 /* upper head select */ | |
| 62 | #define RLDA_HSB 0000100 /* lower head select */ | |
| 63 | ||
| 64 | /* da_getstat */ | |
| 65 | ||
| 66 | #define RL_GSTAT 0000003 /* Get status */ | |
| 67 | #define RL_RESET 0000013 /* get status with reset */ | |
| 68 | ||
| 69 | /* mp_getstat */ | |
| 70 | #define RLMP_STA 0000001 /* drive state: load cartridge */ | |
| 71 | #define RLMP_STB 0000002 /* drive state: brush cycle */ | |
| 72 | #define RLMP_STC 0000004 /* drive state: seek */ | |
| 73 | #define RLMP_BH 0000010 /* set when brushes are home */ | |
| 74 | #define RLMP_HO 0000020 /* set when brushes over the disk */ | |
| 75 | #define RLMP_CO 0000040 /* set when cover open */ | |
| 76 | #define RLMP_HS 0000100 /* indicates selected head: | |
| 77 | 0 upper head | |
| 78 | 1 lower head */ | |
| 79 | #define RLMP_DT 0000200 /* indicates drive type: | |
| 80 | 0 RL01 | |
| 81 | 1 RL02 */ | |
| 82 | #define RLMP_DSE 0000400 /* set on multiple drive selection */ | |
| 83 | #define RLMP_VC 0001000 /* set on pack mounted and spining */ | |
| 84 | #define RLMP_WGE 0002000 /* write gate error */ | |
| 85 | #define RLMP_SPE 0004000 /* spin speed error */ | |
| 86 | #define RLMP_SKTO 0010000 /*\\b* seek time out error */ | |
| 87 | #define RLMP_WL 0020000 /* set on protected drive */ | |
| 88 | #define RLMP_CHE 0040000 /* current head error */ | |
| 89 | #define RLMP_WDE 0100000 /* write data error */ | |
| 90 | ||
| 91 | /* mp_rhc */ | |
| 92 | #define RLMP_SA 0000077 /* sector address */ | |
| 93 | #define RLMP_CA 0177600 /* cylinder address */ | |
| 94 | ||
| 95 | /* check these bits after a get status and reset */ | |
| 96 | #define RLMP_STATUS (RLMP_WDE|RLMP_CHE|RLMP_SKTO|RLMP_SPE|RLMP_WGE \ | |
| 97 | |RLMP_VC|RLMP_DSE|RLMP_CO|RLMP_HO|RLMP_BH|RLMP_STC|RLMP_STB|RLMP_STA) | |
| 98 | ||
| 99 | /* these are the bits that should be on in the above check */ | |
| 100 | #define RLMP_STATOK (RLMP_HO|RLMP_BH|RLMP_STC|RLMP_STA) | |
| 101 | ||
| 102 | /* mp_rw */ | |
| 103 | #define RLMP_WC 0017777 /* word count 2's complement */ | |
| 104 | ||
| 105 | #define RLER_BITS \ | |
| 106 | "\10\20WDE\17CHE\16WL\15SKTO\14SPE\13WGE\12VC\11DSE\ | |
| 107 | \10DT\7HS\6CO\5HO\4BH\3STC\2STB\1STA" |