[unix-history] / usr / src / sys / vax / mba / hpreg.h

/*
 * Copyright (c) 1982, 1986 Regents of the University of California.
 * All rights reserved.  The Berkeley software License Agreement
 * specifies the terms and conditions for redistribution.
 *
 *	@(#)hpreg.h	7.1 (Berkeley) %G%
 */

struct hpdevice
{
	int	hpcs1;		/* control and status register 1 */
	int	hpds;		/* drive status */
	int	hper1;		/* error register 1 */
	int	hpmr;		/* maintenance */ 
	int	hpas;		/* attention summary */
	int	hpda;		/* desired address register */
	int	hpdt;		/* drive type */
	int	hpla;		/* look ahead */
	int	hpsn;		/* serial number */
	int	hpof;		/* offset register */
	int	hpdc;		/* desired cylinder address register */
	int	hpcc;		/* current cylinder */
#define	hphr	hpcc		/* holding register */
/* on an rp drive, mr2 is called er2 and er2 is called er3 */
/* we use rm terminology here */
	int	hpmr2;		/* maintenance register 2 */
	int	hper2;		/* error register 2 */
	int	hpec1;		/* burst error bit position */
	int	hpec2;		/* burst error bit pattern */
};

/* hpcs1 */
#define	HP_SC	0100000		/* special condition */
#define	HP_TRE	0040000		/* transfer error */
#define	HP_DVA	0004000		/* drive available */
#define	HP_RDY	0000200		/* controller ready */
#define	HP_IE	0000100		/* interrupt enable */
/* bits 5-1 are the command */
#define	HP_GO	0000001

/* commands */
#define	HP_NOP		000		/* no operation */
#define	HP_UNLOAD	002		/* offline drive */
#define	HP_SEEK		004		/* seek */
#define	HP_RECAL	006		/* recalibrate */
#define	HP_DCLR		010		/* drive clear */
#define	HP_RELEASE	012		/* release */
#define	HP_OFFSET	014		/* offset */
#define	HP_RTC		016		/* return to centerline */
#define	HP_PRESET	020		/* read-in preset */
#define	HP_PACK		022		/* pack acknowledge */
#define	HP_SEARCH	030		/* search */
#define	HP_DIAGNOSE	034		/* diagnose drive */
#define	HP_WCDATA	050		/* write check data */
#define	HP_WCHDR	052		/* write check header and data */
#define	HP_WCOM		060		/* write data */
#define	HP_WHDR		062		/* write header */
#define	HP_WTRACKD	064		/* write track descriptor */
#define	HP_RCOM		070		/* read data */
#define	HP_RHDR		072		/* read header and data */
#define	HP_RTRACKD	074		/* read track descriptor */
	
/* hpds */
#define	HPDS_ATA	0100000		/* attention active */
#define	HPDS_ERR	0040000		/* composite drive error */
#define	HPDS_PIP	0020000		/* positioning in progress */
#define	HPDS_MOL	0010000		/* medium on line */
#define	HPDS_WRL	0004000		/* write locked */
#define	HPDS_LST	0002000		/* last sector transferred */
#define	HPDS_PGM	0001000		/* programmable */
#define	HPDS_DPR	0000400		/* drive present */
#define	HPDS_DRY	0000200		/* drive ready */
#define	HPDS_VV		0000100		/* volume valid */
/* bits 1-5 are spare */
#define	HPDS_OM		0000001		/* offset mode */

#define	HPDS_DREADY	(HPDS_DPR|HPDS_DRY|HPDS_MOL|HPDS_VV)
#define	HPDS_BITS \
"\10\20ATA\17ERR\16PIP\15MOL\14WRL\13LST\12PGM\11DPR\10DRY\7VV\1OM"

/* hper1 */
#define	HPER1_DCK	0100000		/* data check */
#define	HPER1_UNS	0040000		/* drive unsafe */
#define	HPER1_OPI	0020000		/* operation incomplete */
#define	HPER1_DTE	0010000		/* drive timing error */
#define	HPER1_WLE	0004000		/* write lock error */
#define	HPER1_IAE	0002000		/* invalid address error */
#define	HPER1_AOE	0001000		/* address overflow error */
#define	HPER1_HCRC	0000400		/* header crc error */
#define	HPER1_HCE	0000200		/* header compare error */
#define	HPER1_ECH	0000100		/* ecc hard error */
#define HPER1_WCF	0000040		/* write clock fail */
#define	HPER1_FER	0000020		/* format error */
#define	HPER1_PAR	0000010		/* parity error */
#define	HPER1_RMR	0000004		/* register modification refused */
#define	HPER1_ILR	0000002		/* illegal register */
#define	HPER1_ILF	0000001		/* illegal function */

#define	HPER1_BITS \
"\10\20DCK\17UNS\16OPI\15DTE\14WLE\13IAE\12AOE\11HCRC\10HCE\
\7ECH\6WCF\5FER\4PAR\3RMR\2ILR\1ILF"
#define	HPER1_HARD    \
	(HPER1_WLE|HPER1_IAE|HPER1_AOE|\
	 HPER1_FER|HPER1_RMR|HPER1_ILR|HPER1_ILF)

/* hper2 */
#define	HPER2_BSE	0100000		/* bad sector error */
#define	HPER2_SKI	0040000		/* seek incomplete */
#define	HPER2_OPE	0020000		/* operator plug error */
#define	HPER2_IVC	0010000		/* invalid command */
#define	HPER2_LSC	0004000		/* loss of system clock */
#define	HPER2_LBC	0002000		/* loss of bit check */
#define	HPER2_DVC	0000200		/* device check */
#define	HPER2_SSE	0000040		/* skip sector error (rm80) */
#define	HPER2_DPE	0000010		/* data parity error */

#define	HPER2_BITS \
"\10\20BSE\17SKI\16OPE\15IVC\14LSC\13LBC\10DVC\6SSE\4DPE"
#define	HPER2_HARD    (HPER2_OPE)

/* hpof */
#define	HPOF_CMO	0100000		/* command modifier */
#define	HPOF_MTD	0040000		/* move track descriptor */
#define	HPOF_FMT22	0010000		/* 16 bit format */
#define	HPOF_ECI	0004000		/* ecc inhibit */
#define	HPOF_HCI	0002000		/* header compare inhibit */
#define	HPOF_SSEI	0001000		/* skip sector inhibit */

#define	HPOF_P400	020		/*  +400 uinches */
#define	HPOF_M400	0220		/*  -400 uinches */
#define	HPOF_P800	040		/*  +800 uinches */
#define	HPOF_M800	0240		/*  -800 uinches */
#define	HPOF_P1200	060		/* +1200 uinches */
#define	HPOF_M1200	0260		/* -1200 uinches */

/* hphr (alias hpcc) commands */
#define	HPHR_MAXCYL	0x8017		/* maximum cylinder address */
#define	HPHR_MAXTRAK	0x8018		/* maximum track address */
#define	HPHR_MAXSECT	0x8019		/* maximum sector address */
#define	HPHR_FMTENABLE	0xffff		/* enable format command in cs1 */

/* hpmr */
#define	HPMR_SZ		0174000		/* ML11 system size */
#define	HPMR_ARRTYP	0002000		/* ML11 array type */
#define	HPMR_TRT	0001400		/* ML11 transfer rate */

/*
 * Systems Industries kludge: use value in
 * the serial # register to figure out real drive type.
 */
#define	SIMB_MB	0xff00		/* model byte value */
#define	SIMB_S6	0x2000		/* switch s6 */
#define	SIMB_LU	0x0007		/* logical unit (should = drive #) */

#define	SI9775D	0x0700		/* 9775 direct */
#define	SI9775M	0x0e00		/* 9775 mapped */
#define	SI9730D	0x0b00		/* 9730 direct */
#define	SI9730M	0x0d00		/* 9730 mapped */
#define	SI9766	0x0300		/* 9766 */
#define	SI9762	0x0100		/* 9762 */
#define	SICAPD	0x0500		/* Capricorn direct */
#define	SICAPN	0x0400		/* Capricorn mapped */
#define	SI9751D	0x0f00		/* Eagle direct */

#define	SIRM03	0x8000		/* RM03 indication */
#define	SIRM05	0x0000		/* RM05 pseudo-indication */
Commit	Line	Data
da7c5cc6	1	/*
0880b18e	2	* Copyright (c) 1982, 1986 Regents of the University of California.
da7c5cc6 KM	3	* All rights reserved. The Berkeley software License Agreement
	4	* specifies the terms and conditions for redistribution.
	5	*
0880b18e	6	* @(#)hpreg.h 7.1 (Berkeley) %G%
da7c5cc6	7	*/
71a3af01	8
2b90295a	9	struct hpdevice
71a3af01	10	{
2b90295a BJ	11	int hpcs1; /* control and status register 1 */
	12	int hpds; /* drive status */
	13	int hper1; /* error register 1 */
	14	int hpmr; /* maintenance */
	15	int hpas; /* attention summary */
	16	int hpda; /* desired address register */
	17	int hpdt; /* drive type */
	18	int hpla; /* look ahead */
71a3af01	19	int hpsn; /* serial number */
2b90295a BJ	20	int hpof; /* offset register */
	21	int hpdc; /* desired cylinder address register */
	22	int hpcc; /* current cylinder */
fc7080e1	23	#define hphr hpcc /* holding register */
5ff2a969 BJ	24	/* on an rp drive, mr2 is called er2 and er2 is called er3 */
	25	/* we use rm terminology here */
	26	int hpmr2; /* maintenance register 2 */
2b90295a	27	int hper2; /* error register 2 */
2b90295a BJ	28	int hpec1; /* burst error bit position */
2b90295a BJ	29	int hpec2; /* burst error bit pattern */
71a3af01 BJ	30	};
71a3af01 BJ	31
2b90295a BJ	32	/* hpcs1 */
	33	#define HP_SC 0100000 /* special condition */
	34	#define HP_TRE 0040000 /* transfer error */
	35	#define HP_DVA 0004000 /* drive available */
	36	#define HP_RDY 0000200 /* controller ready */
	37	#define HP_IE 0000100 /* interrupt enable */
	38	/* bits 5-1 are the command */
	39	#define HP_GO 0000001
	40
	41	/* commands */
	42	#define HP_NOP 000 /* no operation */
	43	#define HP_UNLOAD 002 /* offline drive */
	44	#define HP_SEEK 004 /* seek */
	45	#define HP_RECAL 006 /* recalibrate */
	46	#define HP_DCLR 010 /* drive clear */
	47	#define HP_RELEASE 012 /* release */
	48	#define HP_OFFSET 014 /* offset */
	49	#define HP_RTC 016 /* return to centerline */
	50	#define HP_PRESET 020 /* read-in preset */
	51	#define HP_PACK 022 /* pack acknowledge */
	52	#define HP_SEARCH 030 /* search */
	53	#define HP_DIAGNOSE 034 /* diagnose drive */
	54	#define HP_WCDATA 050 /* write check data */
	55	#define HP_WCHDR 052 /* write check header and data */
	56	#define HP_WCOM 060 /* write data */
	57	#define HP_WHDR 062 /* write header */
	58	#define HP_WTRACKD 064 /* write track descriptor */
	59	#define HP_RCOM 070 /* read data */
	60	#define HP_RHDR 072 /* read header and data */
	61	#define HP_RTRACKD 074 /* read track descriptor */
	62
	63	/* hpds */
a0eab615 BJ	64	#define HPDS_ATA 0100000 /* attention active */
	65	#define HPDS_ERR 0040000 /* composite drive error */
	66	#define HPDS_PIP 0020000 /* positioning in progress */
	67	#define HPDS_MOL 0010000 /* medium on line */
	68	#define HPDS_WRL 0004000 /* write locked */
	69	#define HPDS_LST 0002000 /* last sector transferred */
	70	#define HPDS_PGM 0001000 /* programmable */
	71	#define HPDS_DPR 0000400 /* drive present */
	72	#define HPDS_DRY 0000200 /* drive ready */
	73	#define HPDS_VV 0000100 /* volume valid */
2b90295a	74	/* bits 1-5 are spare */
a0eab615	75	#define HPDS_OM 0000001 /* offset mode */
2b90295a	76
a0eab615	77	#define HPDS_DREADY (HPDS_DPR\|HPDS_DRY\|HPDS_MOL\|HPDS_VV)
4656c503 BJ	78	#define HPDS_BITS \
	79	"\10\20ATA\17ERR\16PIP\15MOL\14WRL\13LST\12PGM\11DPR\10DRY\7VV\1OM"
	80
2b90295a	81	/* hper1 */
a0eab615 BJ	82	#define HPER1_DCK 0100000 /* data check */
	83	#define HPER1_UNS 0040000 /* drive unsafe */
	84	#define HPER1_OPI 0020000 /* operation incomplete */
	85	#define HPER1_DTE 0010000 /* drive timing error */
	86	#define HPER1_WLE 0004000 /* write lock error */
	87	#define HPER1_IAE 0002000 /* invalid address error */
	88	#define HPER1_AOE 0001000 /* address overflow error */
	89	#define HPER1_HCRC 0000400 /* header crc error */
	90	#define HPER1_HCE 0000200 /* header compare error */
	91	#define HPER1_ECH 0000100 /* ecc hard error */
	92	#define HPER1_WCF 0000040 /* write clock fail */
	93	#define HPER1_FER 0000020 /* format error */
	94	#define HPER1_PAR 0000010 /* parity error */
	95	#define HPER1_RMR 0000004 /* register modification refused */
	96	#define HPER1_ILR 0000002 /* illegal register */
	97	#define HPER1_ILF 0000001 /* illegal function */
2b90295a	98
4656c503 BJ	99	#define HPER1_BITS \
	100	"\10\20DCK\17UNS\16OPI\15DTE\14WLE\13IAE\12AOE\11HCRC\10HCE\
	101	\7ECH\6WCF\5FER\4PAR\3RMR\2ILR\1ILF"
a0eab615	102	#define HPER1_HARD \
72b6c281	103	(HPER1_WLE\|HPER1_IAE\|HPER1_AOE\|\
a0eab615	104	HPER1_FER\|HPER1_RMR\|HPER1_ILR\|HPER1_ILF)
2b90295a BJ	105
2b90295a BJ	106	/* hper2 */
a0eab615 BJ	107	#define HPER2_BSE 0100000 /* bad sector error */
	108	#define HPER2_SKI 0040000 /* seek incomplete */
	109	#define HPER2_OPE 0020000 /* operator plug error */
	110	#define HPER2_IVC 0010000 /* invalid command */
	111	#define HPER2_LSC 0004000 /* loss of system clock */
	112	#define HPER2_LBC 0002000 /* loss of bit check */
	113	#define HPER2_DVC 0000200 /* device check */
f6b9107b	114	#define HPER2_SSE 0000040 /* skip sector error (rm80) */
a0eab615	115	#define HPER2_DPE 0000010 /* data parity error */
2b90295a	116
4656c503	117	#define HPER2_BITS \
49cb6123	118	"\10\20BSE\17SKI\16OPE\15IVC\14LSC\13LBC\10DVC\6SSE\4DPE"
53962147	119	#define HPER2_HARD (HPER2_OPE)
2b90295a BJ	120
2b90295a BJ	121	/* hpof */
a0eab615 BJ	122	#define HPOF_CMO 0100000 /* command modifier */
	123	#define HPOF_MTD 0040000 /* move track descriptor */
	124	#define HPOF_FMT22 0010000 /* 16 bit format */
	125	#define HPOF_ECI 0004000 /* ecc inhibit */
	126	#define HPOF_HCI 0002000 /* header compare inhibit */
	127	#define HPOF_SSEI 0001000 /* skip sector inhibit */
2b90295a	128
a0eab615 BJ	129	#define HPOF_P400 020 /* +400 uinches */
	130	#define HPOF_M400 0220 /* -400 uinches */
	131	#define HPOF_P800 040 /* +800 uinches */
	132	#define HPOF_M800 0240 /* -800 uinches */
	133	#define HPOF_P1200 060 /* +1200 uinches */
	134	#define HPOF_M1200 0260 /* -1200 uinches */
c388eeb2	135
fc7080e1 SL	136	/* hphr (alias hpcc) commands */
	137	#define HPHR_MAXCYL 0x8017 /* maximum cylinder address */
	138	#define HPHR_MAXTRAK 0x8018 /* maximum track address */
	139	#define HPHR_MAXSECT 0x8019 /* maximum sector address */
	140	#define HPHR_FMTENABLE 0xffff /* enable format command in cs1 */
	141
c388eeb2 BJ	142	/* hpmr */
	143	#define HPMR_SZ 0174000 /* ML11 system size */
	144	#define HPMR_ARRTYP 0002000 /* ML11 array type */
	145	#define HPMR_TRT 0001400 /* ML11 transfer rate */
fc7080e1 SL	146
	147	/*
	148	* Systems Industries kludge: use value in
	149	* the serial # register to figure out real drive type.
	150	*/
	151	#define SIMB_MB 0xff00 /* model byte value */
	152	#define SIMB_S6 0x2000 /* switch s6 */
	153	#define SIMB_LU 0x0007 /* logical unit (should = drive #) */
	154
	155	#define SI9775D 0x0700 /* 9775 direct */
	156	#define SI9775M 0x0e00 /* 9775 mapped */
	157	#define SI9730D 0x0b00 /* 9730 direct */
	158	#define SI9730M 0x0d00 /* 9730 mapped */
	159	#define SI9766 0x0300 /* 9766 */
	160	#define SI9762 0x0100 /* 9762 */
3c5afe70 SL	161	#define SICAPD 0x0500 /* Capricorn direct */
	162	#define SICAPN 0x0400 /* Capricorn mapped */
	163	#define SI9751D 0x0f00 /* Eagle direct */
fc7080e1 SL	164
	165	#define SIRM03 0x8000 /* RM03 indication */
	166	#define SIRM05 0x0000 /* RM05 pseudo-indication */