BSD 4_4_Lite1 development
[unix-history] / .ref-BSD-4_4 / usr / src / sys / sparc / include / cpu.h
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90587a41 1/*
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2 * Copyright (c) 1992, 1993
3 * The Regents of the University of California. All rights reserved.
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4 *
5 * This software was developed by the Computer Systems Engineering group
6 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
7 * contributed to Berkeley.
8 *
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9 * All advertising materials mentioning features or use of this software
10 * must display the following acknowledgement:
11 * This product includes software developed by the University of
062bb472 12 * California, Lawrence Berkeley Laboratory.
b480239a 13 *
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14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the distribution.
22 * 3. All advertising materials mentioning features or use of this software
23 * must display the following acknowledgement:
24 * This product includes software developed by the University of
25 * California, Berkeley and its contributors.
26 * 4. Neither the name of the University nor the names of its contributors
27 * may be used to endorse or promote products derived from this software
28 * without specific prior written permission.
29 *
30 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
31 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
32 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
33 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
34 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
35 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
36 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
37 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
38 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
39 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
40 * SUCH DAMAGE.
90587a41 41 *
ad787160 42 * @(#)cpu.h 8.1 (Berkeley) 6/11/93
90587a41 43 *
42158806 44 * from: $Header: cpu.h,v 1.12 93/05/25 10:36:34 torek Exp $ (LBL)
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45 */
46
47#ifndef _CPU_H_
48#define _CPU_H_
49
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50/*
51 * CTL_MACHDEP definitinos.
52 */
53#define CPU_MAXID 1 /* no valid machdep ids */
54
55#define CTL_MACHDEP_NAMES { \
56 { 0, 0 }, \
57}
90587a41 58
42158806 59#ifdef KERNEL
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60/*
61 * Exported definitions unique to SPARC cpu support.
62 */
63
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64#include <machine/psl.h>
65#include <sparc/sparc/intreg.h>
66
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67/*
68 * definitions of cpu-dependent requirements
69 * referenced in generic code
70 */
71#define COPY_SIGCODE /* copy sigcode above user stack in exec */
72
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73#define cpu_exec(p) /* nothing */
74#define cpu_wait(p) /* nothing */
75#define cpu_setstack(p, ap) ((p)->p_md.md_tf->tf_out[6] = (ap) - 64)
76
77/*
78 * Arguments to hardclock, softclock and gatherstats encapsulate the
79 * previous machine state in an opaque clockframe. The ipl is here
80 * as well for strayintr (see locore.s:interrupt and intr.c:strayintr).
81 * Note that CLKF_INTR is valid only if CLKF_USERMODE is false.
82 */
83struct clockframe {
84 u_int psr; /* psr before interrupt, excluding PSR_ET */
85 u_int pc; /* pc at interrupt */
86 u_int npc; /* npc at interrupt */
87 u_int ipl; /* actual interrupt priority level */
88 u_int fp; /* %fp at interrupt */
89};
90
91extern int eintstack[];
92
93#define CLKF_USERMODE(framep) (((framep)->psr & PSR_PS) == 0)
94#define CLKF_BASEPRI(framep) (((framep)->psr & PSR_PIL) == 0)
95#define CLKF_PC(framep) ((framep)->pc)
96#define CLKF_INTR(framep) ((framep)->fp < (u_int)eintstack)
97
98/*
99 * Software interrupt request `register'.
100 */
101union sir {
102 int sir_any;
103 char sir_which[4];
104} sir;
105
106#define SIR_NET 0
107#define SIR_CLOCK 1
108
109#define setsoftint() ienab_bis(IE_L1)
110#define setsoftnet() (sir.sir_which[SIR_NET] = 1, setsoftint())
111#define setsoftclock() (sir.sir_which[SIR_CLOCK] = 1, setsoftint())
112
113int want_ast;
114
115/*
116 * Preempt the current process if in interrupt from user mode,
117 * or after the current trap/syscall if in system mode.
118 */
119int want_resched; /* resched() was called */
120#define need_resched() (want_resched = 1, want_ast = 1)
121
122/*
123 * Give a profiling tick to the current process when the user profiling
124 * buffer pages are invalid. On the sparc, request an ast to send us
125 * through trap(), marking the proc as needing a profiling tick.
126 */
127#define need_proftick(p) ((p)->p_flag |= SOWEUPC, want_ast = 1)
128
129/*
130 * Notify the current process (p) that it has a signal pending,
131 * process as soon as possible.
132 */
133#define signotify(p) (want_ast = 1)
134
135/*
136 * Only one process may own the FPU state.
137 *
138 * XXX this must be per-cpu (eventually)
139 */
140struct proc *fpproc; /* FPU owner */
141int foundfpu; /* true => we have an FPU */
142
143/*
144 * Interrupt handler chains. Interrupt handlers should return 0 for
145 * ``not me'' or 1 (``I took care of it''). intr_establish() inserts a
146 * handler into the list. The handler is called with its (single)
147 * argument, or with a pointer to a clockframe if ih_arg is NULL.
148 */
149struct intrhand {
150 int (*ih_fun) __P((void *));
151 void *ih_arg;
152 struct intrhand *ih_next;
153} *intrhand[15];
154
155void intr_establish __P((int level, struct intrhand *));
156
157/*
158 * intr_fasttrap() is a lot like intr_establish, but is used for ``fast''
159 * interrupt vectors (vectors that are not shared and are handled in the
160 * trap window). Such functions must be written in assembly.
161 */
162void intr_fasttrap __P((int level, void (*vec)(void)));
163
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164#endif /* KERNEL */
165#endif /* _CPU_H_ */