Commit | Line | Data |
---|---|---|
b6e137a6 | 1 | /* nexus.h 4.3 81/02/26 */ |
9c319e96 BJ |
2 | |
3 | /* | |
4 | * Information about nexus's. | |
5 | */ | |
6 | #if VAX780 | |
7 | #define NNEX780 16 | |
8 | #define NEX780 ((struct nexus *)0x20000000) | |
9 | #endif | |
10 | #if VAX750 | |
11 | #define NNEX750 4 | |
12 | #define NEX750 ((struct nexus *)0xf28000) | |
13 | #endif | |
14 | #define NEXSIZE 0x2000 | |
15 | ||
b6e137a6 BJ |
16 | #if VAX780 |
17 | #define NNEXUS 16 | |
18 | #else | |
19 | #define NNEXUS 6 /* 4 mba slots + mem + uba */ | |
20 | #endif | |
21 | ||
22 | #ifndef LOCORE | |
9c319e96 BJ |
23 | struct nexus { |
24 | union nexcsr { | |
25 | long nex_csr; | |
26 | u_char nex_type; | |
27 | } nexcsr; | |
28 | long nex_pad[NEXSIZE / sizeof (long) - 1]; | |
29 | }; | |
b6e137a6 | 30 | #endif |
9c319e96 | 31 | #ifdef KERNEL |
b6e137a6 | 32 | extern struct nexus nexus[NNEXUS]; |
9c319e96 BJ |
33 | #endif |
34 | ||
35 | /* | |
36 | * Bits in high word of nexus's. | |
37 | */ | |
38 | #define SBI_PARFLT (1<<31) /* sbi parity fault */ | |
39 | #define SBI_WSQFLT (1<<30) /* write sequence fault */ | |
40 | #define SBI_UIDFLT (1<<29) /* unexpected read data fault */ | |
41 | #define SBI_ISQFLT (1<<28) /* interlock sequence fault */ | |
42 | #define SBI_MXTFLT (1<<27) /* multiple transmitter fault */ | |
43 | #define SBI_XMTFLT (1<<26) /* transmit fault */ | |
44 | ||
45 | #define NEX_CFGFLT (0xfc000000) | |
46 | ||
47 | #define NEX_APD (1<<23) /* adaptor power down */ | |
48 | #define NEX_APU (1<<22) /* adaptor power up */ | |
49 | ||
50 | #define MBA_OT (1<<21) /* overtemperature */ | |
51 | ||
52 | #define UBA_UBINIT (1<<18) /* unibus init */ | |
53 | #define UBA_UBPDN (1<<17) /* unibus power down */ | |
54 | #define UBA_UBIC (1<<16) /* unibus initialization complete */ | |
55 | ||
56 | /* | |
57 | * Types for nex_type. | |
58 | */ | |
59 | #define NEX_MEM4 0x08 /* 4K chips, non-interleaved mem */ | |
60 | #define NEX_MEM4I 0x09 /* 4K chips, interleaved mem */ | |
61 | #define NEX_MEM16 0x10 /* 16K chips, non-interleaved mem */ | |
62 | #define NEX_MEM16I 0x11 /* 16K chips, interleaved mem */ | |
63 | #define NEX_MBA 0x20 /* Massbus adaptor */ | |
64 | #define NEX_UBA0 0x28 /* Unibus adaptor */ | |
65 | #define NEX_UBA1 0x29 /* 4 flavours for 4 addr spaces */ | |
66 | #define NEX_UBA2 0x2a | |
67 | #define NEX_UBA3 0x2b | |
68 | #define NEX_DR32 0x30 /* DR32 user i'face to SBI */ | |
69 | #define NEX_MPM0 0x40 /* Multi-port mem */ | |
70 | #define NEX_MPM1 0x41 /* Who knows why 4 different ones ? */ | |
71 | #define NEX_MPM2 0x42 | |
72 | #define NEX_MPM3 0x43 |