(wnj) 82/10/17 ioctl/open return errors, not u.u_error; remove ubarelses
[unix-history] / usr / src / sys / vax / uba / va.c
CommitLineData
697e6d05 1/* va.c 4.13.1.3 82/11/27 */
20cc8b5b 2
66b4fb09 3#include "va.h"
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4#if NVA > 0
5/*
fc4d0a69 6 * Varian printer plotter
a5cc519e 7 */
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8#include "../h/param.h"
9#include "../h/dir.h"
10#include "../h/user.h"
11#include "../h/buf.h"
12#include "../h/systm.h"
13#include "../h/map.h"
14#include "../h/pte.h"
20cc8b5b 15#include "../h/vcmd.h"
515ce90f 16#include "../h/uio.h"
20cc8b5b 17
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18#include "../vaxuba/ubareg.h"
19#include "../vaxuba/ubavar.h"
20
410d35e9 21int vadebug = 0;
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22#define dprintf if(vadebug)printf
23
71357272 24unsigned minvaph();
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25
26#define VAPRI (PZERO-1)
27
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28struct vadevice {
29 u_short vaba; /* buffer address */
30 short vawc; /* word count (2's complement) */
20cc8b5b 31 union {
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32 short Vacsw; /* control status as word */
33 struct { /* control status as bytes */
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34 char Vacsl;
35 char Vacsh;
36 } vacsr;
37 } vacs;
fc4d0a69 38 short vadata; /* programmed i/o data buffer */
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39};
40
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41#define vacsw vacs.Vacsw
42#define vacsh vacs.vacsr.Vacsh
43#define vacsl vacs.vacsr.Vacsl
44
71357272 45/* vacsw bits */
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46#define VA_ERROR 0100000 /* some error has occurred */
47#define VA_NPRTIMO 0001000 /* DMA timeout error */
48#define VA_NOTREADY 0000400 /* something besides NPRTIMO */
49#define VA_DONE 0000200
50#define VA_IENABLE 0000100 /* interrupt enable */
915905f4 51#define VA_DMAGO 0000010 /* DMA go bit */
515ce90f 52#define VA_DMAGO 0000010 /* DMA go bit */
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53#define VA_SUPPLIESLOW 0000004
54#define VA_BOTOFFORM 0000002
55#define VA_BYTEREVERSE 0000001 /* reverse byte order in words */
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56
57/* vacsh command bytes */
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58#define VAPLOT 0000340
59#define VAPRINT 0000100
60#define VAPRINTPLOT 0000160
61#define VAAUTOSTEP 0000244
62#define VANOAUTOSTEP 0000045
63#define VAFORMFEED 0000263
64#define VASLEW 0000265
65#define VASTEP 0000064
66
67struct va_softc {
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68 u_char sc_openf; /* exclusive open flag */
69 u_char sc_iostate; /* kind of I/O going on */
70#define VAS_IDLE 0 /* no I/O, free */
71#define VAS_PIO 1 /* programmed I/O */
72#define VAS_DMA 2 /* DMA, block pio */
73#define VAS_WANT 4 /* wakeup when iostate changes */
74 short sc_tocnt; /* time out counter */
75 short sc_info; /* csw passed from vaintr */
76 int sc_state; /* print/plot state of device */
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77} va_softc[NVA];
78
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79#define VAUNIT(dev) (minor(dev))
80
81struct buf rvabuf[NVA];
82
915905f4 83int vaprobe(), vaslave(), vaattach(), vadgo();
fc4d0a69 84struct uba_device *vadinfo[NVA];
915905f4 85struct uba_ctlr *vaminfo[NVA];
410d35e9 86struct buf vabhdr[NVA];
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87u_short vastd[] = { 0764000, 0 };
88struct uba_driver vadriver =
915905f4 89 { vaprobe, vaslave, vaattach, vadgo, vastd, "vz", vadinfo, "va", vaminfo };
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90
91vaprobe(reg)
92 caddr_t reg;
93{
94 register int br, cvec; /* value-result */
95 register struct vadevice *vaaddr = (struct vadevice *)reg;
96
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97#ifdef lint
98 br = 0; cvec = br; br = cvec;
99 vaintr(0);
100#endif
877283f6 101#ifndef UCBVAX
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102 vaaddr->vacsl = VA_IENABLE;
103 vaaddr->vaba = 0;
104 vaaddr->vacsh = VAPLOT;
515ce90f 105#ifndef VARIANGOBIT
877283f6 106 vaaddr->vacsl = VA_IENABLE|VA_DMAGO;
fc4d0a69 107 vaaddr->vawc = -1;
877283f6 108 DELAY(10000);
fc4d0a69 109 vaaddr->vacsl = 0;
515ce90f 110 return (sizeof (struct vadevice));
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111 vaaddr->vawc = 0;
112#else
113 br=0x14;
114 cvec=0170;
115#endif
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116}
117
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118/*ARGSUSED*/
119vaslave(ui, reg)
120 struct uba_device *ui;
121 caddr_t reg;
122{
123
124 ui->ui_dk = 0;
125 return (ui->ui_unit <= 0);
126}
127
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128/*ARGSUSED*/
129vaattach(ui)
130 struct uba_device *ui;
131{
132
410d35e9 133 ui->ui_mi->um_tab.b_actf = &vabhdr[ui->ui_unit];
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134}
135
136vaopen(dev)
137 dev_t dev;
20cc8b5b 138{
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139 register struct va_softc *sc;
140 register struct vadevice *vaaddr;
141 register struct uba_device *ui;
697e6d05 142 int error;
915905f4 143 int unit = VAUNIT(dev);
20cc8b5b 144
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145 (ui = vadinfo[VAUNIT(dev)]) == 0 || ui->ui_alive == 0)
146 return (ENXIO);
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147 vaaddr = (struct vadevice *)ui->ui_addr;
148 sc->sc_openf = 1;
149 vaaddr->vawc = 0;
fc4d0a69 150 sc->sc_state = 0;
877283f6 151 sc->sc_tocnt = 0;
915905f4 152 sc->sc_iostate = VAS_IDLE;
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153 vaaddr->vacsl = VA_IENABLE;
154 vatimo(dev);
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155 error = vacmd(dev, VPRINT);
156 if (error)
fc4d0a69 157 vaclose(dev);
697e6d05 158 return (error);
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159}
160
161vastrategy(bp)
162 register struct buf *bp;
163{
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164 register struct uba_device *ui;
165 register struct uba_ctlr *um;
166 int s;
167
410d35e9 168 dprintf("vastrategy(%x)\n", bp);
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169 ui = vadinfo[VAUNIT(bp->b_dev)];
170 if (ui == 0 || ui->ui_alive == 0) {
171 bp->b_flags |= B_ERROR;
172 iodone(bp);
173 return;
20cc8b5b 174 }
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175 s = spl4();
176 um = ui->ui_mi;
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177 bp->b_actf = NULL;
178 if (um->um_tab.b_actf->b_actf == NULL)
179 um->um_tab.b_actf->b_actf = bp;
180 else {
181 printf("bp = 0x%x, um->um_tab.b_actf->b_actf = 0x%x\n",
182 bp, um->um_tab.b_actf->b_actf);
183 panic("vastrategy");
184 um->um_tab.b_actf->b_actl->b_forw = bp;
185 }
186 um->um_tab.b_actf->b_actl = bp;
187 bp = um->um_tab.b_actf;
188 dprintf("vastrategy: bp=%x actf=%x active=%d\n",
189 bp, bp->b_actf, bp->b_active);
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190 if (bp->b_actf && bp->b_active == 0)
191 (void) vastart(um);
192 splx(s);
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193}
194
195int vablock = 16384;
196
197unsigned
198minvaph(bp)
fc4d0a69 199 struct buf *bp;
20cc8b5b 200{
fc4d0a69 201
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202 if (bp->b_bcount > vablock)
203 bp->b_bcount = vablock;
204}
205
206/*ARGSUSED*/
515ce90f 207vawrite(dev, uio)
fc4d0a69 208 dev_t dev;
515ce90f 209 struct uio *uio;
20cc8b5b 210{
915905f4 211
515ce90f 212 if (VAUNIT(dev) > NVA)
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213 return (ENXIO);
214 return (physio(vastrategy, &rvabuf[VAUNIT(dev)], dev, B_WRITE,
215 minvaph, uio));
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216}
217
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218vastart(um)
219 register struct uba_ctlr *um;
20cc8b5b 220{
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221 struct buf *bp;
222 struct vadevice *vaaddr;
223 register struct va_softc *sc;
224 int unit;
20cc8b5b 225
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226 dprintf("vastart(%x), bp=%x\n", um, um->um_tab.b_actf->b_actf);
227 if ((bp = um->um_tab.b_actf->b_actf) == NULL)
915905f4 228 return;
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229 unit = VAUNIT(bp->b_dev);
230 sc = &va_softc[unit];
410d35e9 231 sc->sc_tocnt = 0;
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232 while (sc->sc_iostate&VAS_PIO) {
233 sc->sc_iostate |= VAS_WANT;
234 sleep((caddr_t)&sc->sc_iostate, VAPRI);
877283f6 235 }
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236 sc->sc_iostate |= VAS_DMA;
237 vaaddr = (struct vadevice *)um->um_addr;
238 vaaddr->vacsl = 0;
239 vaaddr->vawc = -(bp->b_bcount / 2);
240 um->um_cmd = VA_DMAGO | VA_IENABLE;
241 (void) ubago(vadinfo[unit]);
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242}
243
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244vadgo(um)
245 register struct uba_ctlr *um;
20cc8b5b 246{
915905f4 247 register struct vadevice *vaaddr = (struct vadevice *)um->um_addr;
410d35e9 248 register struct buf *bp;
915905f4 249
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250 bp = um->um_tab.b_actf;
251 va_softc[VAUNIT(bp->b_actf->b_dev)].sc_tocnt = 0;
252 bp->b_active++;
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253 vaaddr->vaba = um->um_ubinfo;
254 vaaddr->vacsl = ((um->um_ubinfo >> 12) & 0x30) | um->um_cmd;
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255}
256
257/*ARGSUSED*/
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258vaioctl(dev, cmd, data, flag)
259 register caddr_t data;
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260{
261 register int vcmd;
fc4d0a69 262 register struct va_softc *sc = &va_softc[VAUNIT(dev)];
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263
264 switch (cmd) {
265
266 case VGETSTATE:
515ce90f 267 *(int *)data = sc->sc_state;
697e6d05 268 break;
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269
270 case VSETSTATE:
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271 return (vacmd(dev, *(int *)data));
272 break;
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273
274 default:
697e6d05 275 return (ENOTTY);
20cc8b5b 276 }
697e6d05 277 return (0);
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278}
279
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280vacmd(dev, vcmd)
281 dev_t dev;
282 int vcmd;
20cc8b5b 283{
fc4d0a69 284 register struct va_softc *sc = &va_softc[VAUNIT(dev)];
915905f4 285 int s, cmd;
fc4d0a69 286
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287 s = spl4();
288 while (sc->sc_iostate&VAS_DMA) {
289 sc->sc_iostate |= VAS_WANT;
290 sleep((caddr_t)&sc->sc_iostate, VAPRI);
291 }
292 sc->sc_iostate |= VAS_PIO;
877283f6 293 sc->sc_tocnt = 0;
915905f4 294 cmd = 0;
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295 switch (vcmd) {
296
297 case VPLOT:
298 /* Must turn on plot AND autostep modes. */
915905f4 299 if (vadopio(dev, VAPLOT))
697e6d05 300 error = EIO;
915905f4 301 cmd = VAAUTOSTEP;
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302 break;
303
304 case VPRINT:
915905f4 305 cmd = VAPRINT;
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306 break;
307
308 case VPRINTPLOT:
915905f4 309 cmd = VAPRINTPLOT;
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310 break;
311 }
fc4d0a69 312 sc->sc_state = (sc->sc_state & ~(VPLOT|VPRINT|VPRINTPLOT)) | vcmd;
915905f4 313 if (cmd && vadopio(dev, cmd))
697e6d05 314 error = EIO;
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315 sc->sc_iostate &= ~VAS_PIO;
316 if (sc->sc_iostate&VAS_WANT) {
317 sc->sc_iostate &= ~VAS_WANT;
318 wakeup((caddr_t)&sc->sc_iostate);
319 }
320 splx(s);
321}
322
323vadopio(dev, cmd)
324 dev_t dev;
325 int cmd;
326{
327 register struct vadevice *vaaddr =
328 (struct vadevice *)vaminfo[VAUNIT(dev)]->um_addr;
329 register struct va_softc *sc = &va_softc[VAUNIT(dev)];
330
331 sc->sc_info = 0;
332 vaaddr->vacsh = cmd;
333 while ((sc->sc_info&(VA_DONE|VA_ERROR)) == 0)
334 sleep((caddr_t)&sc->sc_info, VAPRI);
335 return (sc->sc_info&VA_ERROR);
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336}
337
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338vatimo(dev)
339 dev_t dev;
20cc8b5b 340{
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341 register struct va_softc *sc = &va_softc[VAUNIT(dev)];
342
343 if (sc->sc_openf)
877283f6 344 timeout(vatimo, (caddr_t)dev, hz/2);
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345 if (++sc->sc_tocnt < 2)
346 return;
347 sc->sc_tocnt = 0;
410d35e9 348 dprintf("vatimo: calling vaintr\n");
915905f4 349 vaintr(dev);
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350}
351
352/*ARGSUSED*/
353vaintr(dev)
fc4d0a69 354 dev_t dev;
20cc8b5b 355{
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356 register struct uba_ctlr *um;
357 struct vadevice *vaaddr;
358 struct buf *bp;
359 register int unit = VAUNIT(dev), e;
360 register struct va_softc *sc = &va_softc[unit];
361
362 um = vaminfo[unit];
363 vaaddr = (struct vadevice *)um->um_addr;
364 e = vaaddr->vacsw;
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365 dprintf("vaintr: um=0x%x, e=0x%x, b_active %d\n",
366 um, e, um->um_tab.b_actf->b_active);
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367 if ((e&(VA_DONE|VA_ERROR)) == 0)
368 return;
369 vaaddr->vacsl = 0;
370 if ((e&VA_ERROR) && (e&VA_NPRTIMO))
371 printf("va%d: npr timeout\n", unit);
372 if (sc->sc_iostate&VAS_PIO) {
373 sc->sc_info = e;
374 wakeup((caddr_t)&sc->sc_info);
375 return;
376 }
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377 if (um->um_tab.b_actf->b_active) {
378 bp = um->um_tab.b_actf->b_actf;
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379 if (e&VA_ERROR)
380 bp->b_flags |= B_ERROR;
381 if (sc->sc_state&VPRINTPLOT) {
382 sc->sc_state = (sc->sc_state & ~VPRINTPLOT) | VPLOT;
383 vaaddr->vacsh = VAAUTOSTEP;
384 return;
385 }
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386 ubadone(um);
387 um->um_tab.b_actf->b_active = 0;
388 um->um_tab.b_actf->b_actf = bp->b_forw;
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389 bp->b_active = 0;
390 bp->b_errcnt = 0;
391 bp->b_resid = 0;
392 iodone(bp);
393 }
410d35e9 394 if (um->um_tab.b_actf->b_actf == 0) {
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395 sc->sc_iostate &= ~VAS_DMA;
396 if (sc->sc_iostate&VAS_WANT) {
397 sc->sc_iostate &= ~VAS_WANT;
398 wakeup((caddr_t)&sc->sc_iostate);
399 }
400 return;
401 }
410d35e9 402 if (um->um_tab.b_actf->b_active == 0)
915905f4 403 vastart(um);
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404}
405
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406vaclose(dev)
407 dev_t dev;
20cc8b5b 408{
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409 register struct va_softc *sc = &va_softc[VAUNIT(dev)];
410 register struct vadevice *vaaddr =
411 (struct vadevice *)vadinfo[VAUNIT(dev)]->ui_addr;
412
413 sc->sc_openf = 0;
fc4d0a69 414 sc->sc_state = 0;
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415 if (sc->sc_iostate != VAS_IDLE)
416 wakeup((caddr_t)&sc->sc_iostate);
417 sc->sc_iostate = VAS_IDLE;
fc4d0a69 418 vaaddr->vacsl = 0;
877283f6 419 vaaddr->vawc = 0;
71357272
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420}
421
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422vareset(uban)
423 int uban;
71357272 424{
fc4d0a69 425 register int va11;
915905f4 426 register struct uba_ctlr *um;
fc4d0a69 427 register struct vadevice *vaaddr;
915905f4 428 register struct va_softc *sc;
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429
430 for (va11 = 0; va11 < NVA; va11++, sc++) {
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431 if ((um = vaminfo[va11]) == 0 || um->um_ubanum != uban ||
432 um->um_alive == 0)
433 continue;
434 sc = &va_softc[um->um_ctlr];
435 if (sc->sc_openf == 0)
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436 continue;
437 printf(" va%d", va11);
915905f4 438 vaaddr = (struct vadevice *)um->um_addr;
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439 vaaddr->vacsl = VA_IENABLE;
440 if (sc->sc_state & VPLOT) {
441 vaaddr->vacsh = VAPLOT;
442 DELAY(10000);
443 vaaddr->vacsh = VAAUTOSTEP;
444 } else if (sc->sc_state & VPRINTPLOT)
445 vaaddr->vacsh = VPRINTPLOT;
446 else
447 vaaddr->vacsh = VAPRINTPLOT;
71357272 448 DELAY(10000);
915905f4 449 (void) vastart(um);
71357272 450 }
20cc8b5b 451}
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452
453vaselect()
454{
697e6d05 455
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456 return (1);
457}
a5cc519e 458#endif