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14b18c23 WJ |
1 | /* Search an insn for pseudo regs that must be in hard regs and are not. |
2 | Copyright (C) 1987, 1988, 1989 Free Software Foundation, Inc. | |
3 | ||
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 1, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
19 | ||
20 | ||
21 | /* This file contains subroutines used only from the file reload1.c. | |
22 | It knows how to scan one insn for operands and values | |
23 | that need to be copied into registers to make valid code. | |
24 | It also finds other operands and values which are valid | |
25 | but for which equivalent values in registers exist and | |
26 | ought to be used instead. | |
27 | ||
28 | Before processing the first insn of the function, call `init_reload'. | |
29 | ||
30 | To scan an insn, call `find_reloads'. This does two things: | |
31 | 1. sets up tables describing which values must be reloaded | |
32 | for this insn, and what kind of hard regs they must be reloaded into; | |
33 | 2. optionally record the locations where those values appear in | |
34 | the data, so they can be replaced properly later. | |
35 | This is done only if the second arg to `find_reloads' is nonzero. | |
36 | ||
37 | The third arg to `find_reloads' specifies the value of `indirect_ok'. | |
38 | ||
39 | Then you must choose the hard regs to reload those pseudo regs into, | |
40 | and generate appropriate load insns before this insn and perhaps | |
41 | also store insns after this insn. Set up the array `reload_reg_rtx' | |
42 | to contain the REG rtx's for the registers you used. In some | |
43 | cases `find_reloads' will return a nonzero value in `reload_reg_rtx' | |
44 | for certain reloads. Then that tells you which register to use, | |
45 | so you do not need to allocate one. But you still do need to add extra | |
46 | instructions to copy the value into and out of that register. | |
47 | ||
48 | Finally you must call `subst_reloads' to substitute the reload reg rtx's | |
49 | into the locations already recorded. | |
50 | ||
51 | NOTE SIDE EFFECTS: | |
52 | ||
53 | find_reloads can alter the operands of the instruction it is called on. | |
54 | ||
55 | 1. Two operands of any sort may be interchanged, if they are in a | |
56 | commutative instruction. | |
57 | This happens only if find_reloads thinks the instruction will compile | |
58 | better that way. | |
59 | ||
60 | 2. Pseudo-registers that are equivalent to constants are replaced | |
61 | with those constants if they are not in hard registers. | |
62 | ||
63 | 1 happens every time find_reloads is called. | |
64 | 2 happens only when REPLACE is 1, which is only when | |
65 | actually doing the reloads, not when just counting them. | |
66 | ||
67 | ||
68 | Using a reload register for several reloads in one insn: | |
69 | ||
70 | When an insn has reloads, it is considered as having three parts: | |
71 | the input reloads, the insn itself after reloading, and the output reloads. | |
72 | Reloads of values used in memory addresses are often needed for only one part. | |
73 | ||
74 | When this is so, reload_when_needed records which part needs the reload. | |
75 | Two reloads for different parts of the insn can share the same reload | |
76 | register. | |
77 | ||
78 | When a reload is used for addresses in multiple parts, or when it is | |
79 | an ordinary operand, it is classified as RELOAD_OTHER, and cannot share | |
80 | a register with any other reload. */ | |
81 | ||
82 | #define REG_OK_STRICT | |
83 | ||
84 | #include "config.h" | |
85 | #include "rtl.h" | |
86 | #include "insn-config.h" | |
87 | #include "recog.h" | |
88 | #include "reload.h" | |
89 | #include "regs.h" | |
90 | #include "hard-reg-set.h" | |
91 | #include "flags.h" | |
92 | #include "real.h" | |
93 | ||
94 | #define min(x,y) ((x) < (y) ? (x) : (y)) | |
95 | \f | |
96 | /* The variables set up by `find_reloads' are: | |
97 | ||
98 | n_reloads number of distinct reloads needed; max reload # + 1 | |
99 | tables indexed by reload number | |
100 | reload_in rtx for value to reload from | |
101 | reload_out rtx for where to store reload-reg afterward if nec | |
102 | (often the same as reload_in) | |
103 | reload_reg_class enum reg_class, saying what regs to reload into | |
104 | reload_inmode enum machine_mode; mode this operand should have | |
105 | when reloaded, on input. | |
106 | reload_outmode enum machine_mode; mode this operand should have | |
107 | when reloaded, on output. | |
108 | reload_strict_low char; 1 if this reload is inside a STRICT_LOW_PART. | |
109 | reload_optional char, nonzero for an optional reload. | |
110 | Optional reloads are ignored unless the | |
111 | value is already sitting in a register. | |
112 | reload_inc int, positive amount to increment or decrement by if | |
113 | reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC. | |
114 | Ignored otherwise (don't assume it is zero). | |
115 | reload_in_reg rtx. A reg for which reload_in is the equivalent. | |
116 | If reload_in is a symbol_ref which came from | |
117 | reg_equiv_constant, then this is the pseudo | |
118 | which has that symbol_ref as equivalent. | |
119 | reload_reg_rtx rtx. This is the register to reload into. | |
120 | If it is zero when `find_reloads' returns, | |
121 | you must find a suitable register in the class | |
122 | specified by reload_reg_class, and store here | |
123 | an rtx for that register with mode from | |
124 | reload_inmode or reload_outmode. | |
125 | reload_nocombine char, nonzero if this reload shouldn't be | |
126 | combined with another reload. | |
127 | reload_needed_for rtx, operand this reload is needed for address of. | |
128 | 0 means it isn't needed for addressing. | |
129 | reload_needed_for_multiple | |
130 | int, 1 if this reload needed for more than one thing. | |
131 | reload_when_needed enum, classifies reload as needed either for | |
132 | addressing an input reload, addressing an output, | |
133 | for addressing a non-reloaded mem ref, | |
134 | or for unspecified purposes (i.e., more than one | |
135 | of the above). */ | |
136 | ||
137 | int n_reloads; | |
138 | ||
139 | rtx reload_in[MAX_RELOADS]; | |
140 | rtx reload_out[MAX_RELOADS]; | |
141 | enum reg_class reload_reg_class[MAX_RELOADS]; | |
142 | enum machine_mode reload_inmode[MAX_RELOADS]; | |
143 | enum machine_mode reload_outmode[MAX_RELOADS]; | |
144 | char reload_strict_low[MAX_RELOADS]; | |
145 | rtx reload_reg_rtx[MAX_RELOADS]; | |
146 | char reload_optional[MAX_RELOADS]; | |
147 | int reload_inc[MAX_RELOADS]; | |
148 | rtx reload_in_reg[MAX_RELOADS]; | |
149 | char reload_nocombine[MAX_RELOADS]; | |
150 | int reload_needed_for_multiple[MAX_RELOADS]; | |
151 | rtx reload_needed_for[MAX_RELOADS]; | |
152 | enum reload_when_needed reload_when_needed[MAX_RELOADS]; | |
153 | ||
154 | /* All the "earlyclobber" operands of the current insn | |
155 | are recorded here. */ | |
156 | int n_earlyclobbers; | |
157 | rtx reload_earlyclobbers[MAX_RECOG_OPERANDS]; | |
158 | ||
159 | /* Replacing reloads. | |
160 | ||
161 | If `replace_reloads' is nonzero, then as each reload is recorded | |
162 | an entry is made for it in the table `replacements'. | |
163 | Then later `subst_reloads' can look through that table and | |
164 | perform all the replacements needed. */ | |
165 | ||
166 | /* Nonzero means record the places to replace. */ | |
167 | static int replace_reloads; | |
168 | ||
169 | /* Each replacement is recorded with a structure like this. */ | |
170 | struct replacement | |
171 | { | |
172 | rtx *where; /* Location to store in */ | |
173 | int what; /* which reload this is for */ | |
174 | enum machine_mode mode; /* mode it must have */ | |
175 | }; | |
176 | ||
177 | static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)]; | |
178 | ||
179 | /* Number of replacements currently recorded. */ | |
180 | static int n_replacements; | |
181 | ||
182 | /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable; | |
183 | (see reg_equiv_address). */ | |
184 | static rtx memlocs[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)]; | |
185 | static int n_memlocs; | |
186 | ||
187 | /* The instruction we are doing reloads for; | |
188 | so we can test whether a register dies in it. */ | |
189 | static rtx this_insn; | |
190 | ||
191 | /* Nonzero means (MEM (REG n)) is valid even if (REG n) is spilled. */ | |
192 | static int indirect_ok; | |
193 | ||
194 | /* If hard_regs_live_known is nonzero, | |
195 | we can tell which hard regs are currently live, | |
196 | at least enough to succeed in choosing dummy reloads. */ | |
197 | static int hard_regs_live_known; | |
198 | ||
199 | /* Indexed by hard reg number, | |
200 | element is nonegative if hard reg has been spilled. | |
201 | This vector is passed to `find_reloads' as an argument | |
202 | and is not changed here. */ | |
203 | static short *static_reload_reg_p; | |
204 | ||
205 | /* Set to 1 in subst_reg_equivs if it changes anything. */ | |
206 | static int subst_reg_equivs_changed; | |
207 | ||
208 | /* On return from push_reload, holds the reload-number for the OUT | |
209 | operand, which can be different for that from the input operand. */ | |
210 | static int output_reloadnum; | |
211 | ||
212 | static int alternative_allows_memconst (); | |
213 | static rtx find_dummy_reload (); | |
214 | static rtx find_reloads_toplev (); | |
215 | static int find_reloads_address (); | |
216 | static int find_reloads_address_1 (); | |
217 | static int hard_reg_set_here_p (); | |
218 | /* static rtx forget_volatility (); */ | |
219 | static rtx subst_reg_equivs (); | |
220 | static rtx subst_indexed_address (); | |
221 | rtx find_equiv_reg (); | |
222 | static int find_inc_amount (); | |
223 | \f | |
224 | /* Record one (sometimes two) reload that needs to be performed. | |
225 | IN is an rtx saying where the data are to be found before this instruction. | |
226 | OUT says where they must be stored after the instruction. | |
227 | (IN is zero for data not read, and OUT is zero for data not written.) | |
228 | INLOC and OUTLOC point to the places in the instructions where | |
229 | IN and OUT were found. | |
230 | CLASS is a register class required for the reloaded data. | |
231 | INMODE is the machine mode that the instruction requires | |
232 | for the reg that replaces IN and OUTMODE is likewise for OUT. | |
233 | ||
234 | If IN is zero, then OUT's location and mode should be passed as | |
235 | INLOC and INMODE. | |
236 | ||
237 | STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx. | |
238 | ||
239 | OPTIONAL nonzero means this reload does not need to be performed: | |
240 | it can be discarded if that is more convenient. | |
241 | ||
242 | The return value is the reload-number for this reload. | |
243 | ||
244 | If both IN and OUT are nonzero, in some rare cases we might | |
245 | want to make two separate reloads. (Actually we never do this now.) | |
246 | Therefore, the reload-number for OUT is stored in | |
247 | output_reloadnum when we return; the return value applies to IN. | |
248 | Usually (presently always), when IN and OUT are nonzero, | |
249 | the two reload-numbers are equal, but the caller should be careful to | |
250 | distinguish them. */ | |
251 | ||
252 | static int | |
253 | push_reload (in, out, inloc, outloc, class, | |
254 | inmode, outmode, strict_low, optional, needed_for) | |
255 | register rtx in, out; | |
256 | rtx *inloc, *outloc; | |
257 | enum reg_class class; | |
258 | enum machine_mode inmode, outmode; | |
259 | int strict_low; | |
260 | int optional; | |
261 | rtx needed_for; | |
262 | { | |
263 | register int i; | |
264 | int dont_share = 0; | |
265 | ||
266 | /* Compare two RTX's. */ | |
267 | #define MATCHES(x, y) (x == y || (x != 0 && GET_CODE (x) != REG && rtx_equal_p (x, y))) | |
268 | ||
269 | /* INMODE and/or OUTMODE could be VOIDmode if no mode | |
270 | has been specified for the operand. In that case, | |
271 | use the operand's mode as the mode to reload. */ | |
272 | if (inmode == VOIDmode && in != 0) | |
273 | inmode = GET_MODE (in); | |
274 | if (outmode == VOIDmode && out != 0) | |
275 | outmode = GET_MODE (out); | |
276 | ||
277 | /* If IN is a pseudo register everywhere-equivalent to a constant, and | |
278 | it is not in a hard register, reload straight from the constant, | |
279 | since we want to get rid of such pseudo registers. | |
280 | Often this is done earlier, but not always in find_reloads_address. */ | |
281 | if (in != 0 && GET_CODE (in) == REG) | |
282 | { | |
283 | register int regno = REGNO (in); | |
284 | ||
285 | if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 | |
286 | && reg_equiv_constant[regno] != 0) | |
287 | in = reg_equiv_constant[regno]; | |
288 | } | |
289 | ||
290 | /* Likewise for OUT. Of course, OUT will never be equivalent to | |
291 | an actual constant, but it might be equivalent to a memory location | |
292 | (in the case of a parameter). */ | |
293 | if (out != 0 && GET_CODE (out) == REG) | |
294 | { | |
295 | register int regno = REGNO (out); | |
296 | ||
297 | if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 | |
298 | && reg_equiv_constant[regno] != 0) | |
299 | out = reg_equiv_constant[regno]; | |
300 | } | |
301 | ||
302 | /* If we have a read-write operand with an address side-effect, | |
303 | change either IN or OUT so the side-effect happens only once. */ | |
304 | if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out)) | |
305 | { | |
306 | if (GET_CODE (XEXP (in, 0)) == POST_INC | |
307 | || GET_CODE (XEXP (in, 0)) == POST_DEC) | |
308 | in = gen_rtx (MEM, GET_MODE (in), XEXP (XEXP (in, 0), 0)); | |
309 | if (GET_CODE (XEXP (in, 0)) == PRE_INC | |
310 | || GET_CODE (XEXP (in, 0)) == PRE_DEC) | |
311 | out = gen_rtx (MEM, GET_MODE (out), XEXP (XEXP (out, 0), 0)); | |
312 | } | |
313 | ||
314 | /* If we are reloading a (SUBREG (MEM ...) ...) or (SUBREG constant ...), | |
315 | really reload just the inside expression in its own mode. | |
316 | Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere; | |
317 | we can't handle it here because CONST_INT does not indicate a mode. */ | |
318 | ||
319 | if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) != REG) | |
320 | { | |
321 | inloc = &SUBREG_REG (in); | |
322 | in = *inloc; | |
323 | if (GET_CODE (SUBREG_REG (in)) == MEM) | |
324 | /* This is supposed to happen only for paradoxical subregs made by | |
325 | combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */ | |
326 | if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode)) | |
327 | abort (); | |
328 | inmode = GET_MODE (in); | |
329 | } | |
330 | ||
331 | /* If IN appears in OUT, we can't share any input-only reload for IN. */ | |
332 | if (in != 0 && out != 0 && reg_overlap_mentioned_p (in, out)) | |
333 | dont_share = 1; | |
334 | ||
335 | /* Narrow down the class of register wanted if that is | |
336 | desirable on this machine for efficiency. */ | |
337 | if (in != 0) | |
338 | class = PREFERRED_RELOAD_CLASS (in, class); | |
339 | ||
340 | if (class == NO_REGS) | |
341 | abort (); | |
342 | ||
343 | /* We can use an existing reload if the class is right | |
344 | and at least one of IN and OUT is a match | |
345 | and the other is at worst neutral. | |
346 | (A zero compared against anything is neutral.) */ | |
347 | for (i = 0; i < n_reloads; i++) | |
348 | if (reload_reg_class[i] == class | |
349 | && reload_strict_low[i] == strict_low | |
350 | && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share | |
351 | && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out))) | |
352 | || | |
353 | (out != 0 && MATCHES (reload_out[i], out) | |
354 | && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))) | |
355 | break; | |
356 | ||
357 | /* Reloading a plain reg for input can match a reload to postincrement | |
358 | that reg, since the postincrement's value is the right value. | |
359 | Likewise, it can match a preincrement reload, since we regard | |
360 | the preincrementation as happening before any ref in this insn | |
361 | to that register. */ | |
362 | if (i == n_reloads) | |
363 | for (i = 0; i < n_reloads; i++) | |
364 | if (reload_reg_class[i] == class | |
365 | && reload_strict_low[i] == strict_low | |
366 | && out == 0 && reload_out[i] == 0 | |
367 | && ((GET_CODE (in) == REG | |
368 | && (GET_CODE (reload_in[i]) == POST_INC | |
369 | || GET_CODE (reload_in[i]) == POST_DEC | |
370 | || GET_CODE (reload_in[i]) == PRE_INC | |
371 | || GET_CODE (reload_in[i]) == PRE_DEC) | |
372 | && MATCHES (XEXP (reload_in[i], 0), in)) | |
373 | || | |
374 | (GET_CODE (reload_in[i]) == REG | |
375 | && (GET_CODE (in) == POST_INC | |
376 | || GET_CODE (in) == POST_DEC | |
377 | || GET_CODE (in) == PRE_INC | |
378 | || GET_CODE (in) == PRE_DEC) | |
379 | && MATCHES (XEXP (in, 0), reload_in[i])))) | |
380 | { | |
381 | /* Make sure reload_in ultimately has the increment, | |
382 | not the plain register. */ | |
383 | if (GET_CODE (in) == REG) | |
384 | in = reload_in[i]; | |
385 | break; | |
386 | } | |
387 | ||
388 | if (i == n_reloads) | |
389 | { | |
390 | /* We found no existing reload suitable for re-use. | |
391 | So add an additional reload. */ | |
392 | ||
393 | reload_in[i] = in; | |
394 | reload_out[i] = out; | |
395 | reload_reg_class[i] = class; | |
396 | reload_inmode[i] = inmode; | |
397 | reload_outmode[i] = outmode; | |
398 | reload_reg_rtx[i] = 0; | |
399 | reload_optional[i] = optional; | |
400 | reload_inc[i] = 0; | |
401 | reload_strict_low[i] = strict_low; | |
402 | reload_nocombine[i] = 0; | |
403 | reload_in_reg[i] = *inloc; | |
404 | reload_needed_for[i] = needed_for; | |
405 | reload_needed_for_multiple[i] = 0; | |
406 | ||
407 | n_reloads++; | |
408 | } | |
409 | else | |
410 | { | |
411 | /* We are reusing an existing reload, | |
412 | but we may have additional information for it. | |
413 | For example, we may now have both IN and OUT | |
414 | while the old one may have just one of them. */ | |
415 | ||
416 | if (inmode != VOIDmode) | |
417 | reload_inmode[i] = inmode; | |
418 | if (outmode != VOIDmode) | |
419 | reload_outmode[i] = outmode; | |
420 | if (in != 0) | |
421 | reload_in[i] = in; | |
422 | if (out != 0) | |
423 | reload_out[i] = out; | |
424 | reload_optional[i] &= optional; | |
425 | if (reload_needed_for[i] != needed_for) | |
426 | reload_needed_for_multiple[i] = 1; | |
427 | } | |
428 | ||
429 | /* If the ostensible rtx being reload differs from the rtx found | |
430 | in the location to substitute, this reload is not safe to combine | |
431 | because we cannot reliably tell whether it appears in the insn. */ | |
432 | ||
433 | if (in != 0 && in != *inloc) | |
434 | reload_nocombine[i] = 1; | |
435 | ||
436 | #if 0 | |
437 | /* This was replaced by changes in find_reloads_address_1 and the new | |
438 | function inc_for_reload, which go with a new meaning of reload_inc. */ | |
439 | ||
440 | /* If this is an IN/OUT reload in an insn that sets the CC, | |
441 | it must be for an autoincrement. It doesn't work to store | |
442 | the incremented value after the insn because that would clobber the CC. | |
443 | So we must do the increment of the value reloaded from, | |
444 | increment it, store it back, then decrement again. */ | |
445 | if (out != 0 && sets_cc0_p (PATTERN (this_insn))) | |
446 | { | |
447 | out = 0; | |
448 | reload_out[i] = 0; | |
449 | reload_inc[i] = find_inc_amount (PATTERN (this_insn), in); | |
450 | /* If we did not find a nonzero amount-to-increment-by, | |
451 | that contradicts the belief that IN is being incremented | |
452 | in an address in this insn. */ | |
453 | if (reload_inc[i] == 0) | |
454 | abort (); | |
455 | } | |
456 | #endif | |
457 | ||
458 | /* If we will replace IN and OUT with the reload-reg, | |
459 | record where they are located so that substitution need | |
460 | not do a tree walk. */ | |
461 | ||
462 | if (replace_reloads) | |
463 | { | |
464 | if (inloc != 0) | |
465 | { | |
466 | register struct replacement *r = &replacements[n_replacements++]; | |
467 | r->what = i; | |
468 | r->where = inloc; | |
469 | r->mode = inmode; | |
470 | } | |
471 | if (outloc != 0 && outloc != inloc) | |
472 | { | |
473 | register struct replacement *r = &replacements[n_replacements++]; | |
474 | r->what = i; | |
475 | r->where = outloc; | |
476 | r->mode = outmode; | |
477 | } | |
478 | } | |
479 | ||
480 | /* If this reload is just being introduced and it has both | |
481 | an incoming quantity and an outgoing quantity that are | |
482 | supposed to be made to match, see if either one of the two | |
483 | can serve as the place to reload into. | |
484 | ||
485 | If one of them is acceptable, set reload_reg_rtx[i] | |
486 | to that one. */ | |
487 | ||
488 | if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0) | |
489 | { | |
490 | reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc, | |
491 | reload_reg_class[i], i); | |
492 | ||
493 | /* If the outgoing register already contains the same value | |
494 | as the incoming one, we can dispense with loading it. | |
495 | The easiest way to tell the caller that is to give a phony | |
496 | value for the incoming operand (same as outgoing one). */ | |
497 | if (reload_reg_rtx[i] == out | |
498 | && (GET_CODE (in) == REG || CONSTANT_P (in)) | |
499 | && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out), | |
500 | static_reload_reg_p, i, inmode)) | |
501 | reload_in[i] = out; | |
502 | } | |
503 | ||
504 | if (out) | |
505 | output_reloadnum = i; | |
506 | ||
507 | return i; | |
508 | } | |
509 | ||
510 | /* Record an additional place we must replace a value | |
511 | for which we have already recorded a reload. | |
512 | RELOADNUM is the value returned by push_reload | |
513 | when the reload was recorded. | |
514 | This is used in insn patterns that use match_dup. */ | |
515 | ||
516 | static void | |
517 | push_replacement (loc, reloadnum, mode) | |
518 | rtx *loc; | |
519 | int reloadnum; | |
520 | enum machine_mode mode; | |
521 | { | |
522 | if (replace_reloads) | |
523 | { | |
524 | register struct replacement *r = &replacements[n_replacements++]; | |
525 | r->what = reloadnum; | |
526 | r->where = loc; | |
527 | r->mode = mode; | |
528 | } | |
529 | } | |
530 | \f | |
531 | /* If there is only one output reload, try to combine it | |
532 | with a (logically unrelated) input reload | |
533 | to reduce the number of reload registers needed. | |
534 | ||
535 | This is safe if the input reload does not appear in | |
536 | the value being output-reloaded, because this implies | |
537 | it is not needed any more once the original insn completes. */ | |
538 | ||
539 | static void | |
540 | combine_reloads () | |
541 | { | |
542 | int i; | |
543 | int output_reload = -1; | |
544 | ||
545 | /* Find the output reload; return unless there is exactly one | |
546 | and that one is mandatory. */ | |
547 | ||
548 | for (i = 0; i < n_reloads; i++) | |
549 | if (reload_out[i] != 0) | |
550 | { | |
551 | if (output_reload >= 0) | |
552 | return; | |
553 | output_reload = i; | |
554 | } | |
555 | ||
556 | if (output_reload < 0 || reload_optional[output_reload]) | |
557 | return; | |
558 | ||
559 | /* An input-output reload isn't combinable. */ | |
560 | ||
561 | if (reload_in[output_reload] != 0) | |
562 | return; | |
563 | ||
564 | /* Check each input reload; can we combine it? */ | |
565 | ||
566 | for (i = 0; i < n_reloads; i++) | |
567 | if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i] | |
568 | /* Life span of this reload must not extend past main insn. */ | |
569 | && reload_when_needed[i] != RELOAD_FOR_OUTPUT_RELOAD_ADDRESS | |
570 | && reload_inmode[i] == reload_outmode[output_reload] | |
571 | && reload_inc[i] == 0 | |
572 | && reload_reg_rtx[i] == 0 | |
573 | && reload_strict_low[i] == 0 | |
574 | && reload_reg_class[i] == reload_reg_class[output_reload] | |
575 | && ! reg_overlap_mentioned_p (reload_in[i], reload_out[output_reload])) | |
576 | { | |
577 | int j; | |
578 | ||
579 | /* We have found a reload to combine with! */ | |
580 | reload_out[i] = reload_out[output_reload]; | |
581 | reload_outmode[i] = reload_outmode[output_reload]; | |
582 | /* Mark the old output reload as inoperative. */ | |
583 | reload_out[output_reload] = 0; | |
584 | /* The combined reload is needed for the entire insn. */ | |
585 | reload_needed_for_multiple[i] = 1; | |
586 | reload_when_needed[i] = RELOAD_OTHER; | |
587 | ||
588 | /* Transfer all replacements from the old reload to the combined. */ | |
589 | for (j = 0; j < n_replacements; j++) | |
590 | if (replacements[j].what == output_reload) | |
591 | replacements[j].what = i; | |
592 | ||
593 | return; | |
594 | } | |
595 | } | |
596 | \f | |
597 | /* Try to find a reload register for an in-out reload (expressions IN and OUT). | |
598 | See if one of IN and OUT is a register that may be used; | |
599 | this is desirable since a spill-register won't be needed. | |
600 | If so, return the register rtx that proves acceptable. | |
601 | ||
602 | INLOC and OUTLOC are locations where IN and OUT appear in the insn. | |
603 | CLASS is the register class required for the reload. | |
604 | ||
605 | If FOR_REAL is >= 0, it is the number of the reload, | |
606 | and in some cases when it can be discovered that OUT doesn't need | |
607 | to be computed, clear out reload_out[FOR_REAL]. | |
608 | ||
609 | If FOR_REAL is -1, this should not be done, because this call | |
610 | is just to see if a register can be found, not to find and install it. */ | |
611 | ||
612 | static rtx | |
613 | find_dummy_reload (in, out, inloc, outloc, class, for_real) | |
614 | rtx in, out; | |
615 | rtx *inloc, *outloc; | |
616 | enum reg_class class; | |
617 | int for_real; | |
618 | { | |
619 | rtx value = 0; | |
620 | rtx orig_in = in; | |
621 | ||
622 | while (GET_CODE (out) == SUBREG) | |
623 | out = SUBREG_REG (out); | |
624 | while (GET_CODE (in) == SUBREG) | |
625 | in = SUBREG_REG (in); | |
626 | ||
627 | /* If operands exceed a word, we can't use either of them | |
628 | unless they have the same size. */ | |
629 | if (GET_MODE_SIZE (GET_MODE (out)) != GET_MODE_SIZE (GET_MODE (in)) | |
630 | && (GET_MODE_SIZE (GET_MODE (out)) > UNITS_PER_WORD | |
631 | || GET_MODE_SIZE (GET_MODE (in)) > UNITS_PER_WORD)) | |
632 | return 0; | |
633 | ||
634 | /* See if OUT will do. */ | |
635 | if (GET_CODE (out) == REG) | |
636 | { | |
637 | register int regno = REGNO (out); | |
638 | ||
639 | /* When we consider whether the insn uses OUT, | |
640 | ignore references within IN. They don't prevent us | |
641 | from copying IN into OUT, because those refs would | |
642 | move into the insn that reloads IN. | |
643 | ||
644 | However, we only ignore IN in its role as this operand. | |
645 | If the insn uses IN elsewhere and it contains OUT, | |
646 | that counts. We can't be sure it's the "same" operand | |
647 | so it might not go through this reload. */ | |
648 | *inloc = const0_rtx; | |
649 | ||
650 | if (reg_renumber[regno] >= 0) | |
651 | regno = reg_renumber[regno]; | |
652 | if (regno < FIRST_PSEUDO_REGISTER | |
653 | /* A fixed reg that can overlap other regs better not be used | |
654 | for reloading in any way. */ | |
655 | #ifdef OVERLAPPING_REGNO_P | |
656 | && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno)) | |
657 | #endif | |
658 | && ! refers_to_regno_p (regno, regno + HARD_REGNO_NREGS (regno, GET_MODE (out)), | |
659 | PATTERN (this_insn), outloc) | |
660 | && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)) | |
661 | value = out; | |
662 | ||
663 | *inloc = orig_in; | |
664 | } | |
665 | ||
666 | /* Consider using IN if OUT was not acceptable | |
667 | or if OUT dies in this insn (like the quotient in a divmod insn). | |
668 | We can't use IN unless it is free after this insn, | |
669 | which means we must know accurately which hard regs are live. | |
670 | Also, the result can't go in IN if IN is used within OUT. */ | |
671 | if (hard_regs_live_known | |
672 | && GET_CODE (in) == REG | |
673 | && ! find_reg_note (this_insn, REG_UNSET, in) | |
674 | && (value == 0 | |
675 | || find_regno_note (this_insn, REG_DEAD, REGNO (value)))) | |
676 | { | |
677 | register int regno = REGNO (in); | |
678 | if (find_regno_note (this_insn, REG_DEAD, regno)) | |
679 | { | |
680 | if (reg_renumber[regno] >= 0) | |
681 | regno = reg_renumber[regno]; | |
682 | if (regno < FIRST_PSEUDO_REGISTER | |
683 | && ! refers_to_regno_p (regno, | |
684 | regno + HARD_REGNO_NREGS (regno, GET_MODE (in)), | |
685 | out, 0) | |
686 | && ! hard_reg_set_here_p (regno, PATTERN (this_insn)) | |
687 | && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)) | |
688 | { | |
689 | /* If we were going to use OUT as the reload reg | |
690 | and changed our mind, it means OUT is a dummy that | |
691 | dies here. So don't bother copying value to it. */ | |
692 | if (for_real >= 0 && value == out) | |
693 | reload_out[for_real] = 0; | |
694 | value = in; | |
695 | } | |
696 | } | |
697 | } | |
698 | ||
699 | return value; | |
700 | } | |
701 | \f | |
702 | /* This page contains subroutines used mainly for determining | |
703 | whether the IN or an OUT of a reload can serve as the | |
704 | reload register. */ | |
705 | ||
706 | /* Return 1 if hard reg number REGNO is stored in by expression X, | |
707 | either explicitly or in the guise of a pseudo-reg allocated to REGNO. | |
708 | X should be the body of an instruction. */ | |
709 | ||
710 | static int | |
711 | hard_reg_set_here_p (regno, x) | |
712 | register int regno; | |
713 | rtx x; | |
714 | { | |
715 | if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER) | |
716 | { | |
717 | register rtx op0 = SET_DEST (x); | |
718 | while (GET_CODE (op0) == SUBREG) | |
719 | op0 = SUBREG_REG (op0); | |
720 | if (GET_CODE (op0) == REG) | |
721 | { | |
722 | register int r = REGNO (op0); | |
723 | /* See if this reg includes the specified one. */ | |
724 | if (r <= regno && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > regno) | |
725 | return 1; | |
726 | } | |
727 | } | |
728 | else if (GET_CODE (x) == PARALLEL) | |
729 | { | |
730 | register int i = XVECLEN (x, 0) - 1; | |
731 | for (; i >= 0; i--) | |
732 | if (hard_reg_set_here_p (regno, XVECEXP (x, 0, i))) | |
733 | return 1; | |
734 | } | |
735 | ||
736 | return 0; | |
737 | } | |
738 | ||
739 | /* Return 1 if ADDR is a valid memory address for mode MODE, | |
740 | and check that each pseudo reg has the proper kind of | |
741 | hard reg. */ | |
742 | ||
743 | int | |
744 | strict_memory_address_p (mode, addr) | |
745 | enum machine_mode mode; | |
746 | register rtx addr; | |
747 | { | |
748 | GO_IF_LEGITIMATE_ADDRESS (mode, addr, win); | |
749 | return 0; | |
750 | ||
751 | win: | |
752 | return 1; | |
753 | } | |
754 | ||
755 | \f | |
756 | /* Like rtx_equal_p except that it allows a REG and a SUBREG to match | |
757 | if they are the same hard reg, and has special hacks for | |
758 | autoincrement and autodecrement. | |
759 | This is specifically intended for find_reloads to use | |
760 | in determining whether two operands match. | |
761 | X is the operand whose number is the lower of the two. | |
762 | ||
763 | The value is 2 if Y contains a pre-increment that matches | |
764 | a non-incrementing address in X. */ | |
765 | ||
766 | /* ??? To be completely correct, we should arrange to pass | |
767 | for X the output operand and for Y the input operand. | |
768 | For now, we assume that the output operand has the lower number | |
769 | because that is natural in (SET output (... input ...)). */ | |
770 | ||
771 | int | |
772 | operands_match_p (x, y) | |
773 | register rtx x, y; | |
774 | { | |
775 | register int i; | |
776 | register RTX_CODE code = GET_CODE (x); | |
777 | register char *fmt; | |
778 | int success_2; | |
779 | ||
780 | if (x == y) | |
781 | return 1; | |
782 | if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)) | |
783 | && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG | |
784 | && GET_CODE (SUBREG_REG (y)) == REG))) | |
785 | { | |
786 | register int j; | |
787 | ||
788 | if (code == SUBREG) | |
789 | { | |
790 | i = REGNO (SUBREG_REG (x)); | |
791 | if (i >= FIRST_PSEUDO_REGISTER) | |
792 | goto slow; | |
793 | i += SUBREG_WORD (x); | |
794 | } | |
795 | else | |
796 | i = REGNO (x); | |
797 | ||
798 | if (GET_CODE (y) == SUBREG) | |
799 | { | |
800 | j = REGNO (SUBREG_REG (y)); | |
801 | if (j >= FIRST_PSEUDO_REGISTER) | |
802 | goto slow; | |
803 | j += SUBREG_WORD (y); | |
804 | } | |
805 | else | |
806 | j = REGNO (y); | |
807 | ||
808 | return i == j; | |
809 | } | |
810 | /* If two operands must match, because they are really a single | |
811 | operand of an assembler insn, then two postincrements are invalid | |
812 | because the assembler insn would increment only once. | |
813 | On the other hand, an postincrement matches ordinary indexing | |
814 | if the postincrement is the output operand. */ | |
815 | if (code == POST_DEC || code == POST_INC) | |
816 | return operands_match_p (XEXP (x, 0), y); | |
817 | /* Two preincrements are invalid | |
818 | because the assembler insn would increment only once. | |
819 | On the other hand, an preincrement matches ordinary indexing | |
820 | if the preincrement is the input operand. | |
821 | In this case, return 2, since some callers need to do special | |
822 | things when this happens. */ | |
823 | if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC) | |
824 | return operands_match_p (x, XEXP (y, 0)) ? 2 : 0; | |
825 | ||
826 | slow: | |
827 | ||
828 | /* Now we have disposed of all the cases | |
829 | in which different rtx codes can match. */ | |
830 | if (code != GET_CODE (y)) | |
831 | return 0; | |
832 | if (code == LABEL_REF) | |
833 | return XEXP (x, 0) == XEXP (y, 0); | |
834 | if (code == SYMBOL_REF) | |
835 | return XSTR (x, 0) == XSTR (y, 0); | |
836 | ||
837 | /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */ | |
838 | ||
839 | if (GET_MODE (x) != GET_MODE (y)) | |
840 | return 0; | |
841 | ||
842 | /* Compare the elements. If any pair of corresponding elements | |
843 | fail to match, return 0 for the whole things. */ | |
844 | ||
845 | success_2 = 0; | |
846 | fmt = GET_RTX_FORMAT (code); | |
847 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
848 | { | |
849 | int val; | |
850 | switch (fmt[i]) | |
851 | { | |
852 | case 'i': | |
853 | if (XINT (x, i) != XINT (y, i)) | |
854 | return 0; | |
855 | break; | |
856 | ||
857 | case 'e': | |
858 | val = operands_match_p (XEXP (x, i), XEXP (y, i)); | |
859 | if (val == 0) | |
860 | return 0; | |
861 | /* If any subexpression returns 2, | |
862 | we should return 2 if we are successful. */ | |
863 | if (val == 2) | |
864 | success_2 = 1; | |
865 | break; | |
866 | ||
867 | case '0': | |
868 | break; | |
869 | ||
870 | /* It is believed that rtx's at this level will never | |
871 | contain anything but integers and other rtx's, | |
872 | except for within LABEL_REFs and SYMBOL_REFs. */ | |
873 | default: | |
874 | abort (); | |
875 | } | |
876 | } | |
877 | return 1 + success_2; | |
878 | } | |
879 | \f | |
880 | /* Return the number of times character C occurs in string S. */ | |
881 | ||
882 | static int | |
883 | n_occurrences (c, s) | |
884 | char c; | |
885 | char *s; | |
886 | { | |
887 | int n = 0; | |
888 | while (*s) | |
889 | n += (*s++ == c); | |
890 | return n; | |
891 | } | |
892 | \f | |
893 | struct decomposition | |
894 | { | |
895 | int reg_flag; | |
896 | int safe; | |
897 | rtx base; | |
898 | int start; | |
899 | int end; | |
900 | }; | |
901 | ||
902 | /* Describe the range of registers or memory referenced by X. | |
903 | If X is a register, set REG_FLAG and put the first register | |
904 | number into START and the last plus one into END. | |
905 | If X is a memory reference, put a base address into BASE | |
906 | and a range of integer offsets into START and END. | |
907 | If X is pushing on the stack, we can assume it causes no trouble, | |
908 | so we set the SAFE field. */ | |
909 | ||
910 | static struct decomposition | |
911 | decompose (x) | |
912 | rtx x; | |
913 | { | |
914 | struct decomposition val; | |
915 | int all_const = 0; | |
916 | ||
917 | val.reg_flag = 0; | |
918 | val.safe = 0; | |
919 | if (GET_CODE (x) == MEM) | |
920 | { | |
921 | rtx base, offset = 0; | |
922 | rtx addr = XEXP (x, 0); | |
923 | ||
924 | if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC | |
925 | || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC) | |
926 | { | |
927 | val.base = XEXP (addr, 0); | |
928 | val.start = - GET_MODE_SIZE (GET_MODE (x)); | |
929 | val.end = GET_MODE_SIZE (GET_MODE (x)); | |
930 | val.safe = REGNO (val.base) == STACK_POINTER_REGNUM; | |
931 | return val; | |
932 | } | |
933 | ||
934 | if (GET_CODE (addr) == CONST) | |
935 | { | |
936 | addr = XEXP (addr, 0); | |
937 | all_const = 1; | |
938 | } | |
939 | if (GET_CODE (addr) == PLUS) | |
940 | { | |
941 | if (CONSTANT_P (XEXP (addr, 0))) | |
942 | { | |
943 | base = XEXP (addr, 1); | |
944 | offset = XEXP (addr, 0); | |
945 | } | |
946 | else if (CONSTANT_P (XEXP (addr, 1))) | |
947 | { | |
948 | base = XEXP (addr, 0); | |
949 | offset = XEXP (addr, 1); | |
950 | } | |
951 | } | |
952 | ||
953 | if (offset == 0) | |
954 | { | |
955 | base = addr; | |
956 | offset = const0_rtx; | |
957 | } | |
958 | if (GET_CODE (offset) == CONST) | |
959 | offset = XEXP (offset, 0); | |
960 | if (GET_CODE (offset) == PLUS) | |
961 | { | |
962 | if (GET_CODE (XEXP (offset, 0)) == CONST_INT) | |
963 | { | |
964 | base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 1)); | |
965 | offset = XEXP (offset, 0); | |
966 | } | |
967 | else if (GET_CODE (XEXP (offset, 1)) == CONST_INT) | |
968 | { | |
969 | base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 0)); | |
970 | offset = XEXP (offset, 1); | |
971 | } | |
972 | else | |
973 | { | |
974 | base = gen_rtx (PLUS, GET_MODE (base), base, offset); | |
975 | offset = const0_rtx; | |
976 | } | |
977 | } | |
978 | else if (GET_CODE (offset) != CONST_INT) | |
979 | { | |
980 | base = gen_rtx (PLUS, GET_MODE (base), base, offset); | |
981 | offset = const0_rtx; | |
982 | } | |
983 | ||
984 | if (all_const && GET_CODE (base) == PLUS) | |
985 | base = gen_rtx (CONST, GET_MODE (base), base); | |
986 | ||
987 | if (GET_CODE (offset) != CONST_INT) | |
988 | abort (); | |
989 | ||
990 | val.start = INTVAL (offset); | |
991 | val.end = val.start + GET_MODE_SIZE (GET_MODE (x)); | |
992 | val.base = base; | |
993 | return val; | |
994 | } | |
995 | else if (GET_CODE (x) == REG) | |
996 | { | |
997 | val.reg_flag = 1; | |
998 | val.start = true_regnum (x); | |
999 | if (val.start < 0) | |
1000 | { | |
1001 | /* A pseudo with no hard reg. */ | |
1002 | val.start = REGNO (x); | |
1003 | val.end = val.start + 1; | |
1004 | } | |
1005 | else | |
1006 | /* A hard reg. */ | |
1007 | val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x)); | |
1008 | } | |
1009 | else if (GET_CODE (x) == SUBREG) | |
1010 | { | |
1011 | if (GET_CODE (SUBREG_REG (x)) != REG) | |
1012 | /* This could be more precise, but it's good enough. */ | |
1013 | return decompose (SUBREG_REG (x)); | |
1014 | val.reg_flag = 1; | |
1015 | val.start = true_regnum (x); | |
1016 | if (val.start < 0) | |
1017 | return decompose (SUBREG_REG (x)); | |
1018 | else | |
1019 | /* A hard reg. */ | |
1020 | val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x)); | |
1021 | } | |
1022 | else | |
1023 | abort (); | |
1024 | return val; | |
1025 | } | |
1026 | ||
1027 | /* Return 1 if altering Y will not modify the value of X. | |
1028 | Y is also described by YDATA, which should be decompose (Y). */ | |
1029 | ||
1030 | static int | |
1031 | immune_p (x, y, ydata) | |
1032 | rtx x, y; | |
1033 | struct decomposition ydata; | |
1034 | { | |
1035 | struct decomposition xdata; | |
1036 | ||
1037 | if (ydata.reg_flag) | |
1038 | return !refers_to_regno_p (ydata.start, ydata.end, x, 0); | |
1039 | if (ydata.safe) | |
1040 | return 1; | |
1041 | ||
1042 | if (GET_CODE (y) != MEM) | |
1043 | abort (); | |
1044 | /* If Y is memory and X is not, Y can't affect X. */ | |
1045 | if (GET_CODE (x) != MEM) | |
1046 | return 1; | |
1047 | ||
1048 | xdata = decompose (x); | |
1049 | ||
1050 | if (! rtx_equal_p (xdata.base, ydata.base)) | |
1051 | { | |
1052 | /* If bases are distinct symbolic constants, there is no overlap. */ | |
1053 | if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base)) | |
1054 | return 1; | |
1055 | /* Constants and stack slots never overlap. */ | |
1056 | if (CONSTANT_P (xdata.base) | |
1057 | && (ydata.base == frame_pointer_rtx | |
1058 | || ydata.base == stack_pointer_rtx)) | |
1059 | return 1; | |
1060 | if (CONSTANT_P (ydata.base) | |
1061 | && (xdata.base == frame_pointer_rtx | |
1062 | || xdata.base == stack_pointer_rtx)) | |
1063 | return 1; | |
1064 | /* If either base is variable, we don't know anything. */ | |
1065 | return 0; | |
1066 | } | |
1067 | ||
1068 | ||
1069 | return (xdata.start >= ydata.end || ydata.start >= xdata.end); | |
1070 | } | |
1071 | \f | |
1072 | /* Main entry point of this file: search the body of INSN | |
1073 | for values that need reloading and record them with push_reload. | |
1074 | REPLACE nonzero means record also where the values occur | |
1075 | so that subst_reloads can be used. | |
1076 | IND_OK says that a memory reference is a valid memory address. | |
1077 | ||
1078 | LIVE_KNOWN says we have valid information about which hard | |
1079 | regs are live at each point in the program; this is true when | |
1080 | we are called from global_alloc but false when stupid register | |
1081 | allocation has been done. | |
1082 | ||
1083 | RELOAD_REG_P if nonzero is a vector indexed by hard reg number | |
1084 | which is nonnegative if the reg has been commandeered for reloading into. | |
1085 | It is copied into STATIC_RELOAD_REG_P and referenced from there | |
1086 | by various subroutines. */ | |
1087 | ||
1088 | void | |
1089 | find_reloads (insn, replace, ind_ok, live_known, reload_reg_p) | |
1090 | rtx insn; | |
1091 | int replace, ind_ok; | |
1092 | int live_known; | |
1093 | short *reload_reg_p; | |
1094 | { | |
1095 | #ifdef REGISTER_CONSTRAINTS | |
1096 | ||
1097 | enum reload_modified { RELOAD_NOTHING, RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE }; | |
1098 | ||
1099 | register int insn_code_number; | |
1100 | register int i; | |
1101 | int noperands; | |
1102 | /* These are the constraints for the insn. We don't change them. */ | |
1103 | char *constraints1[MAX_RECOG_OPERANDS]; | |
1104 | /* These start out as the constraints for the insn | |
1105 | and they are chewed up as we consider alternatives. */ | |
1106 | char *constraints[MAX_RECOG_OPERANDS]; | |
1107 | /* Nonzero for a MEM operand whose entire address needs a reload. */ | |
1108 | int address_reloaded[MAX_RECOG_OPERANDS]; | |
1109 | int n_alternatives; | |
1110 | int this_alternative[MAX_RECOG_OPERANDS]; | |
1111 | char this_alternative_win[MAX_RECOG_OPERANDS]; | |
1112 | char this_alternative_offmemok[MAX_RECOG_OPERANDS]; | |
1113 | char this_alternative_earlyclobber[MAX_RECOG_OPERANDS]; | |
1114 | int this_alternative_matches[MAX_RECOG_OPERANDS]; | |
1115 | int swapped; | |
1116 | int goal_alternative[MAX_RECOG_OPERANDS]; | |
1117 | int this_alternative_number; | |
1118 | int goal_alternative_number; | |
1119 | int operand_reloadnum[MAX_RECOG_OPERANDS]; | |
1120 | int goal_alternative_matches[MAX_RECOG_OPERANDS]; | |
1121 | int goal_alternative_matched[MAX_RECOG_OPERANDS]; | |
1122 | char goal_alternative_win[MAX_RECOG_OPERANDS]; | |
1123 | char goal_alternative_offmemok[MAX_RECOG_OPERANDS]; | |
1124 | char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS]; | |
1125 | int goal_alternative_swapped; | |
1126 | enum reload_modified modified[MAX_RECOG_OPERANDS]; | |
1127 | int best; | |
1128 | int commutative; | |
1129 | char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS]; | |
1130 | rtx substed_operand[MAX_RECOG_OPERANDS]; | |
1131 | rtx body = PATTERN (insn); | |
1132 | int goal_earlyclobber, this_earlyclobber; | |
1133 | enum machine_mode operand_mode[MAX_RECOG_OPERANDS]; | |
1134 | ||
1135 | this_insn = insn; | |
1136 | n_reloads = 0; | |
1137 | n_replacements = 0; | |
1138 | n_memlocs = 0; | |
1139 | n_earlyclobbers = 0; | |
1140 | replace_reloads = replace; | |
1141 | indirect_ok = ind_ok; | |
1142 | hard_regs_live_known = live_known; | |
1143 | static_reload_reg_p = reload_reg_p; | |
1144 | ||
1145 | /* Find what kind of insn this is. NOPERANDS gets number of operands. | |
1146 | Make OPERANDS point to a vector of operand values. | |
1147 | Make OPERAND_LOCS point to a vector of pointers to | |
1148 | where the operands were found. | |
1149 | Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the | |
1150 | constraint-strings for this insn. | |
1151 | Return if the insn needs no reload processing. */ | |
1152 | ||
1153 | switch (GET_CODE (body)) | |
1154 | { | |
1155 | case USE: | |
1156 | case CLOBBER: | |
1157 | case ASM_INPUT: | |
1158 | case ADDR_VEC: | |
1159 | case ADDR_DIFF_VEC: | |
1160 | return; | |
1161 | ||
1162 | case SET: | |
1163 | /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs. */ | |
1164 | if (GET_CODE (SET_DEST (body)) == REG | |
1165 | && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER | |
1166 | && GET_CODE (SET_SRC (body)) == REG | |
1167 | && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER) | |
1168 | return; | |
1169 | case PARALLEL: | |
1170 | case ASM_OPERANDS: | |
1171 | noperands = asm_noperands (body); | |
1172 | if (noperands >= 0) | |
1173 | { | |
1174 | /* This insn is an `asm' with operands. */ | |
1175 | ||
1176 | insn_code_number = -1; | |
1177 | ||
1178 | /* expand_asm_operands makes sure there aren't too many operands. */ | |
1179 | if (noperands > MAX_RECOG_OPERANDS) | |
1180 | abort (); | |
1181 | ||
1182 | /* Now get the operand values and constraints out of the insn. */ | |
1183 | ||
1184 | decode_asm_operands (body, recog_operand, recog_operand_loc, | |
1185 | constraints, operand_mode); | |
1186 | if (noperands > 0) | |
1187 | { | |
1188 | bcopy (constraints, constraints1, noperands * sizeof (char *)); | |
1189 | n_alternatives = n_occurrences (',', constraints[0]) + 1; | |
1190 | for (i = 1; i < noperands; i++) | |
1191 | if (n_alternatives != n_occurrences (',', constraints[0]) + 1) | |
1192 | { | |
1193 | error_for_asm (insn, "operand constraints differ in number of alternatives"); | |
1194 | /* Avoid further trouble with this insn. */ | |
1195 | PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx); | |
1196 | n_reloads = 0; | |
1197 | return; | |
1198 | } | |
1199 | } | |
1200 | break; | |
1201 | } | |
1202 | ||
1203 | default: | |
1204 | /* Ordinary insn: recognize it, allocate space for operands and | |
1205 | constraints, and get them out via insn_extract. */ | |
1206 | ||
1207 | insn_code_number = recog_memoized (insn); | |
1208 | noperands = insn_n_operands[insn_code_number]; | |
1209 | n_alternatives = insn_n_alternatives[insn_code_number]; | |
1210 | /* Just return "no reloads" if insn has no operands with constraints. */ | |
1211 | if (n_alternatives == 0) | |
1212 | return; | |
1213 | insn_extract (insn); | |
1214 | for (i = 0; i < noperands; i++) | |
1215 | { | |
1216 | constraints[i] = constraints1[i] | |
1217 | = insn_operand_constraint[insn_code_number][i]; | |
1218 | operand_mode[i] = insn_operand_mode[insn_code_number][i]; | |
1219 | } | |
1220 | } | |
1221 | ||
1222 | if (noperands == 0) | |
1223 | return; | |
1224 | ||
1225 | commutative = -1; | |
1226 | ||
1227 | /* If we will need to know, later, whether some pair of operands | |
1228 | are the same, we must compare them now and save the result. | |
1229 | Reloading the base and index registers will clobber them | |
1230 | and afterward they will fail to match. */ | |
1231 | ||
1232 | for (i = 0; i < noperands; i++) | |
1233 | { | |
1234 | register char *p; | |
1235 | register int c; | |
1236 | ||
1237 | substed_operand[i] = recog_operand[i]; | |
1238 | p = constraints[i]; | |
1239 | ||
1240 | /* Scan this operand's constraint to see if it should match another. */ | |
1241 | ||
1242 | while (c = *p++) | |
1243 | if (c == '%') | |
1244 | commutative = i; | |
1245 | else if (c >= '0' && c <= '9') | |
1246 | { | |
1247 | c -= '0'; | |
1248 | operands_match[c][i] | |
1249 | = operands_match_p (recog_operand[c], recog_operand[i]); | |
1250 | /* If C can be commuted with C+1, and C might need to match I, | |
1251 | then C+1 might also need to match I. */ | |
1252 | if (commutative >= 0) | |
1253 | { | |
1254 | if (c == commutative || c == commutative + 1) | |
1255 | { | |
1256 | int other = c + (c == commutative ? 1 : -1); | |
1257 | operands_match[other][i] | |
1258 | = operands_match_p (recog_operand[other], recog_operand[i]); | |
1259 | } | |
1260 | if (i == commutative || i == commutative + 1) | |
1261 | { | |
1262 | int other = i + (i == commutative ? 1 : -1); | |
1263 | operands_match[c][other] | |
1264 | = operands_match_p (recog_operand[c], recog_operand[other]); | |
1265 | } | |
1266 | /* Note that C is supposed to be less than I. | |
1267 | No need to consider altering both C and I | |
1268 | because in that case we would alter one into the other. */ | |
1269 | } | |
1270 | } | |
1271 | } | |
1272 | ||
1273 | /* Examine each operand that is a memory reference or memory address | |
1274 | and reload parts of the addresses into index registers. | |
1275 | While we are at it, initialize the array `modified'. | |
1276 | Also here any references to pseudo regs that didn't get hard regs | |
1277 | but are equivalent to constants get replaced in the insn itself | |
1278 | with those constants. Nobody will ever see them again. */ | |
1279 | ||
1280 | for (i = 0; i < noperands; i++) | |
1281 | { | |
1282 | register RTX_CODE code = GET_CODE (recog_operand[i]); | |
1283 | modified[i] = RELOAD_READ; | |
1284 | address_reloaded[i] = 0; | |
1285 | if (constraints[i][0] == 'p') | |
1286 | { | |
1287 | find_reloads_address (VOIDmode, 0, | |
1288 | recog_operand[i], recog_operand_loc[i], | |
1289 | recog_operand[i]); | |
1290 | substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]; | |
1291 | } | |
1292 | else if (code == MEM) | |
1293 | { | |
1294 | if (find_reloads_address (GET_MODE (recog_operand[i]), | |
1295 | recog_operand_loc[i], | |
1296 | XEXP (recog_operand[i], 0), | |
1297 | &XEXP (recog_operand[i], 0), | |
1298 | recog_operand[i])) | |
1299 | address_reloaded[i] = 1; | |
1300 | substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]; | |
1301 | } | |
1302 | else if (code == SUBREG) | |
1303 | substed_operand[i] = recog_operand[i] = *recog_operand_loc[i] | |
1304 | = find_reloads_toplev (recog_operand[i]); | |
1305 | else if (code == REG) | |
1306 | { | |
1307 | /* This is equivalent to calling find_reloads_toplev. | |
1308 | The code is duplicated for speed. */ | |
1309 | register int regno = REGNO (recog_operand[i]); | |
1310 | if (reg_equiv_constant[regno] != 0) | |
1311 | substed_operand[i] = recog_operand[i] | |
1312 | = reg_equiv_constant[regno]; | |
1313 | #if 0 /* This might screw code in reload1.c to delete prior output-reload | |
1314 | that feeds this insn. */ | |
1315 | if (reg_equiv_mem[regno] != 0) | |
1316 | substed_operand[i] = recog_operand[i] | |
1317 | = reg_equiv_mem[regno]; | |
1318 | #endif | |
1319 | if (reg_equiv_address[regno] != 0) | |
1320 | { | |
1321 | *recog_operand_loc[i] = recog_operand[i] | |
1322 | = gen_rtx (MEM, GET_MODE (recog_operand[i]), | |
1323 | reg_equiv_address[regno]); | |
1324 | find_reloads_address (GET_MODE (recog_operand[i]), | |
1325 | recog_operand_loc[i], | |
1326 | XEXP (recog_operand[i], 0), | |
1327 | &XEXP (recog_operand[i], 0), | |
1328 | recog_operand[i]); | |
1329 | substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]; | |
1330 | } | |
1331 | } | |
1332 | } | |
1333 | ||
1334 | /* Now see what we need for pseudo-regs that didn't get hard regs | |
1335 | or got the wrong kind of hard reg. For this, we must consider | |
1336 | all the operands together against the register constraints. */ | |
1337 | ||
1338 | best = MAX_RECOG_OPERANDS + 100; | |
1339 | ||
1340 | swapped = 0; | |
1341 | try_swapped: | |
1342 | ||
1343 | /* The constraints are made of several alternatives. | |
1344 | Each operand's constraint looks like foo,bar,... with commas | |
1345 | separating the alternatives. The first alternatives for all | |
1346 | operands go together, the second alternatives go together, etc. | |
1347 | ||
1348 | First loop over alternatives. */ | |
1349 | ||
1350 | for (this_alternative_number = 0; | |
1351 | this_alternative_number < n_alternatives; | |
1352 | this_alternative_number++) | |
1353 | { | |
1354 | /* Loop over operands for one constraint alternative. */ | |
1355 | /* LOSERS counts those that don't fit this alternative | |
1356 | and would require loading. */ | |
1357 | int losers = 0; | |
1358 | /* BAD is set to 1 if it some operand can't fit this alternative | |
1359 | even after reloading. */ | |
1360 | int bad = 0; | |
1361 | /* REJECT is a count of how undesirable this alternative says it is | |
1362 | if any reloading is required. If the alternative matches exactly | |
1363 | then REJECT is ignored, but otherwise it gets this much | |
1364 | counted against it in addition to the reloading needed. */ | |
1365 | int reject = 0; | |
1366 | ||
1367 | this_earlyclobber = 0; | |
1368 | ||
1369 | for (i = 0; i < noperands; i++) | |
1370 | { | |
1371 | register char *p = constraints[i]; | |
1372 | register int win = 0; | |
1373 | /* 0 => this operand can be reloaded somehow for this alternative */ | |
1374 | int badop = 1; | |
1375 | /* 0 => this operand can be reloaded if the alternative allows regs. */ | |
1376 | int winreg = 0; | |
1377 | int c; | |
1378 | register rtx operand = recog_operand[i]; | |
1379 | int offset = 0; | |
1380 | /* Nonzero means this is a MEM that must be reloaded into a reg | |
1381 | regardless of what the constraint says. */ | |
1382 | int force_reload = 0; | |
1383 | int offmemok = 0; | |
1384 | int earlyclobber = 0; | |
1385 | ||
1386 | /* If the operand is a SUBREG, extract | |
1387 | the REG or MEM (or maybe even a constant) within. | |
1388 | (Constants can occur as a result of reg_equiv_constant.) */ | |
1389 | ||
1390 | while (GET_CODE (operand) == SUBREG) | |
1391 | { | |
1392 | offset += SUBREG_WORD (operand); | |
1393 | operand = SUBREG_REG (operand); | |
1394 | if (GET_CODE (operand) != REG) | |
1395 | force_reload = 1; | |
1396 | } | |
1397 | ||
1398 | this_alternative[i] = (int) NO_REGS; | |
1399 | this_alternative_win[i] = 0; | |
1400 | this_alternative_offmemok[i] = 0; | |
1401 | this_alternative_earlyclobber[i] = 0; | |
1402 | this_alternative_matches[i] = -1; | |
1403 | ||
1404 | /* An empty constraint or empty alternative | |
1405 | allows anything which matched the pattern. */ | |
1406 | if (*p == 0 || *p == ',') | |
1407 | win = 1, badop = 0; | |
1408 | ||
1409 | /* Scan this alternative's specs for this operand; | |
1410 | set WIN if the operand fits any letter in this alternative. | |
1411 | Otherwise, clear BADOP if this operand could | |
1412 | fit some letter after reloads, | |
1413 | or set WINREG if this operand could fit after reloads | |
1414 | provided the constraint allows some registers. */ | |
1415 | ||
1416 | while (*p && (c = *p++) != ',') | |
1417 | switch (c) | |
1418 | { | |
1419 | case '=': | |
1420 | modified[i] = RELOAD_WRITE; | |
1421 | break; | |
1422 | ||
1423 | case '+': | |
1424 | modified[i] = RELOAD_READ_WRITE; | |
1425 | break; | |
1426 | ||
1427 | case '*': | |
1428 | break; | |
1429 | ||
1430 | case '%': | |
1431 | commutative = i; | |
1432 | break; | |
1433 | ||
1434 | case '?': | |
1435 | reject++; | |
1436 | break; | |
1437 | ||
1438 | case '!': | |
1439 | reject = 100; | |
1440 | break; | |
1441 | ||
1442 | case '#': | |
1443 | /* Ignore rest of this alternative as far as | |
1444 | reloading is concerned. */ | |
1445 | while (*p && *p != ',') p++; | |
1446 | break; | |
1447 | ||
1448 | case '0': | |
1449 | case '1': | |
1450 | case '2': | |
1451 | case '3': | |
1452 | case '4': | |
1453 | c -= '0'; | |
1454 | this_alternative_matches[i] = c; | |
1455 | /* We are supposed to match a previous operand. | |
1456 | If we do, we win if that one did. | |
1457 | If we do not, count both of the operands as losers. | |
1458 | (This is too conservative, since most of the time | |
1459 | only a single reload insn will be needed to make | |
1460 | the two operands win. As a result, this alternative | |
1461 | may be rejected when it is actually desirable.) */ | |
1462 | if ((swapped && (c != commutative || i != commutative + 1)) | |
1463 | /* If we are matching as if two operands were swapped, | |
1464 | also pretend that operands_match had been computed | |
1465 | with swapped. | |
1466 | But if I is the second of those and C is the first, | |
1467 | don't exchange them, because operands_match is valid | |
1468 | only on one side of its diagonal. */ | |
1469 | ? (operands_match | |
1470 | [(c == commutative || c == commutative + 1) | |
1471 | ? 2*commutative + 1 - c : c] | |
1472 | [(i == commutative || i == commutative + 1) | |
1473 | ? 2*commutative + 1 - i : i]) | |
1474 | : operands_match[c][i]) | |
1475 | win = this_alternative_win[c]; | |
1476 | else | |
1477 | { | |
1478 | /* Operands don't match. */ | |
1479 | rtx value; | |
1480 | /* Retroactively mark the operand we had to match | |
1481 | as a loser, if it wasn't already. */ | |
1482 | if (this_alternative_win[c]) | |
1483 | losers++; | |
1484 | this_alternative_win[c] = 0; | |
1485 | if (this_alternative[c] == (int) NO_REGS) | |
1486 | bad = 1; | |
1487 | /* But count the pair only once in the total badness of | |
1488 | this alternative, if the pair can be a dummy reload. */ | |
1489 | value | |
1490 | = find_dummy_reload (recog_operand[i], recog_operand[c], | |
1491 | recog_operand_loc[i], recog_operand_loc[c], | |
1492 | this_alternative[c], -1); | |
1493 | ||
1494 | if (value != 0) | |
1495 | losers--; | |
1496 | } | |
1497 | /* This can be fixed with reloads if the operand | |
1498 | we are supposed to match can be fixed with reloads. */ | |
1499 | badop = 0; | |
1500 | this_alternative[i] = this_alternative[c]; | |
1501 | break; | |
1502 | ||
1503 | case 'p': | |
1504 | /* All necessary reloads for an address_operand | |
1505 | were handled in find_reloads_address. */ | |
1506 | this_alternative[i] = (int) ALL_REGS; | |
1507 | win = 1; | |
1508 | break; | |
1509 | ||
1510 | case 'm': | |
1511 | if (force_reload) | |
1512 | break; | |
1513 | if (GET_CODE (operand) == MEM | |
1514 | || (GET_CODE (operand) == REG | |
1515 | && REGNO (operand) >= FIRST_PSEUDO_REGISTER | |
1516 | && reg_renumber[REGNO (operand)] < 0)) | |
1517 | win = 1; | |
1518 | if (GET_CODE (operand) == CONST_DOUBLE | |
1519 | || CONSTANT_P (operand)) | |
1520 | badop = 0; | |
1521 | break; | |
1522 | ||
1523 | case '<': | |
1524 | if (GET_CODE (operand) == MEM | |
1525 | && ! address_reloaded[i] | |
1526 | && (GET_CODE (XEXP (operand, 0)) == PRE_DEC | |
1527 | || GET_CODE (XEXP (operand, 0)) == POST_DEC)) | |
1528 | win = 1; | |
1529 | break; | |
1530 | ||
1531 | case '>': | |
1532 | if (GET_CODE (operand) == MEM | |
1533 | && ! address_reloaded[i] | |
1534 | && (GET_CODE (XEXP (operand, 0)) == PRE_INC | |
1535 | || GET_CODE (XEXP (operand, 0)) == POST_INC)) | |
1536 | win = 1; | |
1537 | break; | |
1538 | ||
1539 | /* Memory operand whose address is offsettable. */ | |
1540 | case 'o': | |
1541 | if (force_reload) | |
1542 | break; | |
1543 | if ((GET_CODE (operand) == MEM | |
1544 | && offsettable_memref_p (operand)) | |
1545 | /* Certain mem addresses will become offsettable | |
1546 | after they themselves are reloaded. This is important; | |
1547 | we don't want our own handling of unoffsettables | |
1548 | to override the handling of reg_equiv_address. */ | |
1549 | || (GET_CODE (operand) == MEM | |
1550 | && GET_CODE (XEXP (operand, 0)) == REG | |
1551 | && (! ind_ok | |
1552 | || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)) | |
1553 | || (GET_CODE (operand) == REG | |
1554 | && REGNO (operand) >= FIRST_PSEUDO_REGISTER | |
1555 | && reg_renumber[REGNO (operand)] < 0)) | |
1556 | win = 1; | |
1557 | if (GET_CODE (operand) == CONST_DOUBLE | |
1558 | || CONSTANT_P (operand) | |
1559 | || GET_CODE (operand) == MEM) | |
1560 | badop = 0; | |
1561 | offmemok = 1; | |
1562 | break; | |
1563 | ||
1564 | case '&': | |
1565 | /* Output operand that is stored before the need for the | |
1566 | input operands (and their index registers) is over. */ | |
1567 | if (GET_CODE (operand) == REG | |
1568 | || GET_CODE (operand) == MEM) | |
1569 | earlyclobber = 1, this_earlyclobber = 1; | |
1570 | break; | |
1571 | ||
1572 | case 'F': | |
1573 | if (GET_CODE (operand) == CONST_DOUBLE) | |
1574 | win = 1; | |
1575 | break; | |
1576 | ||
1577 | case 'G': | |
1578 | case 'H': | |
1579 | if (GET_CODE (operand) == CONST_DOUBLE | |
1580 | && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c)) | |
1581 | win = 1; | |
1582 | break; | |
1583 | ||
1584 | case 's': | |
1585 | if (GET_CODE (operand) == CONST_INT) | |
1586 | break; | |
1587 | case 'i': | |
1588 | if (CONSTANT_P (operand)) | |
1589 | win = 1; | |
1590 | break; | |
1591 | ||
1592 | case 'n': | |
1593 | if (GET_CODE (operand) == CONST_INT) | |
1594 | win = 1; | |
1595 | break; | |
1596 | ||
1597 | case 'I': | |
1598 | case 'J': | |
1599 | case 'K': | |
1600 | case 'L': | |
1601 | case 'M': | |
1602 | if (GET_CODE (operand) == CONST_INT | |
1603 | && CONST_OK_FOR_LETTER_P (INTVAL (operand), c)) | |
1604 | win = 1; | |
1605 | break; | |
1606 | ||
1607 | case 'g': | |
1608 | if (! force_reload | |
1609 | && (GENERAL_REGS == ALL_REGS | |
1610 | || GET_CODE (operand) != REG | |
1611 | || (REGNO (operand) >= FIRST_PSEUDO_REGISTER | |
1612 | && reg_renumber[REGNO (operand)] < 0))) | |
1613 | win = 1; | |
1614 | /* Drop through into 'r' case */ | |
1615 | ||
1616 | case 'r': | |
1617 | this_alternative[i] | |
1618 | = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS]; | |
1619 | goto reg; | |
1620 | ||
1621 | default: | |
1622 | this_alternative[i] | |
1623 | = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)]; | |
1624 | ||
1625 | reg: | |
1626 | if (GET_MODE (operand) == BLKmode) | |
1627 | break; | |
1628 | winreg = 1; | |
1629 | if (GET_CODE (operand) == REG | |
1630 | && reg_fits_class_p (operand, this_alternative[i], | |
1631 | offset, GET_MODE (recog_operand[i]))) | |
1632 | win = 1; | |
1633 | break; | |
1634 | } | |
1635 | ||
1636 | constraints[i] = p; | |
1637 | ||
1638 | /* If this operand could be handled with a reg, | |
1639 | and some reg is allowed, then this operand can be handled. */ | |
1640 | if (winreg && this_alternative[i] != (int) NO_REGS) | |
1641 | badop = 0; | |
1642 | ||
1643 | /* Record which operands fit this alternative. */ | |
1644 | this_alternative_earlyclobber[i] = earlyclobber; | |
1645 | if (win && ! force_reload) | |
1646 | this_alternative_win[i] = 1; | |
1647 | else | |
1648 | { | |
1649 | this_alternative_offmemok[i] = offmemok; | |
1650 | losers++; | |
1651 | if (badop) | |
1652 | bad = 1; | |
1653 | /* Alternative loses if it has no regs for a reg operand. */ | |
1654 | if (GET_CODE (operand) == REG | |
1655 | && this_alternative[i] == (int) NO_REGS | |
1656 | && this_alternative_matches[i] < 0) | |
1657 | bad = 1; | |
1658 | } | |
1659 | } | |
1660 | ||
1661 | /* Now see if any output operands that are marked "earlyclobber" | |
1662 | in this alternative conflict with any input operands | |
1663 | or any memory addresses. */ | |
1664 | ||
1665 | for (i = 0; i < noperands; i++) | |
1666 | if (this_alternative_earlyclobber[i] | |
1667 | && this_alternative_win[i]) | |
1668 | { | |
1669 | struct decomposition early_data; | |
1670 | int j; | |
1671 | ||
1672 | early_data = decompose (recog_operand[i]); | |
1673 | ||
1674 | for (j = 0; j < noperands; j++) | |
1675 | /* Is this an input operand or a memory ref? */ | |
1676 | if ((GET_CODE (recog_operand[j]) == MEM | |
1677 | || modified[j] != RELOAD_WRITE) | |
1678 | && j != i | |
1679 | /* Don't count an input operand that is constrained to match | |
1680 | the early clobber operand. */ | |
1681 | && ! (this_alternative_matches[j] == i | |
1682 | && rtx_equal_p (recog_operand[i], recog_operand[j])) | |
1683 | /* Is it altered by storing the earlyclobber operand? */ | |
1684 | && !immune_p (recog_operand[j], recog_operand[i], early_data)) | |
1685 | { | |
1686 | /* If the output is in a single-reg class, | |
1687 | it's costly to reload it, so reload the input instead. */ | |
1688 | if (reg_class_size[this_alternative[i]] == 1 | |
1689 | && (GET_CODE (recog_operand[j]) == REG | |
1690 | || GET_CODE (recog_operand[j]) == SUBREG)) | |
1691 | { | |
1692 | losers++; | |
1693 | this_alternative_win[j] = 0; | |
1694 | } | |
1695 | else | |
1696 | break; | |
1697 | } | |
1698 | /* If an earlyclobber operand conflicts with something, | |
1699 | it must be reloaded, so request this and count the cost. */ | |
1700 | if (j != noperands) | |
1701 | { | |
1702 | losers++; | |
1703 | this_alternative_win[i] = 0; | |
1704 | for (j = 0; j < noperands; j++) | |
1705 | if (this_alternative_matches[j] == i | |
1706 | && this_alternative_win[j]) | |
1707 | { | |
1708 | this_alternative_win[j] = 0; | |
1709 | losers++; | |
1710 | } | |
1711 | } | |
1712 | } | |
1713 | ||
1714 | /* If one alternative accepts all the operands, no reload required, | |
1715 | choose that alternative; don't consider the remaining ones. */ | |
1716 | if (losers == 0) | |
1717 | { | |
1718 | /* Unswap these so that they are never swapped at `finish'. */ | |
1719 | if (commutative >= 0) | |
1720 | { | |
1721 | recog_operand[commutative] = substed_operand[commutative]; | |
1722 | recog_operand[commutative + 1] | |
1723 | = substed_operand[commutative + 1]; | |
1724 | } | |
1725 | for (i = 0; i < noperands; i++) | |
1726 | { | |
1727 | goal_alternative_win[i] = 1; | |
1728 | goal_alternative[i] = this_alternative[i]; | |
1729 | goal_alternative_offmemok[i] = this_alternative_offmemok[i]; | |
1730 | goal_alternative_matches[i] = this_alternative_matches[i]; | |
1731 | goal_alternative_earlyclobber[i] | |
1732 | = this_alternative_earlyclobber[i]; | |
1733 | } | |
1734 | goal_alternative_number = this_alternative_number; | |
1735 | goal_alternative_swapped = swapped; | |
1736 | goal_earlyclobber = this_earlyclobber; | |
1737 | goto finish; | |
1738 | } | |
1739 | ||
1740 | /* REJECT, set by the ! and ? constraint characters, | |
1741 | discourages the use of this alternative for a reload goal. */ | |
1742 | if (reject > 0) | |
1743 | losers += reject; | |
1744 | ||
1745 | /* If this alternative can be made to work by reloading, | |
1746 | and it needs less reloading than the others checked so far, | |
1747 | record it as the chosen goal for reloading. */ | |
1748 | if (! bad && best > losers) | |
1749 | { | |
1750 | for (i = 0; i < noperands; i++) | |
1751 | { | |
1752 | goal_alternative[i] = this_alternative[i]; | |
1753 | goal_alternative_win[i] = this_alternative_win[i]; | |
1754 | goal_alternative_offmemok[i] = this_alternative_offmemok[i]; | |
1755 | goal_alternative_matches[i] = this_alternative_matches[i]; | |
1756 | goal_alternative_earlyclobber[i] | |
1757 | = this_alternative_earlyclobber[i]; | |
1758 | } | |
1759 | goal_alternative_swapped = swapped; | |
1760 | best = losers; | |
1761 | goal_alternative_number = this_alternative_number; | |
1762 | goal_earlyclobber = this_earlyclobber; | |
1763 | } | |
1764 | } | |
1765 | ||
1766 | /* If insn is commutative (it's safe to exchange a certain pair of operands) | |
1767 | then we need to try each alternative twice, | |
1768 | the second time matching those two operands | |
1769 | as if we had exchanged them. | |
1770 | To do this, really exchange them in operands. | |
1771 | ||
1772 | If we have just tried the alternatives the second time, | |
1773 | return operands to normal and drop through. */ | |
1774 | ||
1775 | if (commutative >= 0) | |
1776 | { | |
1777 | swapped = !swapped; | |
1778 | if (swapped) | |
1779 | { | |
1780 | recog_operand[commutative] = substed_operand[commutative + 1]; | |
1781 | recog_operand[commutative + 1] = substed_operand[commutative]; | |
1782 | ||
1783 | bcopy (constraints1, constraints, noperands * sizeof (char *)); | |
1784 | goto try_swapped; | |
1785 | } | |
1786 | else | |
1787 | { | |
1788 | recog_operand[commutative] = substed_operand[commutative]; | |
1789 | recog_operand[commutative + 1] = substed_operand[commutative + 1]; | |
1790 | } | |
1791 | } | |
1792 | ||
1793 | /* The operands don't meet the constraints. | |
1794 | goal_alternative describes the alternative | |
1795 | that we could reach by reloading the fewest operands. | |
1796 | Reload so as to fit it. */ | |
1797 | ||
1798 | if (best == MAX_RECOG_OPERANDS + 100) | |
1799 | { | |
1800 | /* No alternative works with reloads?? */ | |
1801 | if (insn_code_number >= 0) | |
1802 | abort (); | |
1803 | error_for_asm (insn, "inconsistent operand constraints in an `asm'"); | |
1804 | /* Avoid further trouble with this insn. */ | |
1805 | PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx); | |
1806 | n_reloads = 0; | |
1807 | return; | |
1808 | } | |
1809 | ||
1810 | /* Jump to `finish' from above if all operands are valid already. | |
1811 | In that case, goal_alternative_win is all 1. */ | |
1812 | finish: | |
1813 | ||
1814 | /* Right now, for any pair of operands I and J that are required to match, | |
1815 | with I < J, | |
1816 | goal_alternative_matches[J] is I. | |
1817 | Set up goal_alternative_matched as the inverse function: | |
1818 | goal_alternative_matched[I] = J. */ | |
1819 | ||
1820 | for (i = 0; i < noperands; i++) | |
1821 | goal_alternative_matched[i] = -1; | |
1822 | ||
1823 | for (i = 0; i < noperands; i++) | |
1824 | if (! goal_alternative_win[i] | |
1825 | && goal_alternative_matches[i] >= 0) | |
1826 | goal_alternative_matched[goal_alternative_matches[i]] = i; | |
1827 | ||
1828 | /* If the best alternative is with operands 1 and 2 swapped, | |
1829 | consider them swapped before reporting the reloads. */ | |
1830 | ||
1831 | if (goal_alternative_swapped) | |
1832 | { | |
1833 | register rtx tem; | |
1834 | ||
1835 | tem = substed_operand[commutative]; | |
1836 | substed_operand[commutative] = substed_operand[commutative + 1]; | |
1837 | substed_operand[commutative + 1] = tem; | |
1838 | tem = recog_operand[commutative]; | |
1839 | recog_operand[commutative] = recog_operand[commutative + 1]; | |
1840 | recog_operand[commutative + 1] = tem; | |
1841 | } | |
1842 | ||
1843 | /* Perform whatever substitutions on the operands we are supposed | |
1844 | to make due to commutativity or replacement of registers | |
1845 | with equivalent constants or memory slots. */ | |
1846 | ||
1847 | for (i = 0; i < noperands; i++) | |
1848 | { | |
1849 | *recog_operand_loc[i] = substed_operand[i]; | |
1850 | /* While we are looping on operands, initialize this. */ | |
1851 | operand_reloadnum[i] = -1; | |
1852 | } | |
1853 | ||
1854 | /* Any constants that aren't allowed and can't be reloaded | |
1855 | into memory locations are here changed into memory references. */ | |
1856 | for (i = 0; i < noperands; i++) | |
1857 | if (! goal_alternative_win[i] | |
1858 | && (GET_CODE (recog_operand[i]) == CONST_DOUBLE | |
1859 | || CONSTANT_P (recog_operand[i])) | |
1860 | && (PREFERRED_RELOAD_CLASS (recog_operand[i], | |
1861 | (enum reg_class) goal_alternative[i]) | |
1862 | == NO_REGS)) | |
1863 | { | |
1864 | enum machine_mode mode = operand_mode[i]; | |
1865 | *recog_operand_loc[i] = recog_operand[i] | |
1866 | = (GET_CODE (recog_operand[i]) == CONST_DOUBLE | |
1867 | ? force_const_double_mem (recog_operand[i]) | |
1868 | : force_const_mem (mode != VOIDmode ? mode : SImode, | |
1869 | recog_operand[i])); | |
1870 | find_reloads_toplev (recog_operand[i]); | |
1871 | if (alternative_allows_memconst (constraints1[i], goal_alternative_number)) | |
1872 | goal_alternative_win[i] = 1; | |
1873 | } | |
1874 | ||
1875 | /* Now record reloads for all the operands that need them. */ | |
1876 | for (i = 0; i < noperands; i++) | |
1877 | if (! goal_alternative_win[i]) | |
1878 | { | |
1879 | /* Operands that match previous ones have already been handled. */ | |
1880 | if (goal_alternative_matches[i] >= 0) | |
1881 | ; | |
1882 | /* Handle an operand with a nonoffsettable address | |
1883 | appearing where an offsettable address will do | |
1884 | by reloading the address into a base register. */ | |
1885 | else if (goal_alternative_matched[i] == -1 | |
1886 | && goal_alternative_offmemok[i] | |
1887 | && GET_CODE (recog_operand[i]) == MEM) | |
1888 | { | |
1889 | operand_reloadnum[i] | |
1890 | = push_reload (XEXP (recog_operand[i], 0), 0, | |
1891 | &XEXP (recog_operand[i], 0), 0, | |
1892 | BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)), | |
1893 | 0, 0, 0, 0); | |
1894 | reload_inc[operand_reloadnum[i]] | |
1895 | = GET_MODE_SIZE (GET_MODE (recog_operand[i])); | |
1896 | } | |
1897 | else if (goal_alternative_matched[i] == -1) | |
1898 | operand_reloadnum[i] = | |
1899 | push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0, | |
1900 | modified[i] != RELOAD_READ ? recog_operand[i] : 0, | |
1901 | recog_operand_loc[i], 0, | |
1902 | (enum reg_class) goal_alternative[i], | |
1903 | (modified[i] == RELOAD_WRITE ? VOIDmode : operand_mode[i]), | |
1904 | (modified[i] == RELOAD_READ ? VOIDmode : operand_mode[i]), | |
1905 | (insn_code_number < 0 ? 0 | |
1906 | : insn_operand_strict_low[insn_code_number][i]), | |
1907 | 0, 0); | |
1908 | /* In a matching pair of operands, one must be input only | |
1909 | and the other must be output only. | |
1910 | Pass the input operand as IN and the other as OUT. */ | |
1911 | else if (modified[i] == RELOAD_READ | |
1912 | && modified[goal_alternative_matched[i]] == RELOAD_WRITE) | |
1913 | { | |
1914 | operand_reloadnum[i] | |
1915 | = push_reload (recog_operand[i], | |
1916 | recog_operand[goal_alternative_matched[i]], | |
1917 | recog_operand_loc[i], | |
1918 | recog_operand_loc[goal_alternative_matched[i]], | |
1919 | (enum reg_class) goal_alternative[i], | |
1920 | operand_mode[i], | |
1921 | operand_mode[goal_alternative_matched[i]], | |
1922 | VOIDmode, 0, 0); | |
1923 | operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum; | |
1924 | } | |
1925 | else if (modified[i] == RELOAD_WRITE | |
1926 | && modified[goal_alternative_matched[i]] == RELOAD_READ) | |
1927 | { | |
1928 | operand_reloadnum[goal_alternative_matched[i]] | |
1929 | = push_reload (recog_operand[goal_alternative_matched[i]], | |
1930 | recog_operand[i], | |
1931 | recog_operand_loc[goal_alternative_matched[i]], | |
1932 | recog_operand_loc[i], | |
1933 | (enum reg_class) goal_alternative[i], | |
1934 | operand_mode[goal_alternative_matched[i]], | |
1935 | operand_mode[i], | |
1936 | VOIDmode, 0, 0); | |
1937 | operand_reloadnum[i] = output_reloadnum; | |
1938 | } | |
1939 | else if (insn_code_number >= 0) | |
1940 | abort (); | |
1941 | else | |
1942 | { | |
1943 | error_for_asm (insn, "inconsistent operand constraints in an `asm'"); | |
1944 | /* Avoid further trouble with this insn. */ | |
1945 | PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx); | |
1946 | n_reloads = 0; | |
1947 | return; | |
1948 | } | |
1949 | } | |
1950 | else if (goal_alternative_matched[i] < 0 | |
1951 | && goal_alternative_matches[i] < 0 | |
1952 | && optimize) | |
1953 | { | |
1954 | rtx operand = recog_operand[i]; | |
1955 | /* For each non-matching operand that's a pseudo-register | |
1956 | that didn't get a hard register, make an optional reload. | |
1957 | This may get done even if the insn needs no reloads otherwise. */ | |
1958 | /* (It would be safe to make an optional reload for a matching pair | |
1959 | of operands, but we don't bother yet.) */ | |
1960 | while (GET_CODE (operand) == SUBREG) | |
1961 | operand = XEXP (operand, 0); | |
1962 | if (GET_CODE (operand) == REG | |
1963 | && REGNO (operand) >= FIRST_PSEUDO_REGISTER | |
1964 | && reg_renumber[REGNO (operand)] < 0 | |
1965 | && (enum reg_class) goal_alternative[i] != NO_REGS | |
1966 | /* Don't make optional output reloads for jump insns | |
1967 | (such as aobjeq on the vax). */ | |
1968 | && (modified[i] == RELOAD_READ | |
1969 | || GET_CODE (insn) != JUMP_INSN)) | |
1970 | operand_reloadnum[i] | |
1971 | = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0, | |
1972 | modified[i] != RELOAD_READ ? recog_operand[i] : 0, | |
1973 | recog_operand_loc[i], 0, | |
1974 | (enum reg_class) goal_alternative[i], | |
1975 | (modified[i] == RELOAD_WRITE ? VOIDmode : operand_mode[i]), | |
1976 | (modified[i] == RELOAD_READ ? VOIDmode : operand_mode[i]), | |
1977 | (insn_code_number < 0 ? 0 | |
1978 | : insn_operand_strict_low[insn_code_number][i]), | |
1979 | 1, 0); | |
1980 | /* Make an optional reload for an explicit mem ref. */ | |
1981 | else if (GET_CODE (operand) == MEM | |
1982 | && (enum reg_class) goal_alternative[i] != NO_REGS | |
1983 | /* Don't make optional output reloads for jump insns | |
1984 | (such as aobjeq on the vax). */ | |
1985 | && (modified[i] == RELOAD_READ | |
1986 | || GET_CODE (insn) != JUMP_INSN)) | |
1987 | operand_reloadnum[i] | |
1988 | = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0, | |
1989 | modified[i] != RELOAD_READ ? recog_operand[i] : 0, | |
1990 | recog_operand_loc[i], 0, | |
1991 | (enum reg_class) goal_alternative[i], | |
1992 | (modified[i] == RELOAD_WRITE ? VOIDmode : operand_mode[i]), | |
1993 | (modified[i] == RELOAD_READ ? VOIDmode : operand_mode[i]), | |
1994 | (insn_code_number < 0 ? 0 | |
1995 | : insn_operand_strict_low[insn_code_number][i]), | |
1996 | 1, 0); | |
1997 | } | |
1998 | ||
1999 | /* Record the values of the earlyclobber operands for the caller. */ | |
2000 | if (goal_earlyclobber) | |
2001 | for (i = 0; i < noperands; i++) | |
2002 | if (goal_alternative_earlyclobber[i]) | |
2003 | reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i]; | |
2004 | ||
2005 | /* If this insn pattern contains any MATCH_DUP's, make sure that | |
2006 | they will be substituted if the operands they match are substituted. | |
2007 | Also do now any substitutions we already did on the operands. */ | |
2008 | if (insn_code_number >= 0) | |
2009 | for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--) | |
2010 | { | |
2011 | int opno = recog_dup_num[i]; | |
2012 | *recog_dup_loc[i] = *recog_operand_loc[opno]; | |
2013 | if (operand_reloadnum[opno] >= 0) | |
2014 | push_replacement (recog_dup_loc[i], operand_reloadnum[opno], | |
2015 | insn_operand_mode[insn_code_number][opno]); | |
2016 | } | |
2017 | ||
2018 | #if 0 | |
2019 | /* This loses because reloading of prior insns can invalidate the equivalence | |
2020 | (or at least find_equiv_reg isn't smart enough to find it any more), | |
2021 | causing this insn to need more reload regs than it needed before. | |
2022 | It may be too late to make the reload regs available. | |
2023 | Now this optimization is done safely in choose_reload_targets. */ | |
2024 | ||
2025 | /* For each reload of a reg into some other class of reg, | |
2026 | search for an existing equivalent reg (same value now) in the right class. | |
2027 | We can use it as long as we don't need to change its contents. */ | |
2028 | for (i = 0; i < n_reloads; i++) | |
2029 | if (reload_reg_rtx[i] == 0 | |
2030 | && reload_in[i] != 0 | |
2031 | && GET_CODE (reload_in[i]) == REG | |
2032 | && reload_out[i] == 0) | |
2033 | { | |
2034 | reload_reg_rtx[i] | |
2035 | = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1, | |
2036 | static_reload_reg_p, 0, reload_inmode[i]); | |
2037 | /* Prevent generation of insn to load the value | |
2038 | because the one we found already has the value. */ | |
2039 | if (reload_reg_rtx[i]) | |
2040 | reload_in[i] = reload_reg_rtx[i]; | |
2041 | } | |
2042 | #endif | |
2043 | ||
2044 | #else /* no REGISTER_CONSTRAINTS */ | |
2045 | int noperands; | |
2046 | int insn_code_number; | |
2047 | int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */ | |
2048 | register int i; | |
2049 | rtx body = PATTERN (insn); | |
2050 | ||
2051 | n_reloads = 0; | |
2052 | n_replacements = 0; | |
2053 | n_earlyclobbers = 0; | |
2054 | replace_reloads = replace; | |
2055 | indirect_ok = ind_ok; | |
2056 | this_insn = insn; | |
2057 | ||
2058 | /* Find what kind of insn this is. NOPERANDS gets number of operands. | |
2059 | Store the operand values in RECOG_OPERAND and the locations | |
2060 | of the words in the insn that point to them in RECOG_OPERAND_LOC. | |
2061 | Return if the insn needs no reload processing. */ | |
2062 | ||
2063 | switch (GET_CODE (body)) | |
2064 | { | |
2065 | case USE: | |
2066 | case CLOBBER: | |
2067 | case ASM_INPUT: | |
2068 | case ADDR_VEC: | |
2069 | case ADDR_DIFF_VEC: | |
2070 | return; | |
2071 | ||
2072 | case PARALLEL: | |
2073 | case SET: | |
2074 | noperands = asm_noperands (body); | |
2075 | if (noperands >= 0) | |
2076 | { | |
2077 | /* This insn is an `asm' with operands. | |
2078 | First, find out how many operands, and allocate space. */ | |
2079 | ||
2080 | insn_code_number = -1; | |
2081 | /* ??? This is a bug! ??? | |
2082 | Give up and delete this insn if it has too many operands. */ | |
2083 | if (noperands > MAX_RECOG_OPERANDS) | |
2084 | abort (); | |
2085 | ||
2086 | /* Now get the operand values out of the insn. */ | |
2087 | ||
2088 | decode_asm_operands (body, recog_operand, recog_operand_loc, 0, 0); | |
2089 | break; | |
2090 | } | |
2091 | ||
2092 | default: | |
2093 | /* Ordinary insn: recognize it, allocate space for operands and | |
2094 | constraints, and get them out via insn_extract. */ | |
2095 | ||
2096 | insn_code_number = recog_memoized (insn); | |
2097 | noperands = insn_n_operands[insn_code_number]; | |
2098 | insn_extract (insn); | |
2099 | } | |
2100 | ||
2101 | if (noperands == 0) | |
2102 | return; | |
2103 | ||
2104 | for (i = 0; i < noperands; i++) | |
2105 | { | |
2106 | register RTX_CODE code = GET_CODE (recog_operand[i]); | |
2107 | ||
2108 | if (insn_code_number >= 0) | |
2109 | if (insn_operand_address_p[insn_code_number][i]) | |
2110 | find_reloads_address (VOIDmode, 0, | |
2111 | recog_operand[i], recog_operand_loc[i], | |
2112 | recog_operand[i]); | |
2113 | if (code == MEM) | |
2114 | find_reloads_address (GET_MODE (recog_operand[i]), | |
2115 | recog_operand_loc[i], | |
2116 | XEXP (recog_operand[i], 0), | |
2117 | &XEXP (recog_operand[i], 0), | |
2118 | recog_operand[i]); | |
2119 | if (code == SUBREG) | |
2120 | recog_operand[i] = *recog_operand_loc[i] | |
2121 | = find_reloads_toplev (recog_operand[i]); | |
2122 | if (code == REG) | |
2123 | { | |
2124 | register int regno = REGNO (recog_operand[i]); | |
2125 | if (reg_equiv_constant[regno] != 0) | |
2126 | recog_operand[i] = *recog_operand_loc[i] | |
2127 | = reg_equiv_constant[regno]; | |
2128 | #if 0 /* This might screw code in reload1.c to delete prior output-reload | |
2129 | that feeds this insn. */ | |
2130 | if (reg_equiv_mem[regno] != 0) | |
2131 | recog_operand[i] = *recog_operand_loc[i] | |
2132 | = reg_equiv_mem[regno]; | |
2133 | #endif | |
2134 | } | |
2135 | } | |
2136 | #endif /* no REGISTER_CONSTRAINTS */ | |
2137 | ||
2138 | /* Determine which part of the insn each reload is needed for, | |
2139 | based on which operand the reload is needed for. | |
2140 | Reloads of entire operands are classified as RELOAD_OTHER. | |
2141 | So are reloads for which a unique purpose is not known. */ | |
2142 | ||
2143 | for (i = 0; i < n_reloads; i++) | |
2144 | { | |
2145 | reload_when_needed[i] = RELOAD_OTHER; | |
2146 | ||
2147 | if (reload_needed_for[i] != 0 && ! reload_needed_for_multiple[i]) | |
2148 | { | |
2149 | int j; | |
2150 | int output_address = 0; | |
2151 | int input_address = 0; | |
2152 | int operand_address = 0; | |
2153 | ||
2154 | /* This reload is needed only for the address of something. | |
2155 | Determine whether it is needed for addressing an operand | |
2156 | being reloaded for input, whether it is needed for an | |
2157 | operand being reloaded for output, and whether it is needed | |
2158 | for addressing an operand that won't really be reloaded. */ | |
2159 | ||
2160 | for (j = 0; j < n_reloads; j++) | |
2161 | if (reload_needed_for[i] == reload_in[j] | |
2162 | || reload_needed_for[i] == reload_out[j]) | |
2163 | { | |
2164 | if (reload_optional[j]) | |
2165 | operand_address = 1; | |
2166 | else | |
2167 | { | |
2168 | if (reload_needed_for[i] == reload_in[j]) | |
2169 | input_address = 1; | |
2170 | if (reload_needed_for[i] == reload_out[j]) | |
2171 | output_address = 1; | |
2172 | } | |
2173 | } | |
2174 | ||
2175 | /* If it is needed for only one of those, record which one. */ | |
2176 | ||
2177 | if (input_address && ! output_address && ! operand_address) | |
2178 | reload_when_needed[i] = RELOAD_FOR_INPUT_RELOAD_ADDRESS; | |
2179 | if (output_address && ! input_address && ! operand_address) | |
2180 | reload_when_needed[i] = RELOAD_FOR_OUTPUT_RELOAD_ADDRESS; | |
2181 | if (operand_address && ! input_address && ! output_address) | |
2182 | reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS; | |
2183 | } | |
2184 | } | |
2185 | ||
2186 | /* Perhaps an output reload can be combined with another | |
2187 | to reduce needs by one. */ | |
2188 | if (!goal_earlyclobber) | |
2189 | combine_reloads (); | |
2190 | } | |
2191 | ||
2192 | /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT | |
2193 | accepts a memory operand with constant address. */ | |
2194 | ||
2195 | static int | |
2196 | alternative_allows_memconst (constraint, altnum) | |
2197 | char *constraint; | |
2198 | int altnum; | |
2199 | { | |
2200 | register int c; | |
2201 | /* Skip alternatives before the one requested. */ | |
2202 | while (altnum > 0) | |
2203 | { | |
2204 | while (*constraint++ != ','); | |
2205 | altnum--; | |
2206 | } | |
2207 | /* Scan the requested alternative for 'm' or 'o'. | |
2208 | If one of them is present, this alternative accepts memory constants. */ | |
2209 | while ((c = *constraint++) && c != ',' && c != '#') | |
2210 | if (c == 'm' || c == 'o') | |
2211 | return 1; | |
2212 | return 0; | |
2213 | } | |
2214 | \f | |
2215 | /* Scan X for memory references and scan the addresses for reloading. | |
2216 | Also checks for references to "constant" regs that we want to eliminate | |
2217 | and replaces them with the values they stand for. | |
2218 | We may alter X descructively if it contains a reference to such. | |
2219 | If X is just a constant reg, we return the equivalent value | |
2220 | instead of X. */ | |
2221 | ||
2222 | static rtx | |
2223 | find_reloads_toplev (x) | |
2224 | rtx x; | |
2225 | { | |
2226 | register RTX_CODE code = GET_CODE (x); | |
2227 | ||
2228 | register char *fmt = GET_RTX_FORMAT (code); | |
2229 | register int i; | |
2230 | ||
2231 | if (code == REG) | |
2232 | { | |
2233 | /* This code is duplicated for speed in find_reloads. */ | |
2234 | register int regno = REGNO (x); | |
2235 | if (reg_equiv_constant[regno] != 0) | |
2236 | x = reg_equiv_constant[regno]; | |
2237 | #if 0 | |
2238 | /* This creates (subreg (mem...)) which would cause an unnecessary | |
2239 | reload of the mem. */ | |
2240 | else if (reg_equiv_mem[regno] != 0) | |
2241 | x = reg_equiv_mem[regno]; | |
2242 | #endif | |
2243 | else if (reg_equiv_address[regno] != 0) | |
2244 | { | |
2245 | x = gen_rtx (MEM, GET_MODE (x), | |
2246 | reg_equiv_address[regno]); | |
2247 | find_reloads_address (GET_MODE (x), 0, | |
2248 | XEXP (x, 0), | |
2249 | &XEXP (x, 0), x); | |
2250 | } | |
2251 | return x; | |
2252 | } | |
2253 | if (code == MEM) | |
2254 | { | |
2255 | rtx tem = x; | |
2256 | find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0), x); | |
2257 | return tem; | |
2258 | } | |
2259 | ||
2260 | if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG) | |
2261 | { | |
2262 | /* Check for SUBREG containing a REG that's equivalent to a constant. */ | |
2263 | register int regno = REGNO (SUBREG_REG (x)); | |
2264 | if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 | |
2265 | && reg_equiv_constant[regno] != 0) | |
2266 | { | |
2267 | /* If the constant has a known value, truncate it right now. */ | |
2268 | if (GET_CODE (reg_equiv_constant[regno]) == CONST_INT) | |
2269 | { | |
2270 | int size = GET_MODE_BITSIZE (GET_MODE (x)); | |
2271 | if (size < BITS_PER_WORD) | |
2272 | return gen_rtx (CONST_INT, VOIDmode, | |
2273 | INTVAL (reg_equiv_constant[regno]) | |
2274 | & ((1 << size) - 1)); | |
2275 | return reg_equiv_constant[regno]; | |
2276 | } | |
2277 | /* If the constant is symbolic, allow it to be substituted normally. | |
2278 | push_reload will strip the subreg later. */ | |
2279 | } | |
2280 | /* If the subreg contains a reg that will be converted to a mem, | |
2281 | convert the subreg to a narrower memref now. | |
2282 | Otherwise, we would get (subreg (mem ...) ...), | |
2283 | which would force reload of the mem. */ | |
2284 | else if (regno >= FIRST_PSEUDO_REGISTER && reg_equiv_address[regno] != 0) | |
2285 | { | |
2286 | int offset = SUBREG_WORD (x) * UNITS_PER_WORD; | |
2287 | rtx addr; | |
2288 | #ifdef BYTES_BIG_ENDIAN | |
2289 | int size; | |
2290 | size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))); | |
2291 | offset += min (size, UNITS_PER_WORD); | |
2292 | size = GET_MODE_SIZE (GET_MODE (x)); | |
2293 | offset -= min (size, UNITS_PER_WORD); | |
2294 | #endif | |
2295 | addr = plus_constant (reg_equiv_address[regno], offset); | |
2296 | x = gen_rtx (MEM, GET_MODE (x), addr); | |
2297 | find_reloads_address (GET_MODE (x), 0, | |
2298 | XEXP (x, 0), | |
2299 | &XEXP (x, 0), x); | |
2300 | } | |
2301 | ||
2302 | } | |
2303 | ||
2304 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2305 | { | |
2306 | if (fmt[i] == 'e') | |
2307 | XEXP (x, i) = find_reloads_toplev (XEXP (x, i)); | |
2308 | } | |
2309 | return x; | |
2310 | } | |
2311 | ||
2312 | static rtx | |
2313 | make_memloc (ad, regno) | |
2314 | rtx ad; | |
2315 | int regno; | |
2316 | { | |
2317 | register int i; | |
2318 | rtx tem = reg_equiv_address[regno]; | |
2319 | for (i = 0; i < n_memlocs; i++) | |
2320 | if (rtx_equal_p (tem, XEXP (memlocs[i], 0))) | |
2321 | return memlocs[i]; | |
2322 | tem = gen_rtx (MEM, GET_MODE (ad), tem); | |
2323 | memlocs[n_memlocs++] = tem; | |
2324 | return tem; | |
2325 | } | |
2326 | ||
2327 | /* Record all reloads needed for handling memory address AD | |
2328 | which appears in *LOC in a memory reference to mode MODE | |
2329 | which itself is found in location *MEMREFLOC. | |
2330 | Note that we take shortcuts assuming that no multi-reg machine mode | |
2331 | occurs as part of an address. | |
2332 | ||
2333 | OPERAND is the operand of the insn within which this address appears. | |
2334 | ||
2335 | Value is nonzero if this address is reloaded or replaced as a whole. | |
2336 | This is interesting to the caller if the address is an autoincrement. */ | |
2337 | ||
2338 | static int | |
2339 | find_reloads_address (mode, memrefloc, ad, loc, operand) | |
2340 | enum machine_mode mode; | |
2341 | rtx *memrefloc; | |
2342 | rtx ad; | |
2343 | rtx *loc; | |
2344 | rtx operand; | |
2345 | { | |
2346 | register int regno; | |
2347 | rtx tem; | |
2348 | ||
2349 | if (GET_CODE (ad) == REG) | |
2350 | { | |
2351 | regno = REGNO (ad); | |
2352 | ||
2353 | if (reg_equiv_constant[regno] != 0) | |
2354 | { | |
2355 | if (strict_memory_address_p (mode, reg_equiv_constant[regno])) | |
2356 | { | |
2357 | *loc = ad = reg_equiv_constant[regno]; | |
2358 | return 1; | |
2359 | } | |
2360 | } | |
2361 | #if 0 /* This might screw code in reload1.c to delete prior output-reload | |
2362 | that feeds this insn. */ | |
2363 | if (reg_equiv_mem[regno] != 0) | |
2364 | { | |
2365 | if (strict_memory_address_p (mode, reg_equiv_mem[regno])) | |
2366 | { | |
2367 | *loc = ad = reg_equiv_mem[regno]; | |
2368 | return 1; | |
2369 | } | |
2370 | } | |
2371 | #endif | |
2372 | if (reg_equiv_address[regno] != 0) | |
2373 | { | |
2374 | rtx tem = make_memloc (ad, regno); | |
2375 | push_reload (XEXP (tem, 0), 0, &XEXP (tem, 0), 0, | |
2376 | BASE_REG_CLASS, | |
2377 | GET_MODE (XEXP (tem, 0)), 0, VOIDmode, 0, | |
2378 | operand); | |
2379 | push_reload (tem, 0, loc, 0, BASE_REG_CLASS, | |
2380 | GET_MODE (ad), 0, VOIDmode, 0, | |
2381 | operand); | |
2382 | return 1; | |
2383 | } | |
2384 | if (! (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 | |
2385 | ? indirect_ok | |
2386 | : REGNO_OK_FOR_BASE_P (regno))) | |
2387 | { | |
2388 | push_reload (ad, 0, loc, 0, BASE_REG_CLASS, | |
2389 | GET_MODE (ad), 0, VOIDmode, 0, operand); | |
2390 | return 1; | |
2391 | } | |
2392 | return 0; | |
2393 | } | |
2394 | ||
2395 | if (strict_memory_address_p (mode, ad)) | |
2396 | { | |
2397 | /* The address appears valid, so reloads are not needed. | |
2398 | But the address may contain an eliminable register. | |
2399 | This can happen because a machine with indirect addressing | |
2400 | may consider a pseudo register by itself a valid address even when | |
2401 | it has failed to get a hard reg. | |
2402 | So do a tree-walk to find and eliminate all such regs. */ | |
2403 | ||
2404 | /* But first quickly dispose of a common case. */ | |
2405 | if (GET_CODE (ad) == PLUS | |
2406 | && GET_CODE (XEXP (ad, 1)) == CONST_INT | |
2407 | && GET_CODE (XEXP (ad, 0)) == REG | |
2408 | && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0) | |
2409 | return 0; | |
2410 | ||
2411 | subst_reg_equivs_changed = 0; | |
2412 | *loc = subst_reg_equivs (ad); | |
2413 | ||
2414 | if (! subst_reg_equivs_changed) | |
2415 | return 0; | |
2416 | ||
2417 | /* Check result for validity after substitution. */ | |
2418 | if (strict_memory_address_p (mode, ad)) | |
2419 | return 0; | |
2420 | } | |
2421 | ||
2422 | /* If we have address of a stack slot but it's not valid | |
2423 | (displacement is too large), compute the sum in a register. */ | |
2424 | if (GET_CODE (ad) == PLUS | |
2425 | && (XEXP (ad, 0) == frame_pointer_rtx | |
2426 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM | |
2427 | || XEXP (ad, 0) == arg_pointer_rtx | |
2428 | #endif | |
2429 | ) | |
2430 | && GET_CODE (XEXP (ad, 1)) == CONST_INT) | |
2431 | { | |
2432 | /* Unshare the MEM rtx so we can safely alter it. */ | |
2433 | if (memrefloc) | |
2434 | { | |
2435 | rtx oldref = *memrefloc; | |
2436 | *memrefloc = copy_rtx (*memrefloc); | |
2437 | loc = &XEXP (*memrefloc, 0); | |
2438 | if (operand == oldref) | |
2439 | operand = *memrefloc; | |
2440 | } | |
2441 | if (double_reg_address_ok) | |
2442 | { | |
2443 | /* Unshare the sum as well. */ | |
2444 | *loc = ad = copy_rtx (ad); | |
2445 | /* Reload the displacement into an index reg. | |
2446 | We assume the frame pointer or arg pointer is a base reg. */ | |
2447 | push_reload (XEXP (ad, 1), 0, &XEXP (ad, 1), 0, INDEX_REG_CLASS, | |
2448 | GET_MODE (ad), VOIDmode, 0, 0, operand); | |
2449 | } | |
2450 | else | |
2451 | { | |
2452 | /* If the sum of two regs is not necessarily valid, | |
2453 | reload the sum into a base reg. | |
2454 | That will at least work. */ | |
2455 | push_reload (ad, 0, loc, 0, BASE_REG_CLASS, | |
2456 | GET_MODE (ad), VOIDmode, 0, 0, operand); | |
2457 | } | |
2458 | return 1; | |
2459 | } | |
2460 | ||
2461 | /* See if address becomes valid when an eliminable register | |
2462 | in a sum is replaced. */ | |
2463 | ||
2464 | tem = ad; | |
2465 | if (GET_CODE (ad) == PLUS) | |
2466 | tem = subst_indexed_address (ad); | |
2467 | if (tem != ad && strict_memory_address_p (mode, tem)) | |
2468 | { | |
2469 | /* Ok, we win that way. Replace any additional eliminable | |
2470 | registers. */ | |
2471 | ||
2472 | subst_reg_equivs_changed = 0; | |
2473 | tem = subst_reg_equivs (tem); | |
2474 | ||
2475 | /* Make sure that didn't make the address invalid again. */ | |
2476 | ||
2477 | if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem)) | |
2478 | { | |
2479 | *loc = tem; | |
2480 | return 0; | |
2481 | } | |
2482 | } | |
2483 | ||
2484 | /* If constants aren't valid addresses, reload the constant address | |
2485 | into a register. */ | |
2486 | if (CONSTANT_ADDRESS_P (ad) && ! strict_memory_address_p (mode, ad)) | |
2487 | { | |
2488 | push_reload (ad, 0, loc, 0, | |
2489 | BASE_REG_CLASS, | |
2490 | Pmode, 0, VOIDmode, 0, operand); | |
2491 | return 1; | |
2492 | } | |
2493 | ||
2494 | return find_reloads_address_1 (ad, 0, loc, operand); | |
2495 | } | |
2496 | \f | |
2497 | /* Find all pseudo regs appearing in AD | |
2498 | that are eliminable in favor of equivalent values | |
2499 | and do not have hard regs; replace them by their equivalents. */ | |
2500 | ||
2501 | static rtx | |
2502 | subst_reg_equivs (ad) | |
2503 | rtx ad; | |
2504 | { | |
2505 | register RTX_CODE code = GET_CODE (ad); | |
2506 | register int i; | |
2507 | register char *fmt; | |
2508 | ||
2509 | switch (code) | |
2510 | { | |
2511 | case CONST_INT: | |
2512 | case CONST: | |
2513 | case CONST_DOUBLE: | |
2514 | case SYMBOL_REF: | |
2515 | case LABEL_REF: | |
2516 | case PC: | |
2517 | case CC0: | |
2518 | return ad; | |
2519 | ||
2520 | case REG: | |
2521 | { | |
2522 | register int regno = REGNO (ad); | |
2523 | ||
2524 | if (reg_equiv_constant[regno] != 0) | |
2525 | { | |
2526 | subst_reg_equivs_changed = 1; | |
2527 | return reg_equiv_constant[regno]; | |
2528 | } | |
2529 | } | |
2530 | return ad; | |
2531 | ||
2532 | case PLUS: | |
2533 | /* Quickly dispose of a common case. */ | |
2534 | if (XEXP (ad, 0) == frame_pointer_rtx | |
2535 | && GET_CODE (XEXP (ad, 1)) == CONST_INT) | |
2536 | return ad; | |
2537 | } | |
2538 | ||
2539 | fmt = GET_RTX_FORMAT (code); | |
2540 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2541 | if (fmt[i] == 'e') | |
2542 | XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i)); | |
2543 | return ad; | |
2544 | } | |
2545 | \f | |
2546 | /* If ADDR is a sum containing a pseudo register that should be | |
2547 | replaced with a constant (from reg_equiv_constant), | |
2548 | return the result of doing so, and also apply the associative | |
2549 | law so that the result is more likely to be a valid address. | |
2550 | (But it is not guaranteed to be one.) | |
2551 | ||
2552 | In all other cases, return ADDR. */ | |
2553 | ||
2554 | static rtx | |
2555 | subst_indexed_address (addr) | |
2556 | rtx addr; | |
2557 | { | |
2558 | rtx const_part = 0; | |
2559 | rtx var_part = 0; | |
2560 | int regno; | |
2561 | ||
2562 | if (GET_CODE (addr) == PLUS) | |
2563 | { | |
2564 | if (CONSTANT_P (XEXP (addr, 0))) | |
2565 | const_part = XEXP (addr, 0), | |
2566 | var_part = XEXP (addr, 1); | |
2567 | else if (CONSTANT_P (XEXP (addr, 1))) | |
2568 | const_part = XEXP (addr, 1), | |
2569 | var_part = XEXP (addr, 0); | |
2570 | else | |
2571 | var_part = addr; | |
2572 | ||
2573 | if (const_part && GET_CODE (const_part) == CONST) | |
2574 | const_part = XEXP (const_part, 0); | |
2575 | ||
2576 | if (GET_CODE (var_part) == REG | |
2577 | && (regno = REGNO (var_part)) >= FIRST_PSEUDO_REGISTER | |
2578 | && reg_renumber[regno] < 0 | |
2579 | && reg_equiv_constant[regno] != 0) | |
2580 | return (const_part | |
2581 | ? gen_rtx (CONST, VOIDmode, | |
2582 | gen_rtx (PLUS, Pmode, const_part, | |
2583 | reg_equiv_constant[regno])) | |
2584 | : reg_equiv_constant[regno]); | |
2585 | ||
2586 | if (GET_CODE (var_part) != PLUS) | |
2587 | return addr; | |
2588 | ||
2589 | if (GET_CODE (XEXP (var_part, 0)) == REG | |
2590 | && (regno = REGNO (XEXP (var_part, 0))) >= FIRST_PSEUDO_REGISTER | |
2591 | && reg_renumber[regno] < 0 | |
2592 | && reg_equiv_constant[regno] != 0) | |
2593 | return gen_rtx (PLUS, Pmode, XEXP (var_part, 1), | |
2594 | (const_part | |
2595 | ? gen_rtx (CONST, VOIDmode, | |
2596 | gen_rtx (PLUS, Pmode, const_part, | |
2597 | reg_equiv_constant[regno])) | |
2598 | : reg_equiv_constant[regno])); | |
2599 | ||
2600 | if (GET_CODE (XEXP (var_part, 1)) == REG | |
2601 | && (regno = REGNO (XEXP (var_part, 1))) >= FIRST_PSEUDO_REGISTER | |
2602 | && reg_renumber[regno] < 0 | |
2603 | && reg_equiv_constant[regno] != 0) | |
2604 | return gen_rtx (PLUS, Pmode, XEXP (var_part, 0), | |
2605 | (const_part | |
2606 | ? gen_rtx (CONST, VOIDmode, | |
2607 | gen_rtx (PLUS, Pmode, const_part, | |
2608 | reg_equiv_constant[regno])) | |
2609 | : reg_equiv_constant[regno])); | |
2610 | } | |
2611 | return addr; | |
2612 | } | |
2613 | \f | |
2614 | /* Record the pseudo registers we must reload into hard registers | |
2615 | in a subexpression of a would-be memory address, X. | |
2616 | (This function is not called if the address we find is strictly valid.) | |
2617 | CONTEXT = 1 means we are considering regs as index regs, | |
2618 | = 0 means we are considering them as base regs. | |
2619 | ||
2620 | OPERAND is the operand of the insn within which this address appears. | |
2621 | ||
2622 | We return nonzero if X, as a whole, is reloaded or replaced. */ | |
2623 | ||
2624 | /* Note that we take shortcuts assuming that no multi-reg machine mode | |
2625 | occurs as part of an address. | |
2626 | Also, this is not fully machine-customizable; it works for machines | |
2627 | such as vaxes and 68000's and 32000's, but other possible machines | |
2628 | could have addressing modes that this does not handle right. */ | |
2629 | ||
2630 | static int | |
2631 | find_reloads_address_1 (x, context, loc, operand) | |
2632 | rtx x; | |
2633 | int context; | |
2634 | rtx *loc; | |
2635 | rtx operand; | |
2636 | { | |
2637 | register RTX_CODE code = GET_CODE (x); | |
2638 | ||
2639 | if (code == PLUS) | |
2640 | { | |
2641 | register rtx op0 = XEXP (x, 0); | |
2642 | register rtx op1 = XEXP (x, 1); | |
2643 | register RTX_CODE code0 = GET_CODE (op0); | |
2644 | register RTX_CODE code1 = GET_CODE (op1); | |
2645 | if (code0 == MULT || code0 == SIGN_EXTEND || code1 == MEM) | |
2646 | { | |
2647 | find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand); | |
2648 | find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand); | |
2649 | } | |
2650 | else if (code1 == MULT || code1 == SIGN_EXTEND || code0 == MEM) | |
2651 | { | |
2652 | find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand); | |
2653 | find_reloads_address_1 (op1, 1, &XEXP (x, 1), operand); | |
2654 | } | |
2655 | else if (code0 == CONST_INT || code0 == CONST | |
2656 | || code0 == SYMBOL_REF || code0 == LABEL_REF) | |
2657 | { | |
2658 | find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand); | |
2659 | } | |
2660 | else if (code1 == CONST_INT || code1 == CONST | |
2661 | || code1 == SYMBOL_REF || code1 == LABEL_REF) | |
2662 | { | |
2663 | find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand); | |
2664 | } | |
2665 | else if (code0 == REG && code1 == REG) | |
2666 | { | |
2667 | if (REG_OK_FOR_INDEX_P (op0) | |
2668 | && REG_OK_FOR_BASE_P (op1)) | |
2669 | return 0; | |
2670 | else if (REG_OK_FOR_INDEX_P (op1) | |
2671 | && REG_OK_FOR_BASE_P (op0)) | |
2672 | return 0; | |
2673 | else if (REG_OK_FOR_BASE_P (op1)) | |
2674 | find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand); | |
2675 | else if (REG_OK_FOR_BASE_P (op0)) | |
2676 | find_reloads_address_1 (op1, 1, &XEXP (x, 1), operand); | |
2677 | else if (REG_OK_FOR_INDEX_P (op1)) | |
2678 | find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand); | |
2679 | else if (REG_OK_FOR_INDEX_P (op0)) | |
2680 | find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand); | |
2681 | else | |
2682 | { | |
2683 | find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand); | |
2684 | find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand); | |
2685 | } | |
2686 | } | |
2687 | else if (code0 == REG) | |
2688 | { | |
2689 | find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand); | |
2690 | find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand); | |
2691 | } | |
2692 | else if (code1 == REG) | |
2693 | { | |
2694 | find_reloads_address_1 (op1, 1, &XEXP (x, 1), operand); | |
2695 | find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand); | |
2696 | } | |
2697 | } | |
2698 | else if (code == POST_INC || code == POST_DEC | |
2699 | || code == PRE_INC || code == PRE_DEC) | |
2700 | { | |
2701 | rtx incremented = XEXP (x, 0); | |
2702 | ||
2703 | if (GET_CODE (incremented) == REG) | |
2704 | { | |
2705 | register int regno = REGNO (incremented); | |
2706 | int value = 0; | |
2707 | ||
2708 | /* A register that is incremented cannot be constant! */ | |
2709 | if (regno >= FIRST_PSEUDO_REGISTER | |
2710 | && reg_equiv_constant[regno] != 0) | |
2711 | abort (); | |
2712 | ||
2713 | /* Handle a register that is equivalent to a memory location | |
2714 | which cannot be addressed directly. */ | |
2715 | if (reg_equiv_address[regno] != 0) | |
2716 | { | |
2717 | rtx tem = make_memloc (incremented, regno); | |
2718 | /* First reload the memory location's address. */ | |
2719 | push_reload (XEXP (tem, 0), 0, &XEXP (tem, 0), 0, | |
2720 | BASE_REG_CLASS, | |
2721 | GET_MODE (XEXP (tem, 0)), 0, VOIDmode, 0, | |
2722 | operand); | |
2723 | /* Put this inside a new increment-expression. */ | |
2724 | x = gen_rtx (GET_CODE (x), GET_MODE (x), tem); | |
2725 | /* Proceed to reload that, as if it contained a register. */ | |
2726 | } | |
2727 | ||
2728 | /* If we have a hard register that is ok as an index, | |
2729 | don't make a reload. If an autoincrement of a nice register | |
2730 | isn't "valid", it must be that no autoincrement is "valid". | |
2731 | If that is true and something made an autoincrement anyway, | |
2732 | this must be a special context where one is allowed. | |
2733 | (For example, a "push" instruction.) | |
2734 | We can't improve this address, so leave it alone. */ | |
2735 | ||
2736 | /* Otherwise, reload the autoincrement into a suitable hard reg | |
2737 | and record how much to increment by. */ | |
2738 | ||
2739 | if (reg_renumber[regno] >= 0) | |
2740 | regno = reg_renumber[regno]; | |
2741 | if ((regno >= FIRST_PSEUDO_REGISTER | |
2742 | || !(context ? REGNO_OK_FOR_INDEX_P (regno) | |
2743 | : REGNO_OK_FOR_BASE_P (regno)))) | |
2744 | { | |
2745 | register rtx link; | |
2746 | ||
2747 | int reloadnum | |
2748 | = push_reload (x, 0, loc, 0, | |
2749 | context ? INDEX_REG_CLASS : BASE_REG_CLASS, | |
2750 | GET_MODE (x), GET_MODE (x), VOIDmode, 0, operand); | |
2751 | reload_inc[reloadnum] | |
2752 | = find_inc_amount (PATTERN (this_insn), incremented); | |
2753 | ||
2754 | value = 1; | |
2755 | ||
2756 | /* Update the REG_INC notes. */ | |
2757 | ||
2758 | for (link = REG_NOTES (this_insn); | |
2759 | link; link = XEXP (link, 1)) | |
2760 | if (REG_NOTE_KIND (link) == REG_INC | |
2761 | && REGNO (XEXP (link, 0)) == REGNO (incremented)) | |
2762 | push_replacement (&XEXP (link, 0), reloadnum, VOIDmode); | |
2763 | } | |
2764 | return value; | |
2765 | } | |
2766 | } | |
2767 | else if (code == REG) | |
2768 | { | |
2769 | register int regno = REGNO (x); | |
2770 | ||
2771 | if (reg_equiv_constant[regno] != 0) | |
2772 | { | |
2773 | push_reload (reg_equiv_constant[regno], 0, loc, 0, | |
2774 | context ? INDEX_REG_CLASS : BASE_REG_CLASS, | |
2775 | GET_MODE (x), 0, VOIDmode, 0, operand); | |
2776 | return 1; | |
2777 | } | |
2778 | ||
2779 | #if 0 /* This might screw code in reload1.c to delete prior output-reload | |
2780 | that feeds this insn. */ | |
2781 | if (reg_equiv_mem[regno] != 0) | |
2782 | { | |
2783 | push_reload (reg_equiv_mem[regno], 0, loc, 0, | |
2784 | context ? INDEX_REG_CLASS : BASE_REG_CLASS, | |
2785 | GET_MODE (x), 0, VOIDmode, 0, operand); | |
2786 | return 1; | |
2787 | } | |
2788 | #endif | |
2789 | if (reg_equiv_address[regno] != 0) | |
2790 | { | |
2791 | x = make_memloc (x, regno); | |
2792 | push_reload (XEXP (x, 0), 0, &XEXP (x, 0), 0, | |
2793 | BASE_REG_CLASS, | |
2794 | GET_MODE (XEXP (x, 0)), 0, VOIDmode, 0, operand); | |
2795 | } | |
2796 | ||
2797 | if (reg_renumber[regno] >= 0) | |
2798 | regno = reg_renumber[regno]; | |
2799 | if ((regno >= FIRST_PSEUDO_REGISTER | |
2800 | || !(context ? REGNO_OK_FOR_INDEX_P (regno) | |
2801 | : REGNO_OK_FOR_BASE_P (regno)))) | |
2802 | { | |
2803 | push_reload (x, 0, loc, 0, | |
2804 | context ? INDEX_REG_CLASS : BASE_REG_CLASS, | |
2805 | GET_MODE (x), 0, VOIDmode, 0, operand); | |
2806 | return 1; | |
2807 | } | |
2808 | } | |
2809 | else | |
2810 | { | |
2811 | register char *fmt = GET_RTX_FORMAT (code); | |
2812 | register int i; | |
2813 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2814 | { | |
2815 | if (fmt[i] == 'e') | |
2816 | find_reloads_address_1 (XEXP (x, i), context, &XEXP (x, i), operand); | |
2817 | } | |
2818 | } | |
2819 | ||
2820 | return 0; | |
2821 | } | |
2822 | \f | |
2823 | /* Substitute into X the registers into which we have reloaded | |
2824 | the things that need reloading. The array `replacements' | |
2825 | says contains the locations of all pointers that must be changed | |
2826 | and says what to replace them with. | |
2827 | ||
2828 | Return the rtx that X translates into; usually X, but modified. */ | |
2829 | ||
2830 | void | |
2831 | subst_reloads () | |
2832 | { | |
2833 | register int i; | |
2834 | ||
2835 | for (i = 0; i < n_replacements; i++) | |
2836 | { | |
2837 | register struct replacement *r = &replacements[i]; | |
2838 | register rtx reloadreg = reload_reg_rtx[r->what]; | |
2839 | if (reloadreg) | |
2840 | { | |
2841 | /* Encapsulate RELOADREG so its machine mode matches what | |
2842 | used to be there. */ | |
2843 | if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode) | |
2844 | reloadreg = gen_rtx (SUBREG, r->mode, reloadreg, 0); | |
2845 | *r->where = reloadreg; | |
2846 | } | |
2847 | /* If reload got no reg and isn't optional, something's wrong. */ | |
2848 | else if (! reload_optional[r->what]) | |
2849 | abort (); | |
2850 | } | |
2851 | } | |
2852 | \f | |
2853 | #if 0 | |
2854 | ||
2855 | /* [[This function is currently obsolete, now that volatility | |
2856 | is represented by a special bit `volatil' so VOLATILE is never used; | |
2857 | and UNCHANGING has never been brought into use.]] | |
2858 | ||
2859 | Alter X by eliminating all VOLATILE and UNCHANGING expressions. | |
2860 | Each of them is replaced by its operand. | |
2861 | Thus, (PLUS (VOLATILE (MEM (REG 5))) (CONST_INT 4)) | |
2862 | becomes (PLUS (MEM (REG 5)) (CONST_INT 4)). | |
2863 | ||
2864 | If X is itself a VOLATILE expression, | |
2865 | we return the expression that should replace it | |
2866 | but we do not modify X. */ | |
2867 | ||
2868 | static rtx | |
2869 | forget_volatility (x) | |
2870 | register rtx x; | |
2871 | { | |
2872 | enum rtx_code code = GET_CODE (x); | |
2873 | register char *fmt; | |
2874 | register int i; | |
2875 | register rtx value = 0; | |
2876 | ||
2877 | switch (code) | |
2878 | { | |
2879 | case LABEL_REF: | |
2880 | case SYMBOL_REF: | |
2881 | case CONST_INT: | |
2882 | case CONST_DOUBLE: | |
2883 | case CONST: | |
2884 | case REG: | |
2885 | case CC0: | |
2886 | case PC: | |
2887 | return x; | |
2888 | ||
2889 | case VOLATILE: | |
2890 | case UNCHANGING: | |
2891 | return XEXP (x, 0); | |
2892 | } | |
2893 | ||
2894 | fmt = GET_RTX_FORMAT (code); | |
2895 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2896 | { | |
2897 | if (fmt[i] == 'e') | |
2898 | XEXP (x, i) = forget_volatility (XEXP (x, i)); | |
2899 | if (fmt[i] == 'E') | |
2900 | { | |
2901 | register int j; | |
2902 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
2903 | XVECEXP (x, i, j) = forget_volatility (XVECEXP (x, i, j)); | |
2904 | } | |
2905 | } | |
2906 | ||
2907 | return x; | |
2908 | } | |
2909 | ||
2910 | #endif | |
2911 | \f | |
2912 | /* Check the insns before INSN to see if there is a suitable register | |
2913 | containing the same value as GOAL. | |
2914 | If OTHER is -1, look for a register in class CLASS. | |
2915 | Otherwise, just see if register number OTHER shares GOAL's value. | |
2916 | ||
2917 | Return an rtx for the register found, or zero if none is found. | |
2918 | ||
2919 | If RELOAD_REG_P is (short *)1, | |
2920 | we reject any hard reg that appears in reload_reg_rtx | |
2921 | because such a hard reg is also needed coming into this insn. | |
2922 | ||
2923 | If RELOAD_REG_P is any other nonzero value, | |
2924 | it is a vector indexed by hard reg number | |
2925 | and we reject any hard reg whose element in the vector is nonnegative | |
2926 | as well as any that appears in reload_reg_rtx. | |
2927 | ||
2928 | If GOAL is zero, then GOALREG is a register number; we look | |
2929 | for an equivalent for that register. | |
2930 | ||
2931 | MODE is the machine mode of the value we want an equivalence for. | |
2932 | If GOAL is nonzero and not VOIDmode, then it must have mode MODE. | |
2933 | ||
2934 | This function is used by jump.c as well as in the reload pass. | |
2935 | ||
2936 | If GOAL is a PLUS, we assume it adds the stack pointer to a constant. */ | |
2937 | ||
2938 | rtx | |
2939 | find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode) | |
2940 | register rtx goal; | |
2941 | rtx insn; | |
2942 | enum reg_class class; | |
2943 | register int other; | |
2944 | short *reload_reg_p; | |
2945 | int goalreg; | |
2946 | enum machine_mode mode; | |
2947 | { | |
2948 | register rtx p = insn; | |
2949 | rtx valtry, value, where; | |
2950 | register rtx pat; | |
2951 | register int regno = -1; | |
2952 | int valueno; | |
2953 | int goal_mem = 0; | |
2954 | int goal_const = 0; | |
2955 | int goal_mem_addr_varies = 0; | |
2956 | int nregs; | |
2957 | int valuenregs; | |
2958 | ||
2959 | if (goal == 0) | |
2960 | regno = goalreg; | |
2961 | else if (GET_CODE (goal) == REG) | |
2962 | regno = REGNO (goal); | |
2963 | else if (GET_CODE (goal) == MEM) | |
2964 | { | |
2965 | enum rtx_code code = GET_CODE (XEXP (goal, 0)); | |
2966 | if (MEM_VOLATILE_P (goal)) | |
2967 | return 0; | |
2968 | if (flag_float_store | |
2969 | && (GET_MODE (goal) == DFmode || GET_MODE (goal) == SFmode)) | |
2970 | return 0; | |
2971 | /* An address with side effects must be reexecuted. */ | |
2972 | switch (code) | |
2973 | { | |
2974 | case POST_INC: | |
2975 | case PRE_INC: | |
2976 | case POST_DEC: | |
2977 | case PRE_DEC: | |
2978 | return 0; | |
2979 | } | |
2980 | goal_mem = 1; | |
2981 | } | |
2982 | else if (CONSTANT_P (goal)) | |
2983 | goal_const = 1; | |
2984 | else | |
2985 | return 0; | |
2986 | ||
2987 | /* On some machines, certain regs must always be rejected | |
2988 | because they don't behave the way ordinary registers do. */ | |
2989 | ||
2990 | #ifdef OVERLAPPING_REGNO_P | |
2991 | if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER | |
2992 | && OVERLAPPING_REGNO_P (regno)) | |
2993 | return 0; | |
2994 | #endif | |
2995 | ||
2996 | /* Scan insns back from INSN, looking for one that copies | |
2997 | a value into or out of GOAL. | |
2998 | Stop and give up if we reach a label. */ | |
2999 | ||
3000 | while (1) | |
3001 | { | |
3002 | p = PREV_INSN (p); | |
3003 | if (p == 0 || GET_CODE (p) == CODE_LABEL) | |
3004 | return 0; | |
3005 | if (GET_CODE (p) == INSN | |
3006 | /* If we don't want spill regs (true for all calls in this file) */ | |
3007 | && (! (reload_reg_p != 0 && reload_reg_p != (short *)1) | |
3008 | /* then ignore insns introduced by reload; they aren't useful | |
3009 | and can cause results in reload_as_needed to be different | |
3010 | from what they were when calculating the need for spills. | |
3011 | If we notice an input-reload insn here, we will reject it below, | |
3012 | but it might hide a usable equivalent. That makes bad code. | |
3013 | It may even abort: perhaps no reg was spilled for this insn | |
3014 | because it was assumed we would find that equivalent. */ | |
3015 | || INSN_UID (p) < reload_first_uid)) | |
3016 | { | |
3017 | pat = PATTERN (p); | |
3018 | /* First check for something that sets some reg equal to GOAL. */ | |
3019 | if (GET_CODE (pat) == SET | |
3020 | && ((regno >= 0 | |
3021 | && GET_CODE (SET_SRC (pat)) == REG | |
3022 | && REGNO (SET_SRC (pat)) == regno | |
3023 | && GET_CODE (valtry = SET_DEST (pat)) == REG) | |
3024 | || | |
3025 | (regno >= 0 | |
3026 | && GET_CODE (SET_DEST (pat)) == REG | |
3027 | && REGNO (SET_DEST (pat)) == regno | |
3028 | && GET_CODE (valtry = SET_SRC (pat)) == REG) | |
3029 | || | |
3030 | (goal_const && rtx_equal_p (SET_SRC (pat), goal) | |
3031 | && GET_CODE (valtry = SET_DEST (pat)) == REG) | |
3032 | || (goal_mem | |
3033 | && GET_CODE (valtry = SET_DEST (pat)) == REG | |
3034 | && rtx_renumbered_equal_p (goal, SET_SRC (pat))) | |
3035 | || (goal_mem | |
3036 | && GET_CODE (valtry = SET_SRC (pat)) == REG | |
3037 | && rtx_renumbered_equal_p (goal, SET_DEST (pat))))) | |
3038 | if (valueno = REGNO (valtry), | |
3039 | other >= 0 | |
3040 | ? valueno == other | |
3041 | : ((unsigned) valueno < FIRST_PSEUDO_REGISTER | |
3042 | && TEST_HARD_REG_BIT (reg_class_contents[(int) class], | |
3043 | valueno))) | |
3044 | { | |
3045 | value = valtry; | |
3046 | where = p; | |
3047 | break; | |
3048 | } | |
3049 | } | |
3050 | } | |
3051 | ||
3052 | /* We found a previous insn copying GOAL into a suitable other reg VALUE | |
3053 | (or copying VALUE into GOAL, if GOAL is also a register). | |
3054 | Now verify that VALUE is really valid. */ | |
3055 | ||
3056 | /* VALUENO is the register number of VALUE; a hard register. */ | |
3057 | ||
3058 | /* Don't find the sp as an equiv, since pushes that we don't notice | |
3059 | would invalidate it. */ | |
3060 | if (valueno == STACK_POINTER_REGNUM) | |
3061 | return 0; | |
3062 | ||
3063 | /* Reject VALUE if the copy-insn moved the wrong sort of datum. */ | |
3064 | if (GET_MODE (value) != mode) | |
3065 | return 0; | |
3066 | ||
3067 | /* Reject VALUE if it was loaded from GOAL | |
3068 | and is also a register that appears in the address of GOAL. */ | |
3069 | ||
3070 | if (goal_mem && value == SET_DEST (PATTERN (where)) | |
3071 | && refers_to_regno_p (valueno, | |
3072 | valueno + HARD_REGNO_NREGS (valueno, mode), | |
3073 | goal, 0)) | |
3074 | return 0; | |
3075 | ||
3076 | /* Reject registers that overlap GOAL. */ | |
3077 | ||
3078 | if (!goal_mem && !goal_const | |
3079 | && regno + HARD_REGNO_NREGS (regno, mode) > valueno | |
3080 | && regno < valueno + HARD_REGNO_NREGS (valueno, mode)) | |
3081 | return 0; | |
3082 | ||
3083 | /* Reject VALUE if it is one of the regs reserved for reloads. | |
3084 | Reload1 knows how to reuse them anyway, and it would get | |
3085 | confused if we allocated one without its knowledge. | |
3086 | (Now that insns introduced by reload are ignored above, | |
3087 | this case shouldn't happen, but I'm not positive.) */ | |
3088 | ||
3089 | if (reload_reg_p != 0 && reload_reg_p != (short *)1 | |
3090 | && reload_reg_p[valueno] >= 0) | |
3091 | return 0; | |
3092 | ||
3093 | /* On some machines, certain regs must always be rejected | |
3094 | because they don't behave the way ordinary registers do. */ | |
3095 | ||
3096 | #ifdef OVERLAPPING_REGNO_P | |
3097 | if (OVERLAPPING_REGNO_P (valueno)) | |
3098 | return 0; | |
3099 | #endif | |
3100 | ||
3101 | nregs = HARD_REGNO_NREGS (regno, mode); | |
3102 | valuenregs = HARD_REGNO_NREGS (valueno, mode); | |
3103 | ||
3104 | /* Reject VALUE if it is a register being used for an input reload | |
3105 | even if it is not one of those reserved. */ | |
3106 | ||
3107 | if (reload_reg_p != 0) | |
3108 | { | |
3109 | int i; | |
3110 | for (i = 0; i < n_reloads; i++) | |
3111 | if (reload_reg_rtx[i] != 0 && reload_in[i]) | |
3112 | { | |
3113 | int regno1 = REGNO (reload_reg_rtx[i]); | |
3114 | int nregs1 = HARD_REGNO_NREGS (regno1, | |
3115 | GET_MODE (reload_reg_rtx[i])); | |
3116 | if (regno1 < valueno + valuenregs | |
3117 | && regno1 + nregs1 > valueno) | |
3118 | return 0; | |
3119 | } | |
3120 | } | |
3121 | ||
3122 | if (goal_mem) | |
3123 | goal_mem_addr_varies = rtx_addr_varies_p (goal); | |
3124 | ||
3125 | /* Now verify that the values of GOAL and VALUE remain unaltered | |
3126 | until INSN is reached. */ | |
3127 | ||
3128 | p = insn; | |
3129 | while (1) | |
3130 | { | |
3131 | p = PREV_INSN (p); | |
3132 | if (p == where) | |
3133 | return value; | |
3134 | ||
3135 | /* Don't trust the conversion past a function call | |
3136 | if either of the two is in a call-clobbered register, or memory. */ | |
3137 | if (GET_CODE (p) == CALL_INSN | |
3138 | && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER | |
3139 | && call_used_regs[regno]) | |
3140 | || | |
3141 | (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER | |
3142 | && call_used_regs[valueno]) | |
3143 | || | |
3144 | goal_mem)) | |
3145 | return 0; | |
3146 | ||
3147 | if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN | |
3148 | || GET_CODE (p) == CALL_INSN) | |
3149 | { | |
3150 | /* If this insn P stores in either GOAL or VALUE, return 0. | |
3151 | If GOAL is a memory ref and this insn writes memory, return 0. | |
3152 | If GOAL is a memory ref and its address is not constant, | |
3153 | and this insn P changes a register, return 0. | |
3154 | That is in lieue of checking whether GOAL uses this register. */ | |
3155 | ||
3156 | pat = PATTERN (p); | |
3157 | if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER) | |
3158 | { | |
3159 | register rtx dest = SET_DEST (pat); | |
3160 | while (GET_CODE (dest) == SUBREG | |
3161 | || GET_CODE (dest) == ZERO_EXTRACT | |
3162 | || GET_CODE (dest) == SIGN_EXTRACT | |
3163 | || GET_CODE (dest) == STRICT_LOW_PART) | |
3164 | dest = XEXP (dest, 0); | |
3165 | if (GET_CODE (dest) == REG) | |
3166 | { | |
3167 | register int xregno = REGNO (dest); | |
3168 | int xnregs; | |
3169 | if (REGNO (dest) < FIRST_PSEUDO_REGISTER) | |
3170 | xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest)); | |
3171 | else | |
3172 | xnregs = 1; | |
3173 | if (xregno < regno + nregs && xregno + xnregs > regno) | |
3174 | return 0; | |
3175 | if (xregno < valueno + valuenregs | |
3176 | && xregno + xnregs > valueno) | |
3177 | return 0; | |
3178 | if (goal_mem_addr_varies) | |
3179 | return 0; | |
3180 | } | |
3181 | else if (goal_mem && GET_CODE (dest) == MEM | |
3182 | && ! push_operand (dest, GET_MODE (dest))) | |
3183 | return 0; | |
3184 | } | |
3185 | else if (GET_CODE (pat) == PARALLEL) | |
3186 | { | |
3187 | register int i; | |
3188 | for (i = XVECLEN (pat, 0) - 1; i >= 0; i--) | |
3189 | { | |
3190 | register rtx v1 = XVECEXP (pat, 0, i); | |
3191 | if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER) | |
3192 | { | |
3193 | register rtx dest = SET_DEST (v1); | |
3194 | while (GET_CODE (dest) == SUBREG | |
3195 | || GET_CODE (dest) == ZERO_EXTRACT | |
3196 | || GET_CODE (dest) == SIGN_EXTRACT | |
3197 | || GET_CODE (dest) == STRICT_LOW_PART) | |
3198 | dest = XEXP (dest, 0); | |
3199 | if (GET_CODE (dest) == REG) | |
3200 | { | |
3201 | register int xregno = REGNO (dest); | |
3202 | int xnregs; | |
3203 | if (REGNO (dest) < FIRST_PSEUDO_REGISTER) | |
3204 | xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest)); | |
3205 | else | |
3206 | xnregs = 1; | |
3207 | if (xregno < regno + nregs | |
3208 | && xregno + xnregs > regno) | |
3209 | return 0; | |
3210 | if (xregno < valueno + valuenregs | |
3211 | && xregno + xnregs > valueno) | |
3212 | return 0; | |
3213 | if (goal_mem_addr_varies) | |
3214 | return 0; | |
3215 | } | |
3216 | else if (goal_mem && GET_CODE (dest) == MEM | |
3217 | && ! push_operand (dest, GET_MODE (dest))) | |
3218 | return 0; | |
3219 | } | |
3220 | } | |
3221 | } | |
3222 | /* If this insn auto-increments or auto-decrements | |
3223 | either regno or valueno, return 0 now. | |
3224 | If GOAL is a memory ref and its address is not constant, | |
3225 | and this insn P increments a register, return 0. | |
3226 | That is in lieue of checking whether GOAL uses this register. */ | |
3227 | { | |
3228 | register rtx link; | |
3229 | ||
3230 | for (link = REG_NOTES (p); link; link = XEXP (link, 1)) | |
3231 | if (REG_NOTE_KIND (link) == REG_INC) | |
3232 | { | |
3233 | register int incno = REGNO (XEXP (link, 0)); | |
3234 | if (incno < regno + nregs && incno >= regno) | |
3235 | return 0; | |
3236 | if (incno < valueno + valuenregs && incno >= valueno) | |
3237 | return 0; | |
3238 | if (goal_mem_addr_varies) | |
3239 | return 0; | |
3240 | } | |
3241 | } | |
3242 | } | |
3243 | } | |
3244 | } | |
3245 | \f | |
3246 | /* Find a place where INCED appears in an increment or decrement operator | |
3247 | within X, and return the amount INCED is incremented or decremented by. | |
3248 | The value is always positive. */ | |
3249 | ||
3250 | static int | |
3251 | find_inc_amount (x, inced) | |
3252 | rtx x, inced; | |
3253 | { | |
3254 | register enum rtx_code code = GET_CODE (x); | |
3255 | register char *fmt; | |
3256 | register int i; | |
3257 | ||
3258 | if (code == MEM) | |
3259 | { | |
3260 | register rtx addr = XEXP (x, 0); | |
3261 | if ((GET_CODE (addr) == PRE_DEC | |
3262 | || GET_CODE (addr) == POST_DEC | |
3263 | || GET_CODE (addr) == PRE_INC | |
3264 | || GET_CODE (addr) == POST_INC) | |
3265 | && XEXP (addr, 0) == inced) | |
3266 | return GET_MODE_SIZE (GET_MODE (x)); | |
3267 | } | |
3268 | ||
3269 | fmt = GET_RTX_FORMAT (code); | |
3270 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
3271 | { | |
3272 | if (fmt[i] == 'e') | |
3273 | { | |
3274 | register int tem = find_inc_amount (XEXP (x, i), inced); | |
3275 | if (tem != 0) | |
3276 | return tem; | |
3277 | } | |
3278 | if (fmt[i] == 'E') | |
3279 | { | |
3280 | register int j; | |
3281 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
3282 | { | |
3283 | register int tem = find_inc_amount (XVECEXP (x, i, j), inced); | |
3284 | if (tem != 0) | |
3285 | return tem; | |
3286 | } | |
3287 | } | |
3288 | } | |
3289 | ||
3290 | return 0; | |
3291 | } |