Commit | Line | Data |
---|---|---|
da7c5cc6 | 1 | /* |
7b3e7257 | 2 | * Copyright (c) 1982, 1986, 1988 Regents of the University of California. |
da7c5cc6 KM |
3 | * All rights reserved. The Berkeley software License Agreement |
4 | * specifies the terms and conditions for redistribution. | |
5 | * | |
802ae52e | 6 | * @(#)cpu.h 7.6 (Berkeley) %G% |
da7c5cc6 | 7 | */ |
f5a2f2dd | 8 | |
adae96fc | 9 | #ifndef LOCORE |
f5a2f2dd BJ |
10 | /* |
11 | * Cpu identification, from SID register. | |
12 | */ | |
13 | union cpusid { | |
14 | int cpusid; | |
15 | struct cpuany { | |
16 | u_int :24, | |
17 | cp_type:8; | |
18 | } cpuany; | |
6692a5c8 JB |
19 | struct cpu8600 { |
20 | u_int cp_sno:12, /* serial number */ | |
21 | cp_plant:4, /* plant number */ | |
22 | cp_eco:8, /* eco level */ | |
23 | cp_type:8; /* VAX_8600 */ | |
24 | } cpu8600; | |
9a0de372 MK |
25 | struct cpu8200 { |
26 | u_int cp_urev:8, /* ucode rev */ | |
27 | cp_secp:1, /* secondary patch? */ | |
28 | cp_patch:10, /* patch number */ | |
29 | cp_hrev:4, /* hardware rev */ | |
30 | cp_5:1, /* true iff KA825 */ | |
31 | cp_type:8; /* VAX_8200 */ | |
32 | } cpu8200; | |
f5a2f2dd BJ |
33 | struct cpu780 { |
34 | u_int cp_sno:12, /* serial number */ | |
35 | cp_plant:3, /* plant number */ | |
9a0de372 MK |
36 | cp_eco:8, /* eco level */ |
37 | cp_5:1, /* true iff 785 */ | |
f5a2f2dd BJ |
38 | cp_type:8; /* VAX_780 */ |
39 | } cpu780; | |
40 | struct cpu750 { | |
41 | u_int cp_hrev:8, /* hardware rev level */ | |
42 | cp_urev:8, /* ucode rev level */ | |
43 | :8, | |
44 | cp_type:8; /* VAX_750 */ | |
45 | } cpu750; | |
ed63b43a JB |
46 | struct cpu730 { |
47 | u_int :8, /* reserved */ | |
48 | cp_urev:8, /* ucode rev level */ | |
49 | :8, /* reserved */ | |
50 | cp_type:8; /* VAX_730 */ | |
51 | } cpu730; | |
90dc7048 | 52 | struct cpu630 { |
7b3e7257 MK |
53 | u_int cp_hrev:8, /* hardware rev level */ |
54 | cp_urev:8, /* ucode rev level */ | |
55 | :8, | |
90dc7048 BK |
56 | cp_type:8; /* VAX_630 */ |
57 | } cpu630; | |
802ae52e TF |
58 | struct cpu650 { |
59 | u_int cp_urev:8, /* ucode rev level */ | |
60 | :16, /* reserved */ | |
61 | cp_type:8; /* VAX_650 */ | |
62 | } cpu650; | |
f5a2f2dd | 63 | }; |
adae96fc | 64 | #endif |
0fe372b3 MK |
65 | /* |
66 | * Vax CPU types. | |
67 | * Similar types are grouped with their earliest example. | |
68 | */ | |
f5a2f2dd BJ |
69 | #define VAX_780 1 |
70 | #define VAX_750 2 | |
10f66600 | 71 | #define VAX_730 3 |
9a0de372 MK |
72 | #define VAX_8600 4 |
73 | #define VAX_8200 5 | |
7b3e7257 | 74 | #define VAX_8800 6 |
9a0de372 MK |
75 | #define VAX_8500 6 /* same as 8800, 8700 */ |
76 | #define VAX_610 7 /* uVAX I */ | |
77 | #define VAX_630 8 /* uVAX II */ | |
802ae52e | 78 | #define VAX_650 10 /* uVAX 3000 */ |
f5a2f2dd | 79 | |
802ae52e | 80 | #define VAX_MAX 10 |
f5a2f2dd | 81 | |
0fe372b3 MK |
82 | /* |
83 | * Main IO backplane types. | |
84 | * This gives us a handle on how to do autoconfiguration. | |
85 | */ | |
86 | #define IO_SBI780 1 | |
87 | #define IO_CMI750 2 | |
88 | #define IO_XXX730 3 | |
89 | #define IO_ABUS 4 | |
90dc7048 | 90 | #define IO_QBUS 5 |
9a0de372 | 91 | #define IO_BI 6 |
7b3e7257 | 92 | #define IO_NMI 7 |
0fe372b3 | 93 | |
adae96fc | 94 | #ifndef LOCORE |
9a0de372 MK |
95 | /* |
96 | * CPU-dependent operations. | |
97 | */ | |
98 | struct clockops { | |
99 | int (*clkstartrt)(); /* start real time clock */ | |
100 | int (*clkread)(); /* set system time from clock */ | |
101 | int (*clkwrite)(); /* reset clock from system time */ | |
102 | }; | |
103 | ||
104 | struct cpuops { | |
105 | struct clockops *cpu_clock; /* clock operations */ | |
106 | int (*cpu_memenable)(); /* memory error (CRD intr) enable */ | |
107 | int (*cpu_memerr)(); /* memory error handler */ | |
108 | int (*cpu_mchk)(); /* machine check handler */ | |
109 | int (*cpu_init)(); /* special initialisation, if any */ | |
110 | }; | |
111 | ||
112 | /* return values from cpu_mchk */ | |
113 | #define MCHK_PANIC -1 | |
114 | #define MCHK_RECOVERED 0 | |
115 | ||
f5a2f2dd BJ |
116 | /* |
117 | * Per-cpu information for system. | |
118 | */ | |
119 | struct percpu { | |
f201ad4d | 120 | short pc_cputype; /* cpu type code */ |
3327052b | 121 | short pc_cpuspeed; /* relative speed of cpu */ |
0fe372b3 MK |
122 | short pc_nioa; /* number of IO adaptors/nexus blocks */ |
123 | struct iobus *pc_io; /* descriptions of IO adaptors */ | |
9a0de372 | 124 | struct cpuops *pc_ops; /* per-cpu operations */ |
0fe372b3 MK |
125 | }; |
126 | ||
03d3d455 MK |
127 | /* |
128 | * Generic description of an I/O "adaptor" | |
129 | * (any top-level I/O bus visible to software | |
130 | * and requiring autoconfiguration). | |
131 | * The remainder of the description | |
132 | * is pointed to by io_details. | |
133 | */ | |
0fe372b3 | 134 | struct iobus { |
121c4a08 | 135 | int io_type; /* io adaptor types */ |
0fe372b3 MK |
136 | caddr_t io_addr; /* phys address of IO adaptor */ |
137 | int io_size; /* size of an IO space */ | |
0fe372b3 | 138 | caddr_t io_details; /* specific to adaptor types */ |
6692a5c8 JB |
139 | }; |
140 | ||
0fe372b3 MK |
141 | /* |
142 | * Description of a main bus that maps "nexi", ala the 780 SBI. | |
143 | */ | |
144 | struct nexusconnect { | |
6692a5c8 JB |
145 | short psb_nnexus; /* number of nexus slots */ |
146 | struct nexus *psb_nexbase; /* base of nexus space */ | |
03d3d455 | 147 | short psb_ubatype; /* type of "unibus adaptor" */ |
6692a5c8 | 148 | short psb_nubabdp; /* number of bdp's per uba */ |
9a0de372 | 149 | caddr_t *psb_umaddr; /* unibus memory addresses */ |
f201ad4d BJ |
150 | /* the 750 has some slots which don't promise to tell you their types */ |
151 | /* if this pointer is non-zero, then you get the type from this array */ | |
152 | /* rather than from the (much more sensible) low byte of the config register */ | |
6692a5c8 | 153 | short *psb_nextype; /* botch */ |
f5a2f2dd BJ |
154 | }; |
155 | ||
9a0de372 MK |
156 | /* |
157 | * Description of a BI bus configuration. | |
158 | */ | |
159 | struct bibus { | |
160 | struct bi_node *pbi_base; /* base of node space */ | |
161 | /* that cannot possibly be all! */ | |
162 | }; | |
163 | ||
03d3d455 MK |
164 | /* |
165 | * Description of a Q-bus configuration. | |
166 | */ | |
167 | struct qbus { | |
168 | int qb_type; /* type of "unibus adaptor" */ | |
169 | int qb_memsize; /* size of (used) memory, pages */ | |
170 | struct pte *qb_map; /* base of map registers */ | |
171 | caddr_t qb_maddr; /* "unibus" memory address */ | |
172 | caddr_t qb_iopage; /* "unibus" IO page address */ | |
173 | }; | |
174 | ||
f5a2f2dd BJ |
175 | #ifdef KERNEL |
176 | int cpu; | |
9a0de372 MK |
177 | #if VAX8800 || VAX8200 |
178 | int mastercpu; /* if multiple cpus, this identifies master */ | |
179 | #endif | |
f201ad4d | 180 | struct percpu percpu[]; |
9a0de372 | 181 | struct cpuops *cpuops; |
f5a2f2dd | 182 | #endif |
e75c4d14 SL |
183 | |
184 | /* | |
185 | * Enable realtime clock (always enabled). | |
186 | */ | |
187 | #define enablertclock() | |
9a0de372 | 188 | #endif /* LOCORE */ |