Add support for microvax 3000.
[unix-history] / usr / src / sys / vax / vax / cpudata.c
CommitLineData
da7c5cc6 1/*
3907f97a 2 * Copyright (c) 1982, 1986, 1988 Regents of the University of California.
da7c5cc6
KM
3 * All rights reserved. The Berkeley software License Agreement
4 * specifies the terms and conditions for redistribution.
5 *
802ae52e 6 * @(#)cpudata.c 7.5 (Berkeley) %G%
da7c5cc6 7 */
961945a8 8
1884f3f6 9#include "pte.h"
6ce32250 10
1884f3f6 11#include "param.h"
cd3da95f 12
1884f3f6
JB
13#include "cpu.h"
14#include "nexus.h"
6692a5c8 15#include "ioa.h"
9a0de372 16#include "../vaxbi/bireg.h"
cd3da95f 17#include "../vaxuba/ubareg.h"
6ce32250
BJ
18
19/*
20 * Initialization of per-cpu data structures.
21 */
22
23/*
03d3d455
MK
24 * These are the (fixed) physical addresses of the
25 * unibus memory for each of the possible unibus adapters.
26 * Note that on some machines the unibus memory addresses
27 * are actually indexed by the unibus adapter type code.
6ce32250 28 */
6692a5c8
JB
29#if VAX8600
30caddr_t umaddr8600a[4] = {
31 (caddr_t) UMEMA8600(0), (caddr_t) UMEMA8600(1),
32 (caddr_t) UMEMA8600(2), (caddr_t) UMEMA8600(3),
33};
34caddr_t umaddr8600b[4] = {
35 (caddr_t) UMEMB8600(0), (caddr_t) UMEMB8600(1),
36 (caddr_t) UMEMB8600(2), (caddr_t) UMEMB8600(3),
37};
38#endif
6ce32250
BJ
39#if VAX780
40caddr_t umaddr780[4] = {
41 (caddr_t) UMEM780(0), (caddr_t) UMEM780(1),
42 (caddr_t) UMEM780(2), (caddr_t) UMEM780(3)
43};
44#endif
45#if VAX750
46caddr_t umaddr750[2] = {
47 (caddr_t) UMEM750(0), (caddr_t) UMEM750(1),
48};
49#endif
10f66600
SL
50#if VAX730
51caddr_t umaddr730[1] = {
52 (caddr_t) UMEM730
015a4a48
BJ
53};
54#endif
6ce32250 55
6ce32250
BJ
56/*
57 * Information to patch around the stupidity of configuration
015a4a48 58 * registers not returning types on some of the processors.
6ce32250 59 */
51056b43 60#if VAX750
6ce32250
BJ
61short nexty750[NNEX750] = {
62 NEX_MEM16, NEX_MEM16, NEX_MEM16, NEX_MEM16,
63 NEX_MBA, NEX_MBA, NEX_MBA, NEX_MBA,
64 NEX_UBA0, NEX_UBA1, NEX_ANY, NEX_ANY,
65 NEX_ANY, NEX_ANY, NEX_ANY, NEX_ANY
66};
8cededa1 67#endif
10f66600
SL
68#if VAX730
69short nexty730[NNEX730] = {
015a4a48
BJ
70 NEX_MEM16, NEX_ANY, NEX_ANY, NEX_ANY,
71 NEX_ANY, NEX_ANY, NEX_ANY, NEX_ANY,
72};
6ce32250
BJ
73#endif
74
9a0de372
MK
75#if VAX8800
76/* I think this is how the thing is shaped: */
77struct bibus bi8800[] = {
78 { BI_BASE(0) },
79 { BI_BASE(1) },
80};
81struct iobus io8800 = {
82 { IO_BIA, somewhere, somesize, (caddr_t)&bi8800[0] },
83 { IO_BIA, somewhere, somesize, (caddr_t)&bi8800[1] },
84};
85/* but you will have to make it work yourself (sorry) */
86#endif
87
6692a5c8 88#if VAX8600
0fe372b3 89struct nexusconnect sbi8600[] = {
03d3d455
MK
90 { NNEX8600, NEXA8600, DW780, NBDP8600, umaddr8600a, 0 },
91 { NNEX8600, NEXB8600, DW780, NBDP8600, umaddr8600b, 0 },
6692a5c8 92};
0fe372b3 93struct iobus io8600[] = {
121c4a08
MK
94 { IO_ABUS, IOA8600(0), IOAMAPSIZ, (caddr_t)&sbi8600[0] },
95 { IO_ABUS, IOA8600(1), IOAMAPSIZ, (caddr_t)&sbi8600[1] },
0fe372b3 96};
6692a5c8
JB
97#endif
98
9a0de372
MK
99#if VAX8200
100/* BEWARE, this is all limited to one BI for now */
101struct bibus bi8200[] = {
102 { BI_BASE(0) },
103};
104struct iobus io8200[] = {
105 { IO_BI, 0, 0, (caddr_t)&bi8200[0] },
106};
107#endif
108
6692a5c8 109#if VAX780
0fe372b3 110struct nexusconnect sbi780 = {
03d3d455 111 NNEX780, NEX780, DW780, NBDP780, umaddr780, 0,
6692a5c8 112};
121c4a08 113struct iobus io780[] = { IO_SBI780, 0, 0, (caddr_t)&sbi780 };
6692a5c8
JB
114#endif
115
116#if VAX750
0fe372b3 117struct nexusconnect cmi750 = {
03d3d455 118 NNEX750, NEX750, DW750, NBDP750, umaddr750, nexty750,
6692a5c8 119};
121c4a08 120struct iobus io750[] = { IO_CMI750, 0, 0, (caddr_t)&cmi750 };
6692a5c8
JB
121#endif
122
123#if VAX730
0fe372b3 124struct nexusconnect xxx730 = {
03d3d455 125 NNEX730, NEX730, DW730, NBDP730, umaddr730, nexty730,
6692a5c8 126};
121c4a08 127struct iobus io730[] = { IO_XXX730, 0, 0, (caddr_t)&xxx730 };
6692a5c8 128#endif
802ae52e 129#if VAX630 || VAX650
03d3d455
MK
130struct qbus qbus630 = {
131 QBA, QBAPAGES, QBAMAP630, (caddr_t)QMEM630, (caddr_t)QIOPAGE630
90dc7048 132};
03d3d455 133struct iobus io630[] = { IO_QBUS, 0, 0, (caddr_t)&qbus630 };
90dc7048 134#endif
6692a5c8 135
9a0de372
MK
136/*
137 * Clock info
138 */
139#if VAX8600 || VAX780 || VAX750 || VAX730
140int vaxstd_clkstartrt(), vaxstd_clkread(), vaxstd_clkwrite();
141struct clockops vaxstd_clockops = {
142 vaxstd_clkstartrt, vaxstd_clkread, vaxstd_clkwrite
143};
144#endif
145
146#if VAX8200
147int vaxstd_clkstartrt(), ka820_clkread(), ka820_clkwrite();
148struct clockops ka820_clockops = {
149 vaxstd_clkstartrt, ka820_clkread, ka820_clkwrite
150};
151#endif
152
153#if VAX630
154int ka630_clkstartrt(), ka630_clkread(), ka630_clkwrite();
155struct clockops ka630_clockops = {
156 ka630_clkstartrt, ka630_clkread, ka630_clkwrite
157};
158#endif
159
802ae52e
TF
160#if VAX650
161int ka650_clkstartrt(), vaxstd_clkread(), vaxstd_clkwrite();
162struct clockops ka650_clockops = {
163 ka650_clkstartrt, vaxstd_clkread, vaxstd_clkwrite
164};
165#endif
166
9a0de372
MK
167/*
168 * CPU dependent routines.
169 */
170#if VAX8600
171int ka860_memenable(), ka860_memerr(), ka860_mchk();
172struct cpuops ka860_ops = {
173 &vaxstd_clockops, ka860_memenable, ka860_memerr, ka860_mchk, NULL
174};
175#endif
176
177#if VAX8200
178int ka820_memenable(), ka820_memerr(), ka820_mchk(), ka820_init();
179struct cpuops ka820_ops = {
180 &ka820_clockops, ka820_memenable, ka820_memerr, ka820_mchk, ka820_init
181};
182#endif
183
184#if VAX780
185int ka780_memenable(), ka780_memerr(), ka780_mchk();
186struct cpuops ka780_ops = {
187 &vaxstd_clockops, ka780_memenable, ka780_memerr, ka780_mchk, NULL
188};
189#endif
190
191#if VAX750
192int ka750_memenable(), ka750_memerr(), ka750_mchk();
193struct cpuops ka750_ops = {
194 &vaxstd_clockops, ka750_memenable, ka750_memerr, ka750_mchk, NULL
195};
196#endif
197
198#if VAX730
199int ka730_memenable(), ka730_memerr(), ka730_mchk();
200struct cpuops ka730_ops = {
201 &vaxstd_clockops, ka730_memenable, ka730_memerr, ka730_mchk, NULL
202};
203#endif
204
205#if VAX630
206int ka630_memnop(), ka630_mchk(), ka630_init();
207struct cpuops ka630_ops = {
208 &ka630_clockops, ka630_memnop, ka630_memnop, ka630_mchk, ka630_init
209};
210#endif
0fe372b3 211
802ae52e
TF
212#if VAX650
213int ka650_memnop(), ka650_memerr(), ka650_mchk(), ka650_init();
214struct cpuops ka650_ops = {
215 &ka650_clockops, ka650_memnop, ka650_memerr, ka650_mchk, ka650_init
216};
217#endif
218
6ce32250 219struct percpu percpu[] = {
6692a5c8 220#if VAX8600
9a0de372
MK
221 { VAX_8600, 6, 2, io8600, &ka860_ops },
222#endif
223#if VAX8200
224 { VAX_8200, 2, 1, io8200, &ka820_ops },
6692a5c8 225#endif
6ce32250 226#if VAX780
9a0de372 227 { VAX_780, 2, 1, io780, &ka780_ops },
6ce32250
BJ
228#endif
229#if VAX750
9a0de372 230 { VAX_750, 1, 1, io750, &ka750_ops },
015a4a48 231#endif
10f66600 232#if VAX730
9a0de372 233 { VAX_730, 1, 1, io730, &ka730_ops },
90dc7048
BK
234#endif
235#if VAX630
9a0de372 236 { VAX_630, 2, 1, io630, &ka630_ops },
802ae52e
TF
237#endif
238#if VAX650
239 { VAX_650, 4, 1, io630, &ka650_ops },
6ce32250
BJ
240#endif
241 0,
242};