[unix-history] / usr / src / sys / vax / stand / autoconf.c

/*
 * Copyright (c) 1982, 1986, 1988 Regents of the University of California.
 * All rights reserved.  The Berkeley software License Agreement
 * specifies the terms and conditions for redistribution.
 *
 *	@(#)autoconf.c	7.12 (Berkeley) %G%
 */

#include "param.h"
#include "reboot.h"

#include "../vax/cpu.h"
#include "../vax/nexus.h"
#include "../vax/pte.h"
#include "../vax/mtpr.h"
#include "../vaxuba/ubareg.h"
#include "../vaxmba/mbareg.h"

#include "savax.h"

#ifdef VAX8200
#include "../vaxbi/bireg.h"
#endif

#if VAX8600 || VAX8200 || VAX780
/*
 * These are used on CPU's that do configuration.
 */
struct	uba_regs *ubaddrspace[MAXNUBA];
caddr_t	uioaddrspace[MAXNUBA];
struct	mba_regs *mbaddrspace[MAXNMBA];
#endif

#if VAX750
#define	UTR(i)	((struct uba_regs *)(NEX750+(i)))
#define	UMA(i)	((caddr_t)UMEM750(i)+UBAIOADDR)
#define	MTR(i)	((struct mba_regs *)(NEX750+(i)))

struct	uba_regs *ubaddr750[] = { UTR(8), UTR(9) };
caddr_t	uioaddr750[] = { UMA(0), UMA(1) };
struct	mba_regs *mbaddr750[] = { MTR(4), MTR(5), MTR(6), MTR(7) };

#undef	UTR
#undef	UMA
#undef	MTR
#endif

#if VAX730
#define	UTR(i)	((struct uba_regs *)(NEX730+(i)))
#define	UMA	((caddr_t)UMEM730+UBAIOADDR)

struct	uba_regs *ubaddr730[] = { UTR(3) };
caddr_t	uioaddr730[] = { UMA };

#undef	UTR
#undef	UMA
#endif

#if VAX630 || VAX650
/*
 * The map registers start at 20088000 on the ka630, so
 * subtract a 2k offset to make things work.
 *
 * This could stand serious cleanup.
 */
struct	uba_regs *ubaddr630[] =
	{ (struct uba_regs *)((caddr_t)QBAMAP630 - 0x800) };
caddr_t	uioaddr630[] = { (caddr_t)QIOPAGE630 };

int (*v_getc)(), (*v_putc)();

#ifndef SMALL
/*
 * Virtual console configuration tables.
 */
extern qv_init(),qd_init();

int (*vcons_init[])() = {
	qd_init,
	qv_init,
	0
};
#endif
#endif

#ifndef SMALL
extern int boothowto;
int debug = 0;
#endif
int cpuspeed = 1;

configure()
{
	union cpusid cpusid;
	register int i;

#ifndef SMALL
	if (boothowto & RB_KDB)		/* XXX */
		debug = 1;
#endif
	cpusid.cpusid = mfpr(SID);
	cpu = cpusid.cpuany.cp_type;
	switch (cpu) {

#if VAX8600
	case VAX_8600:
#ifndef SMALL
		if (debug)
			printf("cpu: 8600\nsbia 0:\n");
#endif
		cpuspeed = 6;
		probenexi(NEXA8600, (caddr_t)UMEMA8600(0)+UBAIOADDR, 0);
		probenexi(NEXB8600, (caddr_t)UMEMB8600(0)+UBAIOADDR, 1);
		break;
#endif

#if VAX780
	case VAX_780:
#ifndef SMALL
		if (debug)
			printf("cpu: 780\n");
#endif
		cpuspeed = 2;
		probenexi(NEX780, (caddr_t)UMEM780(0)+UBAIOADDR, 0);
		break;
#endif

#if VAX8200
	case VAX_8200: {
		register struct bi_node *bi;

		cpuspeed = 2;
		for (i = 0, bi = BI_BASE(0); i < NNODEBI; i++, bi++) {
			if (badaddr((caddr_t)bi, sizeof (long)))
				continue;
#ifdef notdef
			/* clear bus errors */
			bi->biic.bi_ber = ~(BIBER_MBZ|BIBER_NMR|BIBER_UPEN);
#endif
#ifndef SMALL
			if (debug)
				printf("node%d: ", i);
#endif
			switch (bi->biic.bi_dtype) {

			case BIDT_DWBUA:
				if (nuba >= MAXNUBA)	/* sorry */
					break;
#ifndef SMALL
				if (debug)
					printf("uba%d\n", nuba);
#endif
				ubaddrspace[nuba] = (struct uba_regs *)bi;
				uioaddrspace[nuba] = (caddr_t)UMEM8200(i) +
				    UBAIOADDR;
				((struct dwbua_regs *)bi)->bua_csr |=
				    BUACSR_UPI;
				nuba++;
				break;

			case BIDT_KDB50:
				if (nkdb < MAXNKDB) {
					kdbaddr[nkdb++] = (caddr_t)bi;
#ifndef SMALL
					if (debug)
						printf("kdb%d\n", nkdb);
#endif
				}
				break;
#ifndef SMALL
			default:
				if (debug)
					printf("unknown type %x\n",
					    bi->biic.bi_dtype);
				break;
#endif
			}
		}
		ubaddr = ubaddrspace;
		uioaddr = uioaddrspace;
	}
		break;
#endif

#if VAX750
	case VAX_750:
#ifndef SMALL
		if (debug)
			printf("cpu: 750 -- assuming standard config\n");
#endif
		mbaddr = mbaddr750;
		ubaddr = ubaddr750;
		uioaddr = uioaddr750;
		nmba = sizeof (mbaddr750) / sizeof (mbaddr750[0]);
		nuba = 2;
		break;
#endif

#if VAX730
	case VAX_730:
#ifndef SMALL
		if (debug)
			printf("cpu: 730 -- assuming standard config\n");
#endif
		ubaddr = ubaddr730;
		uioaddr = uioaddr730;
		nuba = 1;
		break;
#endif

#if VAX630
	case VAX_630:
#ifndef SMALL
		if (debug)
			printf("cpu: uVAX II\n");
#endif
		ubaddr = ubaddr630;
		uioaddr = uioaddr630;
		nuba = 1;
		break;
#endif

#if VAX650
	case VAX_650:
#ifndef SMALL
		if (debug)
			printf("cpu: uVAX 3000\n");
#endif
		ubaddr = ubaddr630;
		uioaddr = uioaddr630;
		nuba = 1;
		break;
#endif
	}

	/*
	 * Forward into the past...
	 */
/*
	for (i = 0; i < nmba; i++)
		if (!badaddr(mbaddr[i], sizeof(long)))
			mbaddr[i]->mba_cr = MBCR_INIT;
*/

	switch (cpu) {

#if VAX750 || VAX730
	case VAX_750:
	case VAX_730:
		mtpr(IUR, 0);
		break;
#endif

#if VAX630 || VAX650
	case VAX_630:
	case VAX_650:
		mtpr(IUR, 0);
		*((char *)QIOPAGE630 + QIPCR) = Q_LMEAE;
#if !defined(SMALL)
		/*
		 * configure the console
		 */
		for(i = 0; vcons_init[i] && !(*vcons_init[i])(); i++)
			;
#endif
		break;
#endif
	}

	/* give unibus devices a chance to recover... */
	if (nuba > 0)
		DELAY(500000);
}

#if VAX8600 || VAX780
probenexi(nxp, umembase, sbia)
	register struct nexus *nxp;
	caddr_t umembase;
	int sbia;
{
	register int i;
	union nexcsr nexcsr;
	int first = 1;

	for (i = 0; i < 16; i++, nxp++) {
		if (badaddr(nxp, sizeof(long)))
			continue;
		nexcsr = nxp->nexcsr;
		if (nexcsr.nex_csr & NEX_APD)
			continue;
#ifndef SMALL
		if (debug) {
			if (first && sbia != 0)
				printf("sbia %d:\n", sbia);
			printf("tr%d: ", i);
			first = 0;
		}
#endif
		switch (nexcsr.nex_type) {
		default:
#ifndef SMALL
			if (debug)
				printf("nexid %2x\n", nexcsr.nex_type);
#endif
			break;

		case NEX_MEM4:
		case NEX_MEM4I:
		case NEX_MEM16:
		case NEX_MEM16I:
		case NEX_MEM64L:
		case NEX_MEM64LI:
		case NEX_MEM64U:
		case NEX_MEM64UI:
		case NEX_MEM64I:
#ifndef SMALL
			if (debug)
				printf("mem\n");
#endif
			break;

		case NEX_CI:
#ifndef SMALL
			if (debug)
				printf("ci\n");
#endif
			break;

		case NEX_DR32:
#ifndef SMALL
			if (debug)
				printf("dr32\n");
#endif
			break;

		case NEX_MPM0:
		case NEX_MPM1:
		case NEX_MPM2:
		case NEX_MPM3:
#ifndef SMALL
			if (debug)
				printf("mpm\n");
#endif
			break;

		case NEX_MBA:
			if (nmba >= MAXNMBA) {
#ifndef SMALL
				if (debug)
					printf("unsupported mba\n");
#endif
				break;
			}
#ifndef SMALL
			if (debug)
				printf("mba%d\n", nmba);
#endif
			mbaddrspace[nmba] = (struct mba_regs *)nxp;
			nmba++;
			break;

		case NEX_UBA0:
		case NEX_UBA1:
		case NEX_UBA2:
		case NEX_UBA3:
			if (nuba >= MAXNUBA) {
#ifndef SMALL
				if (debug)
					printf("unsupported uba\n");
#endif
				break;
			}
#ifndef SMALL
			if (debug)
				printf("uba%d umem%d", nuba,
				    nexcsr.nex_type&3);
#endif
			ubaddrspace[nuba] = (struct uba_regs *)nxp;
			uioaddrspace[nuba] = umembase +
			    (nexcsr.nex_csr & 3) * (512*NBPG);
#ifndef SMALL
			if (debug)
				printf(" (%x)\n", uioaddrspace[nuba]);
#endif
			nuba++;
			((struct uba_regs *)nxp)->uba_cr = UBACR_ADINIT;
			break;
		}
	}
	mbaddr = mbaddrspace;
	ubaddr = ubaddrspace;
	uioaddr = uioaddrspace;
#undef	UTR
#undef	UMA
#undef	MTR
}
#endif /* VAX780 || VAX8600 */
Commit	Line	Data
8ae0e4b4	1	/*
98c02aef	2	* Copyright (c) 1982, 1986, 1988 Regents of the University of California.
8ae0e4b4 KM	3	* All rights reserved. The Berkeley software License Agreement
	4	* specifies the terms and conditions for redistribution.
	5	*
f6322301	6	* @(#)autoconf.c 7.12 (Berkeley) %G%
8ae0e4b4	7	*/
faeec66d	8
39c71180	9	#include "param.h"
98c02aef	10	#include "reboot.h"
a031a31b SL	11
	12	#include "../vax/cpu.h"
	13	#include "../vax/nexus.h"
98c02aef MK	14	#include "../vax/pte.h"
98c02aef MK	15	#include "../vax/mtpr.h"
a031a31b SL	16	#include "../vaxuba/ubareg.h"
a031a31b SL	17	#include "../vaxmba/mbareg.h"
a031a31b	18
0d36453d BJ	19	#include "savax.h"
0d36453d BJ	20
39c71180	21	#ifdef VAX8200
a7d5afc4	22	#include "../vaxbi/bireg.h"
80c81fbf	23	#endif
0d36453d	24
98c02aef MK	25	#if VAX8600 \|\| VAX8200 \|\| VAX780
	26	/*
	27	* These are used on CPU's that do configuration.
	28	*/
	29	struct uba_regs *ubaddrspace[MAXNUBA];
	30	caddr_t uioaddrspace[MAXNUBA];
	31	struct mba_regs *mbaddrspace[MAXNMBA];
39c71180	32	#endif
0d36453d	33
39c71180	34	#if VAX750
0d36453d	35	#define UTR(i) ((struct uba_regs *)(NEX750+(i)))
39c71180	36	#define UMA(i) ((caddr_t)UMEM750(i)+UBAIOADDR)
0d36453d BJ	37	#define MTR(i) ((struct mba_regs *)(NEX750+(i)))
	38
	39	struct uba_regs *ubaddr750[] = { UTR(8), UTR(9) };
39c71180	40	caddr_t uioaddr750[] = { UMA(0), UMA(1) };
099dcdda	41	struct mba_regs *mbaddr750[] = { MTR(4), MTR(5), MTR(6), MTR(7) };
0d36453d BJ	42
	43	#undef UTR
	44	#undef UMA
	45	#undef MTR
39c71180	46	#endif
0d36453d	47
39c71180	48	#if VAX730
b5d17f4d	49	#define UTR(i) ((struct uba_regs *)(NEX730+(i)))
39c71180	50	#define UMA ((caddr_t)UMEM730+UBAIOADDR)
099dcdda	51
b5d17f4d	52	struct uba_regs *ubaddr730[] = { UTR(3) };
39c71180	53	caddr_t uioaddr730[] = { UMA };
099dcdda BJ	54
	55	#undef UTR
	56	#undef UMA
39c71180 MK	57	#endif
39c71180 MK	58
f6322301	59	#if VAX630 \|\| VAX650
39c71180 MK	60	/*
	61	* The map registers start at 20088000 on the ka630, so
	62	* subtract a 2k offset to make things work.
	63	*
	64	* This could stand serious cleanup.
	65	*/
	66	struct uba_regs *ubaddr630[] =
	67	{ (struct uba_regs *)((caddr_t)QBAMAP630 - 0x800) };
	68	caddr_t uioaddr630[] = { (caddr_t)QIOPAGE630 };
89bf7628	69
98c02aef	70	int (v_getc)(), (v_putc)();
89bf7628 MK	71
89bf7628 MK	72	#ifndef SMALL
253bb020 MT	73	/*
	74	* Virtual console configuration tables.
	75	*/
	76	extern qv_init(),qd_init();
	77
	78	int (*vcons_init[])() = {
	79	qd_init,
	80	qv_init,
	81	0
	82	};
89bf7628	83	#endif
39c71180	84	#endif
099dcdda	85
98c02aef MK	86	#ifndef SMALL
	87	extern int boothowto;
	88	int debug = 0;
	89	#endif
d9118389 MK	90	int cpuspeed = 1;
d9118389 MK	91
0d36453d BJ	92	configure()
	93	{
	94	union cpusid cpusid;
98c02aef	95	register int i;
0d36453d	96
98c02aef MK	97	#ifndef SMALL
	98	if (boothowto & RB_KDB) /* XXX */
	99	debug = 1;
	100	#endif
0d36453d BJ	101	cpusid.cpusid = mfpr(SID);
	102	cpu = cpusid.cpuany.cp_type;
	103	switch (cpu) {
	104
39c71180	105	#if VAX8600
d7046ad3	106	case VAX_8600:
98c02aef MK	107	#ifndef SMALL
	108	if (debug)
	109	printf("cpu: 8600\nsbia 0:\n");
	110	#endif
d9118389	111	cpuspeed = 6;
98c02aef MK	112	probenexi(NEXA8600, (caddr_t)UMEMA8600(0)+UBAIOADDR, 0);
98c02aef MK	113	probenexi(NEXB8600, (caddr_t)UMEMB8600(0)+UBAIOADDR, 1);
39c71180 MK	114	break;
	115	#endif
	116
	117	#if VAX780
0d36453d	118	case VAX_780:
98c02aef MK	119	#ifndef SMALL
	120	if (debug)
	121	printf("cpu: 780\n");
	122	#endif
d9118389	123	cpuspeed = 2;
98c02aef	124	probenexi(NEX780, (caddr_t)UMEM780(0)+UBAIOADDR, 0);
39c71180 MK	125	break;
	126	#endif
	127
	128	#if VAX8200
	129	case VAX_8200: {
	130	register struct bi_node *bi;
	131
98c02aef	132	cpuspeed = 2;
39c71180 MK	133	for (i = 0, bi = BI_BASE(0); i < NNODEBI; i++, bi++) {
	134	if (badaddr((caddr_t)bi, sizeof (long)))
	135	continue;
	136	#ifdef notdef
	137	/* clear bus errors */
	138	bi->biic.bi_ber = ~(BIBER_MBZ\|BIBER_NMR\|BIBER_UPEN);
98c02aef MK	139	#endif
	140	#ifndef SMALL
	141	if (debug)
	142	printf("node%d: ", i);
39c71180 MK	143	#endif
	144	switch (bi->biic.bi_dtype) {
	145
	146	case BIDT_DWBUA:
	147	if (nuba >= MAXNUBA) /* sorry */
	148	break;
98c02aef MK	149	#ifndef SMALL
	150	if (debug)
	151	printf("uba%d\n", nuba);
	152	#endif
	153	ubaddrspace[nuba] = (struct uba_regs *)bi;
	154	uioaddrspace[nuba] = (caddr_t)UMEM8200(i) +
1180a45b	155	UBAIOADDR;
39c71180 MK	156	((struct dwbua_regs *)bi)->bua_csr \|=
	157	BUACSR_UPI;
	158	nuba++;
	159	break;
	160
	161	case BIDT_KDB50:
98c02aef	162	if (nkdb < MAXNKDB) {
39c71180	163	kdbaddr[nkdb++] = (caddr_t)bi;
98c02aef MK	164	#ifndef SMALL
	165	if (debug)
	166	printf("kdb%d\n", nkdb);
	167	#endif
	168	}
39c71180	169	break;
98c02aef MK	170	#ifndef SMALL
	171	default:
	172	if (debug)
	173	printf("unknown type %x\n",
	174	bi->biic.bi_dtype);
	175	break;
	176	#endif
39c71180	177	}
80c81fbf	178	}
98c02aef MK	179	ubaddr = ubaddrspace;
98c02aef MK	180	uioaddr = uioaddrspace;
39c71180	181	}
0d36453d	182	break;
39c71180	183	#endif
0d36453d	184
39c71180	185	#if VAX750
0d36453d	186	case VAX_750:
98c02aef MK	187	#ifndef SMALL
	188	if (debug)
	189	printf("cpu: 750 -- assuming standard config\n");
	190	#endif
0d36453d BJ	191	mbaddr = mbaddr750;
0d36453d BJ	192	ubaddr = ubaddr750;
39c71180	193	uioaddr = uioaddr750;
388f3cbe	194	nmba = sizeof (mbaddr750) / sizeof (mbaddr750[0]);
98c02aef	195	nuba = 2;
0d36453d	196	break;
39c71180	197	#endif
099dcdda	198
39c71180	199	#if VAX730
b5d17f4d	200	case VAX_730:
98c02aef MK	201	#ifndef SMALL
	202	if (debug)
	203	printf("cpu: 730 -- assuming standard config\n");
	204	#endif
b5d17f4d	205	ubaddr = ubaddr730;
39c71180	206	uioaddr = uioaddr730;
98c02aef	207	nuba = 1;
099dcdda	208	break;
39c71180 MK	209	#endif
	210
	211	#if VAX630
	212	case VAX_630:
98c02aef MK	213	#ifndef SMALL
	214	if (debug)
	215	printf("cpu: uVAX II\n");
	216	#endif
39c71180 MK	217	ubaddr = ubaddr630;
39c71180 MK	218	uioaddr = uioaddr630;
98c02aef	219	nuba = 1;
39c71180 MK	220	break;
39c71180 MK	221	#endif
f6322301 TF	222
	223	#if VAX650
	224	case VAX_650:
	225	#ifndef SMALL
	226	if (debug)
	227	printf("cpu: uVAX 3000\n");
	228	#endif
	229	ubaddr = ubaddr630;
	230	uioaddr = uioaddr630;
	231	nuba = 1;
	232	break;
	233	#endif
0d36453d	234	}
39c71180	235
388f3cbe BJ	236	/*
	237	* Forward into the past...
	238	*/
b5d17f4d	239	/*
388f3cbe	240	for (i = 0; i < nmba; i++)
80c81fbf	241	if (!badaddr(mbaddr[i], sizeof(long)))
388f3cbe	242	mbaddr[i]->mba_cr = MBCR_INIT;
b5d17f4d	243	*/
39c71180	244
98c02aef	245	switch (cpu) {
39c71180 MK	246
	247	#if VAX750 \|\| VAX730
	248	case VAX_750:
	249	case VAX_730:
	250	mtpr(IUR, 0);
	251	break;
	252	#endif
	253
f6322301	254	#if VAX630 \|\| VAX650
39c71180	255	case VAX_630:
f6322301	256	case VAX_650:
b5d17f4d	257	mtpr(IUR, 0);
39c71180	258	((char )QIOPAGE630 + QIPCR) = Q_LMEAE;
88242a07 MK	259	#if !defined(SMALL)
	260	/*
	261	* configure the console
	262	*/
	263	for(i = 0; vcons_init[i] && !(*vcons_init[i])(); i++)
	264	;
	265	#endif
39c71180	266	break;
f6322301	267	#endif
39c71180 MK	268	}
39c71180 MK	269
388f3cbe BJ	270	/* give unibus devices a chance to recover... */
388f3cbe BJ	271	if (nuba > 0)
20bad1f4	272	DELAY(500000);
0d36453d	273	}
98c02aef MK	274
	275	#if VAX8600 \|\| VAX780
	276	probenexi(nxp, umembase, sbia)
	277	register struct nexus *nxp;
	278	caddr_t umembase;
	279	int sbia;
	280	{
	281	register int i;
	282	union nexcsr nexcsr;
	283	int first = 1;
	284
	285	for (i = 0; i < 16; i++, nxp++) {
	286	if (badaddr(nxp, sizeof(long)))
	287	continue;
	288	nexcsr = nxp->nexcsr;
	289	if (nexcsr.nex_csr & NEX_APD)
	290	continue;
	291	#ifndef SMALL
	292	if (debug) {
	293	if (first && sbia != 0)
	294	printf("sbia %d:\n", sbia);
	295	printf("tr%d: ", i);
	296	first = 0;
	297	}
	298	#endif
	299	switch (nexcsr.nex_type) {
	300	default:
	301	#ifndef SMALL
	302	if (debug)
	303	printf("nexid %2x\n", nexcsr.nex_type);
	304	#endif
	305	break;
	306
	307	case NEX_MEM4:
	308	case NEX_MEM4I:
	309	case NEX_MEM16:
	310	case NEX_MEM16I:
	311	case NEX_MEM64L:
	312	case NEX_MEM64LI:
	313	case NEX_MEM64U:
	314	case NEX_MEM64UI:
	315	case NEX_MEM64I:
	316	#ifndef SMALL
	317	if (debug)
	318	printf("mem\n");
	319	#endif
	320	break;
	321
	322	case NEX_CI:
	323	#ifndef SMALL
	324	if (debug)
	325	printf("ci\n");
	326	#endif
	327	break;
	328
	329	case NEX_DR32:
	330	#ifndef SMALL
	331	if (debug)
	332	printf("dr32\n");
	333	#endif
	334	break;
	335
	336	case NEX_MPM0:
	337	case NEX_MPM1:
338	case NEX_MPM2:
339	case NEX_MPM3:
340	#ifndef SMALL
341	if (debug)
342	printf("mpm\n");
343	#endif
344	break;
345
346	case NEX_MBA:
347	if (nmba >= MAXNMBA) {
348	#ifndef SMALL
349	if (debug)
350	printf("unsupported mba\n");
351	#endif
352	break;
353	}
354	#ifndef SMALL
355	if (debug)
356	printf("mba%d\n", nmba);
357	#endif
358	mbaddrspace[nmba] = (struct mba_regs *)nxp;
359	nmba++;
360	break;
361
362	case NEX_UBA0:
363	case NEX_UBA1:
364	case NEX_UBA2:
365	case NEX_UBA3:
366	if (nuba >= MAXNUBA) {
367	#ifndef SMALL
368	if (debug)
369	printf("unsupported uba\n");
370	#endif
371	break;
372	}
373	#ifndef SMALL
374	if (debug)
375	printf("uba%d umem%d", nuba,
376	nexcsr.nex_type&3);
377	#endif
378	ubaddrspace[nuba] = (struct uba_regs *)nxp;
379	uioaddrspace[nuba] = umembase +
380	(nexcsr.nex_csr & 3) * (512*NBPG);
381	#ifndef SMALL
382	if (debug)
383	printf(" (%x)\n", uioaddrspace[nuba]);
384	#endif
385	nuba++;
386	((struct uba_regs *)nxp)->uba_cr = UBACR_ADINIT;
387	break;
388	}
389	}
390	mbaddr = mbaddrspace;
391	ubaddr = ubaddrspace;
392	uioaddr = uioaddrspace;
393	#undef UTR
394	#undef UMA
395	#undef MTR
396	}
397	#endif /* VAX780 \|\| VAX8600 */