BSD 4_3_Net_2 development
[unix-history] / .ref-BSD-4_3_Reno / usr / src / sys / hpdev / scsireg.h
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1/*
2 * Copyright (c) 1990 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to Berkeley by
6 * Van Jacobson of Lawrence Berkeley Laboratory.
7 *
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8 * Redistribution is only permitted until one year after the first shipment
9 * of 4.4BSD by the Regents. Otherwise, redistribution and use in source and
10 * binary forms are permitted provided that: (1) source distributions retain
11 * this entire copyright notice and comment, and (2) distributions including
12 * binaries display the following acknowledgement: This product includes
13 * software developed by the University of California, Berkeley and its
14 * contributors'' in the documentation or other materials provided with the
15 * distribution and in all advertising materials mentioning features or use
16 * of this software. Neither the name of the University nor the names of
17 * its contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
20 * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
21 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
60f56dfc 22 *
1c15e888 23 * @(#)scsireg.h 7.1 (Berkeley) 5/8/90
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24 */
25
26/*
27 * HP 98265A SCSI Interface Hardware Description.
28 */
29
30struct scsidevice {
31 u_char p0, scsi_id;
32#define ID_MASK 0x1f
33#define SCSI_ID 0x07
34#define ID_WORD_DMA 0x20
35 u_char p2, scsi_csr;
36#define CSR_IE 0x80
37#define CSR_IR 0x40
38#define SCSI_IPL(csr) ((((csr)>>4)&3)+3)
39#define CSR_DMA32 0x08
40#define CSR_DMAIN 0x04
41#define CSR_DE1 0x02
42#define CSR_DE0 0x01
43 u_char p4, scsi_wrap;
44#define WRAP_REQ 0x80
45#define WRAP_ACK 0x40
46#define WRAP_BSY 0x08
47#define WRAP_MSG 0x04
48#define WRAP_CD 0x02
49#define WRAP_IO 0x01
50 u_char p6, scsi_hconf;
51#define HCONF_TP 0x80
52#define SCSI_SYNC_XFER(hconf) (((hconf)>>5)&3)
53#define HCONF_SD 0x10
54#define HCONF_PARITY 0x08
55 u_char p8[24];
56 u_char p32, scsi_bdid;
57 u_char p34, scsi_sctl;
58#define SCTL_DISABLE 0x80
59#define SCTL_CTRLRST 0x40
60#define SCTL_DIAG 0x20
61#define SCTL_ABRT_ENAB 0x10
62#define SCTL_PARITY_ENAB 0x08
63#define SCTL_SEL_ENAB 0x04
64#define SCTL_RESEL_ENAB 0x02
65#define SCTL_INTR_ENAB 0x01
66 u_char p36, scsi_scmd;
67#define SCMD_RST 0x10
68#define SCMD_ICPT_XFR 0x08
69#define SCMD_PROG_XFR 0x04
70#define SCMD_PAD 0x01 /* if initiator */
71#define SCMD_PERR_STOP 0x01 /* if target */
72 /* command codes */
73#define SCMD_BUS_REL 0x00
74#define SCMD_SELECT 0x20
75#define SCMD_RST_ATN 0x40
76#define SCMD_SET_ATN 0x60
77#define SCMD_XFR 0x80
78#define SCMD_XFR_PAUSE 0xa0
79#define SCMD_RST_ACK 0xc0
80#define SCMD_SET_ACK 0xe0
81 u_char p38, scsi_tmod;
82#define TMOD_SYNC 0x80
83 u_char p40, scsi_ints;
84#define INTS_SEL 0x80
85#define INTS_RESEL 0x40
86#define INTS_DISCON 0x20
87#define INTS_CMD_DONE 0x10
88#define INTS_SRV_REQ 0x08
89#define INTS_TIMEOUT 0x04
90#define INTS_HARD_ERR 0x02
91#define INTS_RST 0x01
92 u_char p42, scsi_psns;
93#define PSNS_REQ 0x80
94#define PSNS_ACK 0x40
95#define PSNS_ATN 0x20
96#define PSNS_SEL 0x10
97#define PSNS_BSY 0x08
98 u_char p44, scsi_ssts;
99#define SSTS_INITIATOR 0x80
100#define SSTS_TARGET 0x40
101#define SSTS_BUSY 0x20
102#define SSTS_XFR 0x10
103#define SSTS_ACTIVE (SSTS_INITIATOR|SSTS_XFR)
104#define SSTS_RST 0x08
105#define SSTS_TCZERO 0x04
106#define SSTS_DREG_FULL 0x02
107#define SSTS_DREG_EMPTY 0x01
108 u_char p46, scsi_serr;
109#define SERR_SCSI_PAR 0x80
110#define SERR_SPC_PAR 0x40
111#define SERR_TC_PAR 0x08
112#define SERR_PHASE_ERR 0x04
113#define SERR_SHORT_XFR 0x02
114#define SERR_OFFSET 0x01
115 u_char p48, scsi_pctl;
116#define PCTL_BFINT_ENAB 0x80
117 u_char p50, scsi_mbc;
118 u_char p52, scsi_dreg;
119 u_char p54, scsi_temp;
120 u_char p56, scsi_tch;
121 u_char p58, scsi_tcm;
122 u_char p60, scsi_tcl;
123 u_char p62, scsi_exbf;
124};
125
126/* psns/pctl phase lines as bits */
127#define PHASE_MSG 0x04
128#define PHASE_CD 0x02 /* =1 if 'command' */
129#define PHASE_IO 0x01 /* =1 if data inbound */
130/* Phase lines as values */
131#define PHASE 0x07 /* mask for psns/pctl phase */
132#define DATA_OUT_PHASE 0x00
133#define DATA_IN_PHASE 0x01
134#define CMD_PHASE 0x02
135#define STATUS_PHASE 0x03
136#define BUS_FREE_PHASE 0x04
137#define ARB_SEL_PHASE 0x05 /* Fuji chip combines arbitration with sel. */
138#define MESG_OUT_PHASE 0x06
139#define MESG_IN_PHASE 0x07
140
141/* SCSI Messages */
142
143#define MSG_CMD_COMPLETE 0x00
144#define MSG_EXT_MESSAGE 0x01
145#define MSG_SAVE_DATA_PTR 0x02
146#define MSG_RESTORE_PTR 0x03
147#define MSG_DISCONNECT 0x04
148#define MSG_INIT_DETECT_ERROR 0x05
149#define MSG_ABORT 0x06
150#define MSG_REJECT 0x07
151#define MSG_NOOP 0x08
152#define MSG_PARITY_ERROR 0x09
153#define MSG_BUS_DEVICE_RESET 0x0C
154#define MSG_IDENTIFY 0x80
155#define MSG_IDENTIFY_DR 0xc0 /* (disconnect/reconnect allowed) */
156#define MSG_SYNC_REQ 0x01
157
158/* SCSI Commands */
159
160#define CMD_TEST_UNIT_READY 0x00
161#define CMD_REQUEST_SENSE 0x03
162#define CMD_INQUIRY 0x12
163#define CMD_SEND_DIAGNOSTIC 0x1D
164
165#define CMD_FORMAT_UNIT 0x04
166#define CMD_REASSIGN_BLOCKS 0x07
167#define CMD_READ 0x08
168#define CMD_WRITE 0x0A
169#define CMD_MODE_SELECT 0x15
170#define CMD_RELEASE_UNIT 0x17
171#define CMD_MODE_SENSE 0x1A
172#define CMD_SEND_DIAG 0x1D
173#define CMD_READ_CAPACITY 0x25
174#define CMD_READ_EXT 0x28
175#define CMD_WRITE_EXT 0x2A
176#define CMD_READ_DEFECT_DATA 0x37
177#define SD_MANUFAC_DEFECTS 0x14000000
178#define SD_GROWN_DEFECTS 0x0c000000
179#define CMD_READ_BUFFER 0x3B
180#define CMD_WRITE_BUFFER 0x3C
181#define CMD_READ_FULL 0xF0
182#define CMD_MEDIA_TEST 0xF1
183#define CMD_ACCESS_LOG 0xF2
184#define CMD_WRITE_FULL 0xFC
185#define CMD_MANAGE_PRIMARY 0xFD
186#define CMD_EXECUTE_DATA 0xFE
187
188/* SCSI status bits */
189
190#define STS_CHECKCOND 0x02 /* Check Condition (ie., read sense) */
191#define STS_CONDMET 0x04 /* Condition Met (ie., search worked) */
192#define STS_BUSY 0x08
193#define STS_INTERMED 0x10 /* Intermediate status sent */
194#define STS_EXT 0x80 /* Extended status valid */
195
196/* command descriptor blocks */
197
198struct scsi_cdb6 {
199 u_char cmd; /* command code */
200 u_char lun: 3, /* logical unit on ctlr */
201 lbah: 5; /* msb of read/write logical block addr */
202 u_char lbam; /* middle byte of l.b.a. */
203 u_char lbal; /* lsb of l.b.a. */
204 u_char len; /* transfer length */
205 u_char xtra;
206};
207
208struct scsi_cdb10 {
209 u_char cmd; /* command code */
210 u_char lun: 3, /* logical unit on ctlr */
211 : 4,
212 rel: 1; /* l.b.a. is relative addr if =1 */
213 u_char lbah; /* msb of read/write logical block addr */
214 u_char lbahm; /* high middle byte of l.b.a. */
215 u_char lbalm; /* low middle byte of l.b.a. */
216 u_char lbal; /* lsb of l.b.a. */
217 u_char reserved;
218 u_char lenh; /* msb transfer length */
219 u_char lenl; /* lsb transfer length */
220 u_char xtra;
221};
222
223/* basic sense data */
224
225struct scsi_sense {
226 u_char valid: 1, /* l.b.a. is valid */
227 class: 3,
228 code: 4;
229 u_char vu: 4, /* vendor unique */
230 lbah: 4;
231 u_char lbam;
232 u_char lbal;
233};
234
235struct scsi_xsense {
236 u_char valid: 1, /* l.b.a. is valid */
237 class: 3,
238 code: 4;
239 u_char segment;
240 u_char filemark: 1,
241 eom: 1,
242 ili: 1, /* illegal length indicator */
243 rsvd: 1,
244 key: 4;
245 u_char info1;
246 u_char info2;
247 u_char info3;
248 u_char info4;
249 u_char len; /* additional sense length */
250};
251
252/* inquiry data */
253struct scsi_inquiry {
254 u_char type;
255 u_char qual;
256 u_char version;
257 u_char rsvd;
258 u_char len;
259 char class[3];
260 char vendor_id[8];
261 char product_id[16];
262 char rev[4];
263};
264
265struct scsi_format_parms { /* physical BFI format */
266 u_short reserved;
267 u_short list_len;
268 struct defect {
269 unsigned cyl : 24;
270 unsigned head : 8;
271 long bytes_from_index;
272 } defect[127];
273} format_parms;
274
275struct scsi_reassign_parms {
276 u_short reserved;
277 u_short list_len; /* length in bytes of defects only */
278 struct new_defect {
279 unsigned lba; /* logical block address */
280 } new_defect[2];
281} reassign_parms;
282
283struct scsi_modesel_hdr {
284 u_char rsvd1;
285 u_char media_type;
286 u_char rsvd2;
287 u_char block_desc_len;
288 u_int density : 8;
289 u_int number_blocks :24;
290 u_int rsvd3 : 8;
291 u_int block_length :24;
292};
293
294struct scsi_modesense_hdr {
295 u_char len;
296 u_char media_type;
297 u_char wp : 1;
298 u_char rsvd1 : 7;
299 u_char block_desc_len;
300 u_int density : 8;
301 u_int number_blocks :24;
302 u_int rsvd2 : 8;
303 u_int block_length :24;
304};
305
306/*
307 * Mode Select / Mode sense "pages"
308 */
309
310/*
311 * Page One - Error Recovery Parameters
312 */
313struct scsi_err_recovery {
314 u_char page_savable : 1; /* save parameters */
315 u_char reserved : 1;
316 u_char page_code : 6; /* = 0x01 */
317 u_char page_length; /* = 6 */
318 u_char awre : 1; /* auto write realloc enabled */
319 u_char arre : 1; /* auto read realloc enabled */
320 u_char tb : 1; /* transfer block */
321 u_char rc : 1; /* read continuous */
322 u_char eec : 1; /* enable early correction */
323 u_char per : 1; /* post error */
324 u_char dte : 1; /* disable transfer on error */
325 u_char dcr : 1; /* disable correction */
326 u_char retry_count;
327 u_char correction_span;
328 u_char head_offset_count;
329 u_char strobe_offset_count;
330 u_char recovery_time_limit;
331};
332
333/*
334 * Page Two - Disconnect / Reconnect Control Parameters
335 */
336struct scsi_disco_reco {
337 u_char page_savable : 1; /* save parameters */
338 u_char rsvd : 1;
339 u_char page_code : 6; /* = 0x02 */
340 u_char page_length; /* = 10 */
341 u_char buffer_full_ratio; /* write, how full before reconnect? */
342 u_char buffer_empty_ratio; /* read, how full before reconnect? */
343
344 u_short bus_inactivity_limit; /* how much bus time for busy */
345 u_short disconnect_time_limit; /* min to remain disconnected */
346 u_short connect_time_limit; /* min to remain connected */
347 u_short reserved_1;
348};
349
350/*
351 * Page Three - Direct Access Device Format Parameters
352 */
353struct scsi_format {
354 u_char page_savable : 1; /* save parameters */
355 u_char rsvd : 1;
356 u_char page_code : 6; /* = 0x03 */
357 u_char page_length; /* = 22 */
358 u_short tracks_per_zone; /* Handling of Defects Fields */
359 u_short alt_sect_zone;
360 u_short alt_tracks_zone;
361 u_short alt_tracks_vol;
362 u_short sect_track; /* Track Format Field */
363 u_short data_sect; /* Sector Format Fields */
364 u_short interleave;
365 u_short track_skew_factor;
366 u_short cyl_skew_factor;
367 u_char ssec : 1; /* Drive Type Field */
368 u_char hsec : 1;
369 u_char rmb : 1;
370 u_char surf : 1;
371 u_char ins : 1;
372 u_char reserved_1 : 3;
373 u_char reserved_2;
374 u_char reserved_3;
375 u_char reserved_4;
376};
377
378/*
379 * Page Four - Rigid Disk Drive Geometry Parameters
380 */
381struct scsi_geometry {
382 u_char page_savable : 1; /* save parameters */
383 u_char rsvd : 1;
384 u_char page_code : 6; /* = 0x04 */
385 u_char page_length; /* = 18 */
386 u_char cyl_ub; /* number of cylinders */
387 u_char cyl_mb;
388 u_char cyl_lb;
389 u_char heads; /* number of heads */
390 u_char precomp_cyl_ub; /* cylinder to start precomp */
391 u_char precomp_cyl_mb;
392 u_char precomp_cyl_lb;
393 u_char current_cyl_ub; /* cyl to start reduced current */
394 u_char current_cyl_mb;
395 u_char current_cyl_lb;
396 u_short step_rate; /* drive step rate */
397 u_char landing_cyl_ub; /* landing zone cylinder */
398 u_char landing_cyl_mb;
399 u_char landing_cyl_lb;
400 u_char reserved_1;
401 u_char reserved_2;
402 u_char reserved_3;
403};
404
405/*
406 * Page 0x38 - Cache Control Parameters
407 */
408struct scsi_cache {
409 u_char page_savable : 1; /* save parameters */
410 u_char rsvd : 1;
411 u_char page_code : 6; /* = 0x38 */
412 u_char page_length; /* = 14 */
413 u_char rsvd_1 : 1;
414 u_char wie : 1; /* write index enable */
415 u_char rsvd_2 : 1;
416 u_char ce : 1; /* cache enable */
417 u_char table_size : 4;
418 u_char prefetch_threshold;
419 u_char maximum_threshold;
420 u_char maximumprefetch_multiplier;
421 u_char minimum_threshold;
422 u_char minimum_prefetch_multiplier;
423 u_char reserved[8];
424};
425
426/*
427 * Driver ioctl's for various scsi operations.
428 */
429#ifndef _IOCTL_
1c15e888 430#include "ioctl.h"
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431#endif
432
433/*
434 * Control for SCSI "format" mode.
435 *
436 * "Format" mode allows a privileged process to issue direct SCSI
437 * commands to a drive (it is intended primarily to allow on-line
438 * formatting). SDIOCSFORMAT with a non-zero arg will put the drive
439 * into format mode; a zero arg will take it out. When in format
440 * mode, only the process that issued the SDIOCFORMAT can read or
441 * write the drive.
442 *
443 * In format mode, process is expected to
444 * - do SDIOCSCSICOMMAND to supply cdb for next SCSI op
445 * - do read or write as appropriate for cdb
446 * - if i/o error, optionally do SDIOCSENSE to get completion
447 * status and sense data from last scsi operation.
448 */
449
450struct scsi_fmt_cdb {
451 int len; /* cdb length (in bytes) */
452 u_char cdb[28]; /* cdb to use on next read/write */
453};
454
455struct scsi_fmt_sense {
456 u_int status; /* completion status of last op */
457 u_char sense[28]; /* sense data (if any) from last op */
458};
459
460#define SDIOCSFORMAT _IOW('S', 0x1, int)
461#define SDIOCGFORMAT _IOR('S', 0x2, int)
462#define SDIOCSCSICOMMAND _IOW('S', 0x3, struct scsi_fmt_cdb)
463#define SDIOCSENSE _IOR('S', 0x4, struct scsi_fmt_sense)