Start development on 386BSD 0.0
[unix-history] / .ref-BSD-4_3_Net_2 / usr / src / sys / hp300 / dev / dmareg.h
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1/*
2 * Copyright (c) 1982, 1990 The Regents of the University of California.
3 * All rights reserved.
4 *
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5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by the University of
16 * California, Berkeley and its contributors.
17 * 4. Neither the name of the University nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
60f56dfc 20 *
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21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * @(#)dmareg.h 7.3 (Berkeley) 5/7/91
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34 */
35
36/*
37 * Hardware layout for the 98620[ABC]:
38 * 98620A (old 320s?): byte/word DMA in up to 64K chunks
39 * 98620B (320s only): 98620A with programmable IPL
40 * 98620C (all others): byte/word/longword DMA in up to 4Gb chunks
41 */
42#define v_char volatile char
43#define v_int volatile int
44#define vu_char volatile u_char
45#define vu_short volatile u_short
46#define vu_int volatile u_int
47
48struct dmaBdevice {
49 v_char *dmaB_addr;
50 vu_short dmaB_count;
51 vu_short dmaB_cmd;
52#define dmaB_stat dmaB_cmd
53};
54
55struct dmadevice {
56 v_char *dma_addr;
57 vu_int dma_count;
58 vu_short dma_cmd;
59 vu_short dma_stat;
60};
61
62struct dmareg {
63 struct dmaBdevice dma_Bchan0;
64 struct dmaBdevice dma_Bchan1;
65/* the rest are 98620C specific */
66 v_char dma_id[4];
67 vu_char dma_cr;
68 char dma_pad1[0xEB];
69 struct dmadevice dma_chan0;
70 char dma_pad2[0xF4];
71 struct dmadevice dma_chan1;
72};
73
74#define NDMA 2
75
76/* intr level must be >= level of any device using dma. i.e., splbio */
77#define DMAINTLVL 5
78
79/* addresses */
af359dea 80#define DMA_BASE IIOV(0x500000)
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81
82/* command bits */
83#define DMA_ENAB 0x0001
84#define DMA_WORD 0x0002
85#define DMA_WRT 0x0004
86#define DMA_PRI 0x0008
87#define DMA_IPL(x) (((x) - 3) << 4)
88#define DMA_LWORD 0x0100
89#define DMA_START 0x8000
90
91/* status bits */
92#define DMA_ARMED 0x01
93#define DMA_INTR 0x02
94#define DMA_ACC 0x04
95#define DMA_HALT 0x08
96#define DMA_BERR 0x10
97#define DMA_ALIGN 0x20
98#define DMA_WRAP 0x40
99
100#ifdef KERNEL
101/*
102 * Macros to attempt to hide the HW differences between the 98620B DMA
103 * board and the 1TQ4-0401 DMA chip (68020C "board"). The latter
104 * includes emulation registers for the former but you need to access
105 * the "native-mode" registers directly in order to do 32-bit DMA.
106 *
107 * DMA_CLEAR: Clear interrupt on DMA board. We just use the
108 * emulation registers on the 98620C as that is easiest.
109 * DMA_STAT: Read status register. Again, we always read the
110 * emulation register. Someday we might want to
111 * look at the 98620C status to get the extended bits.
112 * DMA_ARM: Load address, count and kick-off DMA.
113 */
114#define DMA_CLEAR(dc) { v_int dmaclr = (int)dc->sc_Bhwaddr->dmaB_addr; }
115#define DMA_STAT(dc) dc->sc_Bhwaddr->dmaB_stat
116
117#if defined(HP320)
0e1872ad 118#define DMA_ARM(dc) \
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119 if (dc->sc_type == DMA_B) { \
120 register struct dmaBdevice *dma = dc->sc_Bhwaddr; \
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121 dma->dmaB_addr = dc->sc_cur->dc_addr; \
122 dma->dmaB_count = dc->sc_cur->dc_count - 1; \
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123 dma->dmaB_cmd = dc->sc_cmd; \
124 } else { \
125 register struct dmadevice *dma = dc->sc_hwaddr; \
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126 dma->dma_addr = dc->sc_cur->dc_addr; \
127 dma->dma_count = dc->sc_cur->dc_count - 1; \
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128 dma->dma_cmd = dc->sc_cmd; \
129 }
130#else
0e1872ad 131#define DMA_ARM(dc) \
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132 { \
133 register struct dmadevice *dma = dc->sc_hwaddr; \
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134 dma->dma_addr = dc->sc_cur->dc_addr; \
135 dma->dma_count = dc->sc_cur->dc_count - 1; \
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136 dma->dma_cmd = dc->sc_cmd; \
137 }
138#endif
139#endif