[unix-history] / .ref-BSD-4_3_Net_2 / usr / src / sys / vax / if / if_qereg.h

/*
 * Copyright (c) 1988 Regents of the University of California.
 * All rights reserved.
 *
 * This code is derived from software contributed to Berkeley by
 * Digital Equipment Corp.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *	This product includes software developed by the University of
 *	California, Berkeley and its contributors.
 * 4. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 *	@(#)if_qereg.h	7.3 (Berkeley) 6/28/90
 */

/* @(#)if_qereg.h	1.2 (ULTRIX) 1/3/85 */
 
/****************************************************************
 *								*
 *        Licensed from Digital Equipment Corporation 		*
 *                       Copyright (c) 				*
 *               Digital Equipment Corporation			*
 *                   Maynard, Massachusetts 			*
 *                         1985, 1986 				*
 *                    All rights reserved. 			*
 *								*
 *        The Information in this software is subject to change *
 *   without notice and should not be construed as a commitment *
 *   by  Digital  Equipment  Corporation.   Digital   makes  no *
 *   representations about the suitability of this software for *
 *   any purpose.  It is supplied "As Is" without expressed  or *
 *   implied  warranty. 					*
 *								*
 *        If the Regents of the University of California or its *
 *   licensees modify the software in a manner creating  	*
 *   diriviative copyright rights, appropriate copyright  	*
 *   legends may be placed on  the drivative work in addition   *
 *   to that set forth above. 					*
 *								*
 ****************************************************************/
/* ---------------------------------------------------------------------
 * Modification History 
 *
 *  13 Feb. 84 -- rjl
 *
 *	Initial version of driver. derived from IL driver.
 * 
 * ---------------------------------------------------------------------
 */
 
/*
 * Digital Q-BUS to NI Adapter 
 */
struct qedevice {
	u_short	qe_sta_addr[2]; 	/* Station address (actually 6 	*/
	u_short	qe_rcvlist_lo; 		/* Receive list lo address 	*/
	u_short	qe_rcvlist_hi; 		/* Receive list hi address 	*/
	u_short	qe_xmtlist_lo;		/* Transmit list lo address 	*/
	u_short	qe_xmtlist_hi;		/* Transmit list hi address 	*/
	u_short	qe_vector;		/* Interrupt vector 		*/
	u_short	qe_csr;			/* Command and Status Register 	*/
};
 
/*
 * Command and status bits (csr)
 */
#define QE_RCV_ENABLE	0x0001		/* Receiver enable		*/
#define QE_RESET	0x0002		/* Software reset		*/
#define QE_NEX_MEM_INT	0x0004		/* Non existant mem interrupt	*/
#define QE_LOAD_ROM	0x0008		/* Load boot/diag from rom	*/
#define QE_XL_INVALID	0x0010		/* Transmit list invalid	*/
#define QE_RL_INVALID	0x0020		/* Receive list invalid		*/
#define QE_INT_ENABLE	0x0040		/* Interrupt enable		*/
#define QE_XMIT_INT	0x0080		/* Transmit interrupt		*/
#define QE_ILOOP 	0x0100		/* Internal loopback		*/
#define QE_ELOOP	0x0200		/* External loopback		*/
#define QE_STIM_ENABLE	0x0400		/* Sanity timer enable		*/
#define QE_POWERUP	0x1000		/* Tranceiver power on		*/
#define QE_CARRIER	0x2000		/* Carrier detect		*/
#define QE_RCV_INT	0x8000		/* Receiver interrupt		*/
 
/*
 * Transmit and receive ring discriptor ---------------------------
 *
 * The QNA uses the flag, status1 and the valid bit as a handshake/semiphore
 * mechinism. 
 * 
 * The flag word is written on ( bits 15,15 set to 1 ) when it reads the
 * descriptor. If the valid bit is set it considers the address to be valid.
 * When it uses the buffer pointed to by the valid address it sets status word
 * one.
 */
struct qe_ring	{
	u_short qe_flag;		/* Buffer utilization flags	*/
	u_short qe_addr_hi:6,		/* Hi order bits of buffer addr	*/
	      qe_odd_begin:1,		/* Odd byte begin and end (xmit)*/
	      qe_odd_end:1,
	      qe_fill1:4,
	      qe_setup:1,		/* Setup packet			*/
	      qe_eomsg:1,		/* End of message flag		*/
	      qe_chain:1,		/* Chain address instead of buf */
	      qe_valid:1;		/* Address field is valid	*/
	u_short qe_addr_lo;		/* Low order bits of address	*/
	short qe_buf_len;		/* Negative buffer length	*/
	u_short qe_status1;		/* Status word one		*/
	u_short qe_status2;		/* Status word two		*/
};
 
/*
 * Status word definations (receive)
 *	word1
 */
#define QE_OVF			0x0001	/* Receiver overflow		*/
#define QE_CRCERR		0x0002	/* CRC error			*/
#define QE_FRAME		0x0004	/* Framing alignment error	*/
#define QE_SHORT		0x0008	/* Packet size < 10 bytes	*/
#define QE_RBL_HI		0x0700	/* Hi bits of receive len	*/
#define QE_RUNT			0x0800	/* Runt packet			*/
#define QE_DISCARD		0x1000	/* Discard the packet		*/
#define QE_ESETUP		0x2000	/* Looped back setup or eloop	*/
#define QE_ERROR		0x4000	/* Receiver error		*/
#define QE_LASTNOT		0x8000	/* Not the last in the packet	*/
/*	word2								*/
#define QE_RBL_LO		0x00ff	/* Low bits of receive len	*/
 
/*
 * Status word definations (transmit)
 *	word1
 */
#define QE_CCNT			0x00f0	/* Collision count this packet	*/
#define QE_FAIL			0x0100	/* Heart beat check failure	*/
#define QE_ABORT		0x0200	/* Transmission abort		*/
#define QE_STE16		0x0400	/* Sanity timer default on	*/
#define QE_NOCAR		0x0800	/* No carrier			*/
#define QE_LOSS			0x1000	/* Loss of carrier while xmit	*/
/*	word2								*/
#define QE_TDR			0x3fff	/* Time domain reflectometry	*/
 
/*
 * General constant definations
 */
#define QEALLOC 		0	/* Allocate an mbuf		*/
#define QENOALLOC		1	/* No mbuf allocation		*/
#define QEDEALLOC		2	/* Release an mbuf chain	*/
 
#define QE_NOTYET		0x8000	/* Descriptor not in use yet	*/
#define QE_INUSE		0x4000	/* Descriptor being used by QNA	*/
#define QE_MASK			0xc000	/* Lastnot/error/used mask	*/
Commit	Line	Data
5f9369d6 KB	1	/*
	2	* Copyright (c) 1988 Regents of the University of California.
	3	* All rights reserved.
	4	*
	5	* This code is derived from software contributed to Berkeley by
	6	* Digital Equipment Corp.
	7	*
af359dea C	8	* Redistribution and use in source and binary forms, with or without
	9	* modification, are permitted provided that the following conditions
	10	* are met:
	11	* 1. Redistributions of source code must retain the above copyright
	12	* notice, this list of conditions and the following disclaimer.
	13	* 2. Redistributions in binary form must reproduce the above copyright
	14	* notice, this list of conditions and the following disclaimer in the
	15	* documentation and/or other materials provided with the distribution.
	16	* 3. All advertising materials mentioning features or use of this software
	17	* must display the following acknowledgement:
	18	* This product includes software developed by the University of
	19	* California, Berkeley and its contributors.
	20	* 4. Neither the name of the University nor the names of its contributors
	21	* may be used to endorse or promote products derived from this software
	22	* without specific prior written permission.
5f9369d6	23	*
af359dea C	24	* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
	25	* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
	27	* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
	30	* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
	31	* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
	32	* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
	33	* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
	34	* SUCH DAMAGE.
5f9369d6	35	*
1c15e888	36	* @(#)if_qereg.h 7.3 (Berkeley) 6/28/90
5f9369d6	37	*/
7eec6d8f KD	38
	39	/* @(#)if_qereg.h 1.2 (ULTRIX) 1/3/85 */
	40
	41	/****************************************************************
	42	* *
	43	* Licensed from Digital Equipment Corporation *
	44	* Copyright (c) *
	45	* Digital Equipment Corporation *
	46	* Maynard, Massachusetts *
	47	* 1985, 1986 *
	48	* All rights reserved. *
	49	* *
	50	* The Information in this software is subject to change *
	51	* without notice and should not be construed as a commitment *
	52	* by Digital Equipment Corporation. Digital makes no *
	53	* representations about the suitability of this software for *
	54	* any purpose. It is supplied "As Is" without expressed or *
	55	* implied warranty. *
	56	* *
	57	* If the Regents of the University of California or its *
	58	* licensees modify the software in a manner creating *
	59	* diriviative copyright rights, appropriate copyright *
	60	* legends may be placed on the drivative work in addition *
	61	* to that set forth above. *
	62	* *
	63	****************************************************************/
	64	/* ---------------------------------------------------------------------
	65	* Modification History
	66	*
	67	* 13 Feb. 84 -- rjl
	68	*
	69	* Initial version of driver. derived from IL driver.
	70	*
	71	* ---------------------------------------------------------------------
	72	*/
	73
	74	/*
	75	* Digital Q-BUS to NI Adapter
	76	*/
	77	struct qedevice {
	78	u_short qe_sta_addr[2]; /* Station address (actually 6 */
5b6dfa0c MK	79	u_short qe_rcvlist_lo; /* Receive list lo address */
5b6dfa0c MK	80	u_short qe_rcvlist_hi; /* Receive list hi address */
7eec6d8f KD	81	u_short qe_xmtlist_lo; /* Transmit list lo address */
	82	u_short qe_xmtlist_hi; /* Transmit list hi address */
	83	u_short qe_vector; /* Interrupt vector */
	84	u_short qe_csr; /* Command and Status Register */
	85	};
	86
	87	/*
	88	* Command and status bits (csr)
	89	*/
	90	#define QE_RCV_ENABLE 0x0001 /* Receiver enable */
	91	#define QE_RESET 0x0002 /* Software reset */
	92	#define QE_NEX_MEM_INT 0x0004 /* Non existant mem interrupt */
	93	#define QE_LOAD_ROM 0x0008 /* Load boot/diag from rom */
	94	#define QE_XL_INVALID 0x0010 /* Transmit list invalid */
	95	#define QE_RL_INVALID 0x0020 /* Receive list invalid */
	96	#define QE_INT_ENABLE 0x0040 /* Interrupt enable */
	97	#define QE_XMIT_INT 0x0080 /* Transmit interrupt */
	98	#define QE_ILOOP 0x0100 /* Internal loopback */
	99	#define QE_ELOOP 0x0200 /* External loopback */
	100	#define QE_STIM_ENABLE 0x0400 /* Sanity timer enable */
	101	#define QE_POWERUP 0x1000 /* Tranceiver power on */
	102	#define QE_CARRIER 0x2000 /* Carrier detect */
	103	#define QE_RCV_INT 0x8000 /* Receiver interrupt */
	104
	105	/*
	106	* Transmit and receive ring discriptor ---------------------------
	107	*
	108	* The QNA uses the flag, status1 and the valid bit as a handshake/semiphore
	109	* mechinism.
	110	*
	111	* The flag word is written on ( bits 15,15 set to 1 ) when it reads the
	112	* descriptor. If the valid bit is set it considers the address to be valid.
	113	* When it uses the buffer pointed to by the valid address it sets status word
	114	* one.
	115	*/
	116	struct qe_ring {
	117	u_short qe_flag; /* Buffer utilization flags */
	118	u_short qe_addr_hi:6, /* Hi order bits of buffer addr */
	119	qe_odd_begin:1, /* Odd byte begin and end (xmit)*/
	120	qe_odd_end:1,
	121	qe_fill1:4,
	122	qe_setup:1, /* Setup packet */
	123	qe_eomsg:1, /* End of message flag */
	124	qe_chain:1, /* Chain address instead of buf */
	125	qe_valid:1; /* Address field is valid */
	126	u_short qe_addr_lo; /* Low order bits of address */
	127	short qe_buf_len; /* Negative buffer length */
	128	u_short qe_status1; /* Status word one */
	129	u_short qe_status2; /* Status word two */
	130	};
	131
	132	/*
	133	* Status word definations (receive)
	134	* word1
	135	*/
	136	#define QE_OVF 0x0001 /* Receiver overflow */
	137	#define QE_CRCERR 0x0002 /* CRC error */
	138	#define QE_FRAME 0x0004 /* Framing alignment error */
	139	#define QE_SHORT 0x0008 /* Packet size < 10 bytes */
	140	#define QE_RBL_HI 0x0700 /* Hi bits of receive len */
	141	#define QE_RUNT 0x0800 /* Runt packet */
	142	#define QE_DISCARD 0x1000 /* Discard the packet */
	143	#define QE_ESETUP 0x2000 /* Looped back setup or eloop */
	144	#define QE_ERROR 0x4000 /* Receiver error */
145	#define QE_LASTNOT 0x8000 /* Not the last in the packet */
146	/* word2 */
147	#define QE_RBL_LO 0x00ff /* Low bits of receive len */
148
149	/*
150	* Status word definations (transmit)
151	* word1
152	*/
153	#define QE_CCNT 0x00f0 /* Collision count this packet */
154	#define QE_FAIL 0x0100 /* Heart beat check failure */
155	#define QE_ABORT 0x0200 /* Transmission abort */
156	#define QE_STE16 0x0400 /* Sanity timer default on */
157	#define QE_NOCAR 0x0800 /* No carrier */
158	#define QE_LOSS 0x1000 /* Loss of carrier while xmit */
159	/* word2 */
160	#define QE_TDR 0x3fff /* Time domain reflectometry */
161
162	/*
163	* General constant definations
164	*/
165	#define QEALLOC 0 /* Allocate an mbuf */
166	#define QENOALLOC 1 /* No mbuf allocation */
167	#define QEDEALLOC 2 /* Release an mbuf chain */
168
169	#define QE_NOTYET 0x8000 /* Descriptor not in use yet */
170	#define QE_INUSE 0x4000 /* Descriptor being used by QNA */
171	#define QE_MASK 0xc000 /* Lastnot/error/used mask */