Commit | Line | Data |
---|---|---|
da7c5cc6 | 1 | /* |
0880b18e | 2 | * Copyright (c) 1982, 1986 Regents of the University of California. |
da7c5cc6 KM |
3 | * All rights reserved. The Berkeley software License Agreement |
4 | * specifies the terms and conditions for redistribution. | |
5 | * | |
95f51977 | 6 | * @(#)if_pclreg.h 7.1 (Berkeley) 6/5/86 |
da7c5cc6 | 7 | */ |
a07ed7d7 SL |
8 | |
9 | /* | |
10 | * DEC CSS PCL-11B Parallel Communications Interface | |
11 | */ | |
12 | ||
13 | struct pcldevice { | |
14 | u_short pcl_tcr; /* Transmitter Command Register */ | |
15 | u_short pcl_tsr; /* Transmitter Status Register */ | |
16 | u_short pcl_tsdb; /* Transmitter Source Data Buffer */ | |
17 | short pcl_tsbc; /* Transmitter Source Byte Count */ | |
18 | u_short pcl_tsba; /* Transmitter Source Bus Address */ | |
19 | u_short pcl_tmmr; /* Transmitter Master/Maint Regs */ | |
20 | u_short pcl_tscrc; /* Transmitter Source CRC */ | |
21 | u_short pcl_spare; | |
22 | u_short pcl_rcr; /* Receiver Command Register */ | |
23 | u_short pcl_rsr; /* Receiver Status Register */ | |
24 | u_short pcl_rddb; /* Receiver Destination Data Buffer */ | |
25 | short pcl_rdbc; /* Receiver Destination Byte Count */ | |
26 | u_short pcl_rdba; /* Receiver Destination Bus Address */ | |
27 | u_short pcl_rdcrc; /* Receiver Destination CRC */ | |
28 | }; | |
29 | ||
30 | /* Transmitter Command and Status Bits */ | |
31 | #define PCL_STTXM (1<<0) /* Start transmission */ | |
32 | #define PCL_TXINIT (1<<1) /* Transmitter Initialize */ | |
33 | #define PCL_IE (1<<6) /* Interrupt Enable */ | |
34 | #define PCL_SNDWD (1<<13) /* Send word */ | |
35 | #define PCL_TXNPR (1<<14) /* Transmitter NPR */ | |
36 | #define PCL_RIB (1<<15) /* Retry if busy */ | |
37 | ||
38 | #define PCL_RESPA (3<<0) /* Response A bits (tsr & rsr) */ | |
39 | #define PCL_RESPB (3<<2) /* Response B bits (tsr & rsr) */ | |
40 | #define PCL_MSTDWN (1<<11) /* Master down */ | |
41 | #define PCL_ERR (1<<15) /* Error summary */ | |
42 | ||
43 | #define PCL_MASTER (1<<8) /* Set MASTER status */ | |
44 | #define PCL_AUTOADDR (1<<12) /* Auto time slicing */ | |
45 | ||
46 | /* Receiver Command and Status Bits */ | |
47 | #define PCL_RCVDAT (1<<0) /* Receive data */ | |
48 | #define PCL_RCINIT (1<<1) /* Receiver Initialize */ | |
49 | #define PCL_RCVWD (1<<13) /* Receive word */ | |
50 | #define PCL_RCNPR (1<<14) /* Receive NRP */ | |
51 | #define PCL_REJ (1<<15) /* Reject transmission */ | |
52 | ||
53 | #define PCL_BCOFL (1<<9) /* Byte Counter Overflow */ | |
54 | ||
55 | #define PCL_TERRBITS "\20\20ERR\17NXL\16MEM_OFL\15TXM_ERR\14MST_DWN\13TIM_OUT\12OVERRUN\11DTI_RDY\10SUC_TXF\07BUSY\06SOREJ\05TBS_BUSY" | |
56 | #define PCL_TCSRBITS "\20\20RIB\17TX_NPR\16SND_WD\10RD_SILO\07IE\04DTO_RDY\03INH_ADI\02TX_INIT\01START_TXM" | |
57 | ||
58 | #define PCL_RERRBITS "\20\20ERR\17NXL\16MEM_OFL\15TXM_ERR\14PARITY\13TIM_OUT\12BC_OFL\11DTO_RDY\10SUC_TXF\07BUSY\06REJ_COMP\05CHN_OPN" | |
59 | #define PCL_RCSRBITS "\20\20REJ\17RC_NPR\16RCV_WD\10LD_SILO\07IE\04DTI_RDY\03INH_ADI\02RC_INIT\01RCV_DAT" |