[unix-history] / usr / src / sys / vax / vax / ka650.c

/*
 * Copyright (c) 1988 The Regents of the University of California.
 * All rights reserved.
 *
 * This code is derived from software contributed to Berkeley by
 * Mt. Xinu.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *	This product includes software developed by the University of
 *	California, Berkeley and its contributors.
 * 4. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 *	@(#)ka650.c	7.7 (Berkeley) 12/16/90
 */

#if VAX650

/*
 * vax650-specific code.
 */

#include "sys/param.h"
#include "sys/time.h"
#include "sys/kernel.h"
#include "sys/systm.h"

#include "../include/cpu.h"
#include "../include/clock.h"
#include "../include/psl.h"
#include "mem.h"
#include "../include/mtpr.h"
#include "ka650.h"


ka650_init()
{
	ioaccess(KA650_MERR, KA650MERRmap, sizeof(ka650merr));
	ioaccess(KA650_CBD, KA650CBDmap, sizeof(ka650cbd));
	ioaccess(KA650_SSC, KA650SSCmap, sizeof(ka650ssc));
	ioaccess(KA650_IPCR, KA650IPCRmap, sizeof(ka650ipcr));
	ioaccess(KA650_CACHE, KA650CACHEmap, KA650_CACHESIZE);
	ka650encache();
	if (ctob(physmem) > ka650merr.merr_qbmbr) {
		printf("physmem(0x%x) > qbmbr(0x%x)\n",
		    ctob(physmem), ka650merr.merr_qbmbr);
		panic("qbus map unprotected");
	}
}

ka650_clkstartrt()
{
	mtpr(ICCS, ICCS_IE);
}

ka650_memnop()
{
	/* void */
}

ka650_memerr()
{
	register char *cp = (char *)0;
	register int m;
	extern u_int cache2tag;

	if (ka650cbd.cbd_cacr & CACR_CPE) {
		printf("cache 2 tag parity error: ");
		if (time.tv_sec - cache2tag < 7) {
			ka650discache();
			printf("cacheing disabled\n");
		} else {
			cache2tag = time.tv_sec;
			printf("flushing cache\n");
			ka650encache();
		}
	}
	m = ka650merr.merr_errstat;
	ka650merr.merr_errstat = MEM_EMASK;
	if (m & MEM_CDAL) {
		cp = "Bus Parity";
	} else if (m & MEM_RDS) {
		cp = "Hard ECC";
	} else if (m & MEM_CRD) {
		cp = "Soft ECC";
	}
	if (cp) {
		printf("%sMemory %s Error: page 0x%x\n",
			(m & MEM_DMA) ? "DMA " : "", cp,
			(m & MEM_PAGE) >> MEM_PAGESHFT);
	}
}

#define NMC650	15
char *mc650[] = {
	0,			"FPA proto err",	"FPA resv inst",
	"FPA Ill Stat 2",	"FPA Ill Stat 1",	"PTE in P0, TB miss",
	"PTE in P1, TB miss",	"PTE in P0, Mod",	"PTE in P1, Mod",
	"Illegal intr IPL",	"MOVC state error",	"bus read error",
	"SCB read error",	"bus write error",	"PCB write error"
};
u_int	cache1tag;
u_int	cache1data;
u_int	cdalerr;
u_int	cache2tag;

struct mc650frame {
	int	mc65_bcnt;		/* byte count == 0xc */
	int	mc65_summary;		/* summary parameter */
	int	mc65_mrvaddr;		/* most recent vad */
	int	mc65_istate1;		/* internal state */
	int	mc65_istate2;		/* internal state */
	int	mc65_pc;		/* trapped pc */
	int	mc65_psl;		/* trapped psl */
};

ka650_mchk(cmcf)
	caddr_t cmcf;
{
	register struct mc650frame *mcf = (struct mc650frame *)cmcf;
	register u_int type = mcf->mc65_summary;
	register u_int i;

	printf("machine check %x", type);
	if (type >= 0x80 && type <= 0x83)
		type -= (0x80 + 11);
	if (type < NMC650 && mc650[type])
		printf(": %s", mc650[type]);
	printf("\n\tvap %x istate1 %x istate2 %x pc %x psl %x\n",
	    mcf->mc65_mrvaddr, mcf->mc65_istate1, mcf->mc65_istate2,
	    mcf->mc65_pc, mcf->mc65_psl);
	printf("dmaser=0x%b qbear=0x%x dmaear=0x%x\n",
	    ka650merr.merr_dser, DMASER_BITS, ka650merr.merr_qbear,
	    ka650merr.merr_dear);
	ka650merr.merr_dser = DSER_CLEAR;

	i = mfpr(CAER);
	mtpr(CAER, CAER_MCC | CAER_DAT | CAER_TAG);
	if (i & CAER_MCC) {
		printf("cache 1 ");
		if (i & CAER_DAT) {
			printf("data");
			i = cache1data;
			cache1data = time.tv_sec;
		}
		if (i & CAER_TAG) {
			printf("tag");
			i = cache1tag;
			cache1tag = time.tv_sec;
		}
	} else if ((i & CAER_MCD) || (ka650merr.merr_errstat & MEM_CDAL)) {
		printf("CDAL");
		i = cdalerr;
		cdalerr = time.tv_sec;
	}
	if (time.tv_sec - i < 7) {
		ka650discache();
		printf(" parity error:  cacheing disabled\n");
	} else {
		printf(" parity error:  flushing cache\n");
		ka650encache();
	}
	/*
	 * May be able to recover if type is 1-4, 0x80 or 0x81, but
	 * only if FPD is set in the saved PSL, or bit VCR in Istate2
	 * is clear.
	 */
	if ((type > 0 && type < 5) || type == 11 || type == 12) {
		if ((mcf->mc65_psl & PSL_FPD)
		    || !(mcf->mc65_istate2 & IS2_VCR)) {
			ka650_memerr();
			return (MCHK_RECOVERED);
		}
	}
	return (MCHK_PANIC);
}

/*
 * Make sure both caches are off and not in diagnostic mode.  Clear the
 * 2nd level cache (by writing to each quadword entry), then enable it.
 * Enable 1st level cache too.
 */
ka650encache()
{
	register int i;

	ka650discache();
	for (i = 0; i < (KA650_CACHESIZE / sizeof(ka650cache[0])); i += 2)
		ka650cache[i] = 0;
	ka650cbd.cbd_cacr = CACR_CEN;
	mtpr(CADR, CADR_SEN2 | CADR_SEN1 | CADR_CENI | CADR_CEND);
}

ka650discache()
{
	mtpr(CADR, 0);
	ka650cbd.cbd_cacr = CACR_CPE;
}
#endif
Commit	Line	Data
a2b702e9	1	/*
f4358f8f KB	2	* Copyright (c) 1988 The Regents of the University of California.
f4358f8f KB	3	* All rights reserved.
a2b702e9	4	*
e00165c4 KB	5	* This code is derived from software contributed to Berkeley by
	6	* Mt. Xinu.
	7	*
af359dea C	8	* Redistribution and use in source and binary forms, with or without
	9	* modification, are permitted provided that the following conditions
	10	* are met:
	11	* 1. Redistributions of source code must retain the above copyright
	12	* notice, this list of conditions and the following disclaimer.
	13	* 2. Redistributions in binary form must reproduce the above copyright
	14	* notice, this list of conditions and the following disclaimer in the
	15	* documentation and/or other materials provided with the distribution.
	16	* 3. All advertising materials mentioning features or use of this software
	17	* must display the following acknowledgement:
	18	* This product includes software developed by the University of
	19	* California, Berkeley and its contributors.
	20	* 4. Neither the name of the University nor the names of its contributors
	21	* may be used to endorse or promote products derived from this software
	22	* without specific prior written permission.
f4358f8f	23	*
af359dea C	24	* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
	25	* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
	27	* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
	30	* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
	31	* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
	32	* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
	33	* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
	34	* SUCH DAMAGE.
	35	*
	36	* @(#)ka650.c 7.7 (Berkeley) 12/16/90
a2b702e9 TF	37	*/
	38
	39	#if VAX650
	40
	41	/*
	42	* vax650-specific code.
	43	*/
	44
b28b3a13 KB	45	#include "sys/param.h"
	46	#include "sys/time.h"
	47	#include "sys/kernel.h"
	48	#include "sys/systm.h"
a2b702e9	49
b28b3a13 KB	50	#include "../include/cpu.h"
	51	#include "../include/clock.h"
	52	#include "../include/psl.h"
a2b702e9	53	#include "mem.h"
b28b3a13	54	#include "../include/mtpr.h"
a2b702e9 TF	55	#include "ka650.h"
	56
	57
	58	ka650_init()
	59	{
	60	ioaccess(KA650_MERR, KA650MERRmap, sizeof(ka650merr));
	61	ioaccess(KA650_CBD, KA650CBDmap, sizeof(ka650cbd));
	62	ioaccess(KA650_SSC, KA650SSCmap, sizeof(ka650ssc));
	63	ioaccess(KA650_IPCR, KA650IPCRmap, sizeof(ka650ipcr));
	64	ioaccess(KA650_CACHE, KA650CACHEmap, KA650_CACHESIZE);
	65	ka650encache();
966ba930 TF	66	if (ctob(physmem) > ka650merr.merr_qbmbr) {
	67	printf("physmem(0x%x) > qbmbr(0x%x)\n",
	68	ctob(physmem), ka650merr.merr_qbmbr);
	69	panic("qbus map unprotected");
	70	}
a2b702e9 TF	71	}
	72
	73	ka650_clkstartrt()
	74	{
	75	mtpr(ICCS, ICCS_IE);
	76	}
	77
	78	ka650_memnop()
	79	{
	80	/* void */
	81	}
	82
	83	ka650_memerr()
	84	{
	85	register char cp = (char )0;
	86	register int m;
	87	extern u_int cache2tag;
	88
	89	if (ka650cbd.cbd_cacr & CACR_CPE) {
	90	printf("cache 2 tag parity error: ");
	91	if (time.tv_sec - cache2tag < 7) {
	92	ka650discache();
	93	printf("cacheing disabled\n");
	94	} else {
	95	cache2tag = time.tv_sec;
	96	printf("flushing cache\n");
	97	ka650encache();
	98	}
	99	}
	100	m = ka650merr.merr_errstat;
	101	ka650merr.merr_errstat = MEM_EMASK;
	102	if (m & MEM_CDAL) {
	103	cp = "Bus Parity";
	104	} else if (m & MEM_RDS) {
	105	cp = "Hard ECC";
	106	} else if (m & MEM_CRD) {
	107	cp = "Soft ECC";
	108	}
	109	if (cp) {
	110	printf("%sMemory %s Error: page 0x%x\n",
	111	(m & MEM_DMA) ? "DMA " : "", cp,
	112	(m & MEM_PAGE) >> MEM_PAGESHFT);
	113	}
	114	}
	115
	116	#define NMC650 15
	117	char *mc650[] = {
	118	0, "FPA proto err", "FPA resv inst",
	119	"FPA Ill Stat 2", "FPA Ill Stat 1", "PTE in P0, TB miss",
	120	"PTE in P1, TB miss", "PTE in P0, Mod", "PTE in P1, Mod",
	121	"Illegal intr IPL", "MOVC state error", "bus read error",
	122	"SCB read error", "bus write error", "PCB write error"
	123	};
	124	u_int cache1tag;
	125	u_int cache1data;
	126	u_int cdalerr;
	127	u_int cache2tag;
	128
	129	struct mc650frame {
	130	int mc65_bcnt; /* byte count == 0xc */
	131	int mc65_summary; /* summary parameter */
	132	int mc65_mrvaddr; /* most recent vad */
	133	int mc65_istate1; /* internal state */
	134	int mc65_istate2; /* internal state */
135	int mc65_pc; /* trapped pc */
136	int mc65_psl; /* trapped psl */
137	};
138
139	ka650_mchk(cmcf)
140	caddr_t cmcf;
141	{
142	register struct mc650frame mcf = (struct mc650frame )cmcf;
143	register u_int type = mcf->mc65_summary;
144	register u_int i;
145
b4b54e4a	146	printf("machine check %x", type);
a2b702e9 TF	147	if (type >= 0x80 && type <= 0x83)
a2b702e9 TF	148	type -= (0x80 + 11);
b4b54e4a TF	149	if (type < NMC650 && mc650[type])
	150	printf(": %s", mc650[type]);
	151	printf("\n\tvap %x istate1 %x istate2 %x pc %x psl %x\n",
a2b702e9 TF	152	mcf->mc65_mrvaddr, mcf->mc65_istate1, mcf->mc65_istate2,
a2b702e9 TF	153	mcf->mc65_pc, mcf->mc65_psl);
966ba930 TF	154	printf("dmaser=0x%b qbear=0x%x dmaear=0x%x\n",
	155	ka650merr.merr_dser, DMASER_BITS, ka650merr.merr_qbear,
	156	ka650merr.merr_dear);
	157	ka650merr.merr_dser = DSER_CLEAR;
a2b702e9 TF	158
	159	i = mfpr(CAER);
	160	mtpr(CAER, CAER_MCC \| CAER_DAT \| CAER_TAG);
	161	if (i & CAER_MCC) {
966ba930	162	printf("cache 1 ");
a2b702e9 TF	163	if (i & CAER_DAT) {
	164	printf("data");
	165	i = cache1data;
	166	cache1data = time.tv_sec;
	167	}
	168	if (i & CAER_TAG) {
	169	printf("tag");
	170	i = cache1tag;
	171	cache1tag = time.tv_sec;
	172	}
966ba930	173	} else if ((i & CAER_MCD) \|\| (ka650merr.merr_errstat & MEM_CDAL)) {
a2b702e9 TF	174	printf("CDAL");
	175	i = cdalerr;
	176	cdalerr = time.tv_sec;
	177	}
	178	if (time.tv_sec - i < 7) {
	179	ka650discache();
	180	printf(" parity error: cacheing disabled\n");
	181	} else {
	182	printf(" parity error: flushing cache\n");
	183	ka650encache();
	184	}
	185	/*
	186	* May be able to recover if type is 1-4, 0x80 or 0x81, but
	187	* only if FPD is set in the saved PSL, or bit VCR in Istate2
	188	* is clear.
	189	*/
	190	if ((type > 0 && type < 5) \|\| type == 11 \|\| type == 12) {
	191	if ((mcf->mc65_psl & PSL_FPD)
	192	\|\| !(mcf->mc65_istate2 & IS2_VCR)) {
	193	ka650_memerr();
	194	return (MCHK_RECOVERED);
	195	}
	196	}
	197	return (MCHK_PANIC);
	198	}
	199
	200	/*
	201	* Make sure both caches are off and not in diagnostic mode. Clear the
	202	* 2nd level cache (by writing to each quadword entry), then enable it.
	203	* Enable 1st level cache too.
	204	*/
	205	ka650encache()
	206	{
	207	register int i;
	208
	209	ka650discache();
	210	for (i = 0; i < (KA650_CACHESIZE / sizeof(ka650cache[0])); i += 2)
	211	ka650cache[i] = 0;
	212	ka650cbd.cbd_cacr = CACR_CEN;
	213	mtpr(CADR, CADR_SEN2 \| CADR_SEN1 \| CADR_CENI \| CADR_CEND);
	214	}
	215
	216	ka650discache()
	217	{
	218	mtpr(CADR, 0);
	219	ka650cbd.cbd_cacr = CACR_CPE;
	220	}
	221	#endif