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[unix-history] / gnu / usr.bin / cc / common / insn-emit.c
CommitLineData
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PR
1/* Generated automatically by the program `genemit'
2from the machine description file `md'. */
3
4#include "config.h"
5#include "rtl.h"
6#include "expr.h"
7#include "real.h"
8#include "output.h"
9#include "insn-config.h"
10
11#include "insn-flags.h"
12
13#include "insn-codes.h"
14
15extern char *insn_operand_constraint[][MAX_RECOG_OPERANDS];
16
17extern rtx recog_operand[];
18#define operands emit_operand
19
20#define FAIL goto _fail
21
22#define DONE goto _done
23
24rtx
25gen_tstsi_1 (operand0)
26 rtx operand0;
27{
28 return gen_rtx (SET, VOIDmode, cc0_rtx, operand0);
29}
30
31rtx
32gen_tstsi (operand0)
33 rtx operand0;
34{
35 rtx operands[1];
36 rtx _val = 0;
37 start_sequence ();
38 operands[0] = operand0;
39
40{
41 i386_compare_gen = gen_tstsi_1;
42 i386_compare_op0 = operands[0];
43 DONE;
44}
45 operand0 = operands[0];
46 emit_insn (gen_rtx (SET, VOIDmode, cc0_rtx, operand0));
47 _done:
48 _val = gen_sequence ();
49 _fail:
50 end_sequence ();
51 return _val;
52}
53
54rtx
55gen_tsthi_1 (operand0)
56 rtx operand0;
57{
58 return gen_rtx (SET, VOIDmode, cc0_rtx, operand0);
59}
60
61rtx
62gen_tsthi (operand0)
63 rtx operand0;
64{
65 rtx operands[1];
66 rtx _val = 0;
67 start_sequence ();
68 operands[0] = operand0;
69
70{
71 i386_compare_gen = gen_tsthi_1;
72 i386_compare_op0 = operands[0];
73 DONE;
74}
75 operand0 = operands[0];
76 emit_insn (gen_rtx (SET, VOIDmode, cc0_rtx, operand0));
77 _done:
78 _val = gen_sequence ();
79 _fail:
80 end_sequence ();
81 return _val;
82}
83
84rtx
85gen_tstqi_1 (operand0)
86 rtx operand0;
87{
88 return gen_rtx (SET, VOIDmode, cc0_rtx, operand0);
89}
90
91rtx
92gen_tstqi (operand0)
93 rtx operand0;
94{
95 rtx operands[1];
96 rtx _val = 0;
97 start_sequence ();
98 operands[0] = operand0;
99
100{
101 i386_compare_gen = gen_tstqi_1;
102 i386_compare_op0 = operands[0];
103 DONE;
104}
105 operand0 = operands[0];
106 emit_insn (gen_rtx (SET, VOIDmode, cc0_rtx, operand0));
107 _done:
108 _val = gen_sequence ();
109 _fail:
110 end_sequence ();
111 return _val;
112}
113
114rtx
115gen_tstsf_cc (operand0)
116 rtx operand0;
117{
118 return gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2,
119 gen_rtx (SET, VOIDmode, cc0_rtx, operand0),
120 gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, HImode, 0))));
121}
122
123rtx
124gen_tstsf (operand0)
125 rtx operand0;
126{
127 rtx operands[1];
128 rtx _val = 0;
129 start_sequence ();
130 operands[0] = operand0;
131
132{
133 i386_compare_gen = gen_tstsf_cc;
134 i386_compare_op0 = operands[0];
135 DONE;
136}
137 operand0 = operands[0];
138 emit (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2,
139 gen_rtx (SET, VOIDmode, cc0_rtx, operand0),
140 gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, HImode, 0)))));
141 _done:
142 _val = gen_sequence ();
143 _fail:
144 end_sequence ();
145 return _val;
146}
147
148rtx
149gen_tstdf_cc (operand0)
150 rtx operand0;
151{
152 return gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2,
153 gen_rtx (SET, VOIDmode, cc0_rtx, operand0),
154 gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, HImode, 0))));
155}
156
157rtx
158gen_tstdf (operand0)
159 rtx operand0;
160{
161 rtx operands[1];
162 rtx _val = 0;
163 start_sequence ();
164 operands[0] = operand0;
165
166{
167 i386_compare_gen = gen_tstdf_cc;
168 i386_compare_op0 = operands[0];
169 DONE;
170}
171 operand0 = operands[0];
172 emit (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2,
173 gen_rtx (SET, VOIDmode, cc0_rtx, operand0),
174 gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, HImode, 0)))));
175 _done:
176 _val = gen_sequence ();
177 _fail:
178 end_sequence ();
179 return _val;
180}
181
182rtx
183gen_cmpsi_1 (operand0, operand1)
184 rtx operand0;
185 rtx operand1;
186{
187 return gen_rtx (SET, VOIDmode, cc0_rtx, gen_rtx (COMPARE, VOIDmode, operand0, operand1));
188}
189
190rtx
191gen_cmpsi (operand0, operand1)
192 rtx operand0;
193 rtx operand1;
194{
195 rtx operands[2];
196 rtx _val = 0;
197 start_sequence ();
198 operands[0] = operand0;
199 operands[1] = operand1;
200
201{
202 if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
203 operands[0] = force_reg (SImode, operands[0]);
204
205 i386_compare_gen = gen_cmpsi_1;
206 i386_compare_op0 = operands[0];
207 i386_compare_op1 = operands[1];
208 DONE;
209}
210 operand0 = operands[0];
211 operand1 = operands[1];
212 emit_insn (gen_rtx (SET, VOIDmode, cc0_rtx, gen_rtx (COMPARE, VOIDmode, operand0, operand1)));
213 _done:
214 _val = gen_sequence ();
215 _fail:
216 end_sequence ();
217 return _val;
218}
219
220rtx
221gen_cmphi_1 (operand0, operand1)
222 rtx operand0;
223 rtx operand1;
224{
225 return gen_rtx (SET, VOIDmode, cc0_rtx, gen_rtx (COMPARE, VOIDmode, operand0, operand1));
226}
227
228rtx
229gen_cmphi (operand0, operand1)
230 rtx operand0;
231 rtx operand1;
232{
233 rtx operands[2];
234 rtx _val = 0;
235 start_sequence ();
236 operands[0] = operand0;
237 operands[1] = operand1;
238
239{
240 if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
241 operands[0] = force_reg (HImode, operands[0]);
242
243 i386_compare_gen = gen_cmphi_1;
244 i386_compare_op0 = operands[0];
245 i386_compare_op1 = operands[1];
246 DONE;
247}
248 operand0 = operands[0];
249 operand1 = operands[1];
250 emit_insn (gen_rtx (SET, VOIDmode, cc0_rtx, gen_rtx (COMPARE, VOIDmode, operand0, operand1)));
251 _done:
252 _val = gen_sequence ();
253 _fail:
254 end_sequence ();
255 return _val;
256}
257
258rtx
259gen_cmpqi_1 (operand0, operand1)
260 rtx operand0;
261 rtx operand1;
262{
263 return gen_rtx (SET, VOIDmode, cc0_rtx, gen_rtx (COMPARE, VOIDmode, operand0, operand1));
264}
265
266rtx
267gen_cmpqi (operand0, operand1)
268 rtx operand0;
269 rtx operand1;
270{
271 rtx operands[2];
272 rtx _val = 0;
273 start_sequence ();
274 operands[0] = operand0;
275 operands[1] = operand1;
276
277{
278 if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
279 operands[0] = force_reg (QImode, operands[0]);
280
281 i386_compare_gen = gen_cmpqi_1;
282 i386_compare_op0 = operands[0];
283 i386_compare_op1 = operands[1];
284 DONE;
285}
286 operand0 = operands[0];
287 operand1 = operands[1];
288 emit_insn (gen_rtx (SET, VOIDmode, cc0_rtx, gen_rtx (COMPARE, VOIDmode, operand0, operand1)));
289 _done:
290 _val = gen_sequence ();
291 _fail:
292 end_sequence ();
293 return _val;
294}
295
296rtx
297gen_cmpsf_cc_1 (operand0, operand1, operand2)
298 rtx operand0;
299 rtx operand1;
300 rtx operand2;
301{
302 return gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2,
303 gen_rtx (SET, VOIDmode, cc0_rtx, gen_rtx (GET_CODE (operand2), VOIDmode,
304 operand0,
305 operand1)),
306 gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, HImode, 0))));
307}
308
309rtx
310gen_cmpdf (operand0, operand1)
311 rtx operand0;
312 rtx operand1;
313{
314 rtx operands[2];
315 rtx _val = 0;
316 start_sequence ();
317 operands[0] = operand0;
318 operands[1] = operand1;
319
320{
321 i386_compare_gen = gen_cmpdf_cc;
322 i386_compare_gen_eq = gen_cmpdf_ccfpeq;
323 i386_compare_op0 = operands[0];
324 i386_compare_op1 = operands[1];
325 DONE;
326}
327 operand0 = operands[0];
328 operand1 = operands[1];
329 emit_insn (gen_rtx (SET, VOIDmode, cc0_rtx, gen_rtx (COMPARE, VOIDmode, operand0, operand1)));
330 _done:
331 _val = gen_sequence ();
332 _fail:
333 end_sequence ();
334 return _val;
335}
336
337rtx
338gen_cmpsf (operand0, operand1)
339 rtx operand0;
340 rtx operand1;
341{
342 rtx operands[2];
343 rtx _val = 0;
344 start_sequence ();
345 operands[0] = operand0;
346 operands[1] = operand1;
347
348{
349 i386_compare_gen = gen_cmpsf_cc;
350 i386_compare_gen_eq = gen_cmpsf_ccfpeq;
351 i386_compare_op0 = operands[0];
352 i386_compare_op1 = operands[1];
353 DONE;
354}
355 operand0 = operands[0];
356 operand1 = operands[1];
357 emit_insn (gen_rtx (SET, VOIDmode, cc0_rtx, gen_rtx (COMPARE, VOIDmode, operand0, operand1)));
358 _done:
359 _val = gen_sequence ();
360 _fail:
361 end_sequence ();
362 return _val;
363}
364
365rtx
366gen_cmpdf_cc (operand0, operand1)
367 rtx operand0;
368 rtx operand1;
369{
370 return gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2,
371 gen_rtx (SET, VOIDmode, cc0_rtx, gen_rtx (COMPARE, VOIDmode, operand0, operand1)),
372 gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, HImode, 0))));
373}
374
375rtx
376gen_cmpdf_ccfpeq (operand0, operand1)
377 rtx operand0;
378 rtx operand1;
379{
380 rtx operands[2];
381 rtx _val = 0;
382 start_sequence ();
383 operands[0] = operand0;
384 operands[1] = operand1;
385
386{
387 if (! register_operand (operands[1], DFmode))
388 operands[1] = copy_to_mode_reg (DFmode, operands[1]);
389}
390 operand0 = operands[0];
391 operand1 = operands[1];
392 emit (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2,
393 gen_rtx (SET, VOIDmode, cc0_rtx, gen_rtx (COMPARE, CCFPEQmode, operand0, operand1)),
394 gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, HImode, 0)))));
395 _done:
396 _val = gen_sequence ();
397 _fail:
398 end_sequence ();
399 return _val;
400}
401
402rtx
403gen_cmpsf_cc (operand0, operand1)
404 rtx operand0;
405 rtx operand1;
406{
407 return gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2,
408 gen_rtx (SET, VOIDmode, cc0_rtx, gen_rtx (COMPARE, VOIDmode, operand0, operand1)),
409 gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, HImode, 0))));
410}
411
412rtx
413gen_cmpsf_ccfpeq (operand0, operand1)
414 rtx operand0;
415 rtx operand1;
416{
417 rtx operands[2];
418 rtx _val = 0;
419 start_sequence ();
420 operands[0] = operand0;
421 operands[1] = operand1;
422
423{
424 if (! register_operand (operands[1], SFmode))
425 operands[1] = copy_to_mode_reg (SFmode, operands[1]);
426}
427 operand0 = operands[0];
428 operand1 = operands[1];
429 emit (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2,
430 gen_rtx (SET, VOIDmode, cc0_rtx, gen_rtx (COMPARE, CCFPEQmode, operand0, operand1)),
431 gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, HImode, 0)))));
432 _done:
433 _val = gen_sequence ();
434 _fail:
435 end_sequence ();
436 return _val;
437}
438
439rtx
440gen_movsi (operand0, operand1)
441 rtx operand0;
442 rtx operand1;
443{
444 rtx operands[2];
445 rtx _val = 0;
446 start_sequence ();
447 operands[0] = operand0;
448 operands[1] = operand1;
449
450{
451 extern int flag_pic;
452
453 if (flag_pic && SYMBOLIC_CONST (operands[1]))
454 emit_pic_move (operands, SImode);
455}
456 operand0 = operands[0];
457 operand1 = operands[1];
458 emit_insn (gen_rtx (SET, VOIDmode, operand0, operand1));
459 _done:
460 _val = gen_sequence ();
461 _fail:
462 end_sequence ();
463 return _val;
464}
465
466rtx
467gen_movhi (operand0, operand1)
468 rtx operand0;
469 rtx operand1;
470{
471 return gen_rtx (SET, VOIDmode, operand0, operand1);
472}
473
474rtx
475gen_movstricthi (operand0, operand1)
476 rtx operand0;
477 rtx operand1;
478{
479 return gen_rtx (SET, VOIDmode, gen_rtx (STRICT_LOW_PART, VOIDmode, operand0), operand1);
480}
481
482rtx
483gen_movqi (operand0, operand1)
484 rtx operand0;
485 rtx operand1;
486{
487 return gen_rtx (SET, VOIDmode, operand0, operand1);
488}
489
490rtx
491gen_movstrictqi (operand0, operand1)
492 rtx operand0;
493 rtx operand1;
494{
495 return gen_rtx (SET, VOIDmode, gen_rtx (STRICT_LOW_PART, VOIDmode, operand0), operand1);
496}
497
498rtx
499gen_movsf (operand0, operand1)
500 rtx operand0;
501 rtx operand1;
502{
503 return gen_rtx (SET, VOIDmode, operand0, operand1);
504}
505
506rtx
507gen_swapdf (operand0, operand1)
508 rtx operand0;
509 rtx operand1;
510{
511 return gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2,
512 gen_rtx (SET, VOIDmode, operand0, operand1),
513 gen_rtx (SET, VOIDmode, operand1, operand0)));
514}
515
516rtx
517gen_movdf (operand0, operand1)
518 rtx operand0;
519 rtx operand1;
520{
521 return gen_rtx (SET, VOIDmode, operand0, operand1);
522}
523
524rtx
525gen_movdi (operand0, operand1)
526 rtx operand0;
527 rtx operand1;
528{
529 return gen_rtx (SET, VOIDmode, operand0, operand1);
530}
531
532rtx
533gen_zero_extendhisi2 (operand0, operand1)
534 rtx operand0;
535 rtx operand1;
536{
537 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (ZERO_EXTEND, SImode, operand1));
538}
539
540rtx
541gen_zero_extendqihi2 (operand0, operand1)
542 rtx operand0;
543 rtx operand1;
544{
545 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (ZERO_EXTEND, HImode, operand1));
546}
547
548rtx
549gen_zero_extendqisi2 (operand0, operand1)
550 rtx operand0;
551 rtx operand1;
552{
553 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (ZERO_EXTEND, SImode, operand1));
554}
555
556rtx
557gen_zero_extendsidi2 (operand0, operand1)
558 rtx operand0;
559 rtx operand1;
560{
561 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (ZERO_EXTEND, DImode, operand1));
562}
563
564rtx
565gen_extendsidi2 (operand0, operand1)
566 rtx operand0;
567 rtx operand1;
568{
569 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (SIGN_EXTEND, DImode, operand1));
570}
571
572rtx
573gen_extendhisi2 (operand0, operand1)
574 rtx operand0;
575 rtx operand1;
576{
577 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (SIGN_EXTEND, SImode, operand1));
578}
579
580rtx
581gen_extendqihi2 (operand0, operand1)
582 rtx operand0;
583 rtx operand1;
584{
585 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (SIGN_EXTEND, HImode, operand1));
586}
587
588rtx
589gen_extendqisi2 (operand0, operand1)
590 rtx operand0;
591 rtx operand1;
592{
593 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (SIGN_EXTEND, SImode, operand1));
594}
595
596rtx
597gen_extendsfdf2 (operand0, operand1)
598 rtx operand0;
599 rtx operand1;
600{
601 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (FLOAT_EXTEND, DFmode, operand1));
602}
603
604rtx
605gen_truncdfsf2 (operand0, operand1)
606 rtx operand0;
607 rtx operand1;
608{
609 rtx operand2;
610 rtx operands[3];
611 rtx _val = 0;
612 start_sequence ();
613 operands[0] = operand0;
614 operands[1] = operand1;
615
616{
617 operands[2] = (rtx) assign_386_stack_local (SFmode, 0);
618}
619 operand0 = operands[0];
620 operand1 = operands[1];
621 operand2 = operands[2];
622 emit (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2,
623 gen_rtx (SET, VOIDmode, operand0, gen_rtx (FLOAT_TRUNCATE, SFmode, operand1)),
624 gen_rtx (CLOBBER, VOIDmode, operand2))));
625 _done:
626 _val = gen_sequence ();
627 _fail:
628 end_sequence ();
629 return _val;
630}
631
632rtx
633gen_fixuns_truncdfsi2 (operand0, operand1)
634 rtx operand0;
635 rtx operand1;
636{
637 rtx operand2;
638 rtx operand3;
639 rtx operand4;
640 rtx operand5;
641 rtx operand6;
642 rtx operands[7];
643 rtx _val = 0;
644 start_sequence ();
645 operands[0] = operand0;
646 operands[1] = operand1;
647
648{
649 operands[2] = gen_reg_rtx (DImode);
650 operands[3] = gen_lowpart (SImode, operands[2]);
651 operands[4] = gen_reg_rtx (DFmode);
652 operands[5] = (rtx) assign_386_stack_local (SImode, 0);
653 operands[6] = (rtx) assign_386_stack_local (SImode, 1);
654}
655 operand0 = operands[0];
656 operand1 = operands[1];
657 operand2 = operands[2];
658 operand3 = operands[3];
659 operand4 = operands[4];
660 operand5 = operands[5];
661 operand6 = operands[6];
662 emit_insn (gen_rtx (SET, VOIDmode, operand4, operand1));
663 emit (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (5,
664 gen_rtx (SET, VOIDmode, operand2, gen_rtx (FIX, DImode, gen_rtx (FIX, DFmode, operand4))),
665 gen_rtx (CLOBBER, VOIDmode, operand4),
666 gen_rtx (CLOBBER, VOIDmode, operand5),
667 gen_rtx (CLOBBER, VOIDmode, operand6),
668 gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, SImode, 0)))));
669 emit_insn (gen_rtx (SET, VOIDmode, operand0, operand3));
670 _done:
671 _val = gen_sequence ();
672 _fail:
673 end_sequence ();
674 return _val;
675}
676
677rtx
678gen_fixuns_truncsfsi2 (operand0, operand1)
679 rtx operand0;
680 rtx operand1;
681{
682 rtx operand2;
683 rtx operand3;
684 rtx operand4;
685 rtx operand5;
686 rtx operand6;
687 rtx operands[7];
688 rtx _val = 0;
689 start_sequence ();
690 operands[0] = operand0;
691 operands[1] = operand1;
692
693{
694 operands[2] = gen_reg_rtx (DImode);
695 operands[3] = gen_lowpart (SImode, operands[2]);
696 operands[4] = gen_reg_rtx (SFmode);
697 operands[5] = (rtx) assign_386_stack_local (SImode, 0);
698 operands[6] = (rtx) assign_386_stack_local (SImode, 1);
699}
700 operand0 = operands[0];
701 operand1 = operands[1];
702 operand2 = operands[2];
703 operand3 = operands[3];
704 operand4 = operands[4];
705 operand5 = operands[5];
706 operand6 = operands[6];
707 emit_insn (gen_rtx (SET, VOIDmode, operand4, operand1));
708 emit (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (5,
709 gen_rtx (SET, VOIDmode, operand2, gen_rtx (FIX, DImode, gen_rtx (FIX, SFmode, operand4))),
710 gen_rtx (CLOBBER, VOIDmode, operand4),
711 gen_rtx (CLOBBER, VOIDmode, operand5),
712 gen_rtx (CLOBBER, VOIDmode, operand6),
713 gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, SImode, 0)))));
714 emit_insn (gen_rtx (SET, VOIDmode, operand0, operand3));
715 _done:
716 _val = gen_sequence ();
717 _fail:
718 end_sequence ();
719 return _val;
720}
721
722rtx
723gen_fix_truncdfdi2 (operand0, operand1)
724 rtx operand0;
725 rtx operand1;
726{
727 rtx operand2;
728 rtx operand3;
729 rtx operand4;
730 rtx operands[5];
731 rtx _val = 0;
732 start_sequence ();
733 operands[0] = operand0;
734 operands[1] = operand1;
735
736{
737 operands[1] = copy_to_mode_reg (DFmode, operands[1]);
738 operands[2] = gen_reg_rtx (DFmode);
739 operands[3] = (rtx) assign_386_stack_local (SImode, 0);
740 operands[4] = (rtx) assign_386_stack_local (SImode, 1);
741}
742 operand0 = operands[0];
743 operand1 = operands[1];
744 operand2 = operands[2];
745 operand3 = operands[3];
746 operand4 = operands[4];
747 emit_insn (gen_rtx (SET, VOIDmode, operand2, operand1));
748 emit (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (5,
749 gen_rtx (SET, VOIDmode, operand0, gen_rtx (FIX, DImode, gen_rtx (FIX, DFmode, operand2))),
750 gen_rtx (CLOBBER, VOIDmode, operand2),
751 gen_rtx (CLOBBER, VOIDmode, operand3),
752 gen_rtx (CLOBBER, VOIDmode, operand4),
753 gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, SImode, 0)))));
754 _done:
755 _val = gen_sequence ();
756 _fail:
757 end_sequence ();
758 return _val;
759}
760
761rtx
762gen_fix_truncsfdi2 (operand0, operand1)
763 rtx operand0;
764 rtx operand1;
765{
766 rtx operand2;
767 rtx operand3;
768 rtx operand4;
769 rtx operands[5];
770 rtx _val = 0;
771 start_sequence ();
772 operands[0] = operand0;
773 operands[1] = operand1;
774
775{
776 operands[1] = copy_to_mode_reg (SFmode, operands[1]);
777 operands[2] = gen_reg_rtx (SFmode);
778 operands[3] = (rtx) assign_386_stack_local (SImode, 0);
779 operands[4] = (rtx) assign_386_stack_local (SImode, 1);
780}
781 operand0 = operands[0];
782 operand1 = operands[1];
783 operand2 = operands[2];
784 operand3 = operands[3];
785 operand4 = operands[4];
786 emit_insn (gen_rtx (SET, VOIDmode, operand2, operand1));
787 emit (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (5,
788 gen_rtx (SET, VOIDmode, operand0, gen_rtx (FIX, DImode, gen_rtx (FIX, SFmode, operand2))),
789 gen_rtx (CLOBBER, VOIDmode, operand2),
790 gen_rtx (CLOBBER, VOIDmode, operand3),
791 gen_rtx (CLOBBER, VOIDmode, operand4),
792 gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, SImode, 0)))));
793 _done:
794 _val = gen_sequence ();
795 _fail:
796 end_sequence ();
797 return _val;
798}
799
800rtx
801gen_fix_truncdfsi2 (operand0, operand1)
802 rtx operand0;
803 rtx operand1;
804{
805 rtx operand2;
806 rtx operand3;
807 rtx operands[4];
808 rtx _val = 0;
809 start_sequence ();
810 operands[0] = operand0;
811 operands[1] = operand1;
812
813{
814 operands[2] = (rtx) assign_386_stack_local (SImode, 0);
815 operands[3] = (rtx) assign_386_stack_local (SImode, 1);
816}
817 operand0 = operands[0];
818 operand1 = operands[1];
819 operand2 = operands[2];
820 operand3 = operands[3];
821 emit (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (4,
822 gen_rtx (SET, VOIDmode, operand0, gen_rtx (FIX, SImode, gen_rtx (FIX, DFmode, operand1))),
823 gen_rtx (CLOBBER, VOIDmode, operand2),
824 gen_rtx (CLOBBER, VOIDmode, operand3),
825 gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, SImode, 0)))));
826 _done:
827 _val = gen_sequence ();
828 _fail:
829 end_sequence ();
830 return _val;
831}
832
833rtx
834gen_fix_truncsfsi2 (operand0, operand1)
835 rtx operand0;
836 rtx operand1;
837{
838 rtx operand2;
839 rtx operand3;
840 rtx operands[4];
841 rtx _val = 0;
842 start_sequence ();
843 operands[0] = operand0;
844 operands[1] = operand1;
845
846{
847 operands[2] = (rtx) assign_386_stack_local (SImode, 0);
848 operands[3] = (rtx) assign_386_stack_local (SImode, 1);
849}
850 operand0 = operands[0];
851 operand1 = operands[1];
852 operand2 = operands[2];
853 operand3 = operands[3];
854 emit (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (4,
855 gen_rtx (SET, VOIDmode, operand0, gen_rtx (FIX, SImode, gen_rtx (FIX, SFmode, operand1))),
856 gen_rtx (CLOBBER, VOIDmode, operand2),
857 gen_rtx (CLOBBER, VOIDmode, operand3),
858 gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, SImode, 0)))));
859 _done:
860 _val = gen_sequence ();
861 _fail:
862 end_sequence ();
863 return _val;
864}
865
866rtx
867gen_floatsisf2 (operand0, operand1)
868 rtx operand0;
869 rtx operand1;
870{
871 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (FLOAT, SFmode, operand1));
872}
873
874rtx
875gen_floatdisf2 (operand0, operand1)
876 rtx operand0;
877 rtx operand1;
878{
879 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (FLOAT, SFmode, operand1));
880}
881
882rtx
883gen_floatsidf2 (operand0, operand1)
884 rtx operand0;
885 rtx operand1;
886{
887 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (FLOAT, DFmode, operand1));
888}
889
890rtx
891gen_floatdidf2 (operand0, operand1)
892 rtx operand0;
893 rtx operand1;
894{
895 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (FLOAT, DFmode, operand1));
896}
897
898rtx
899gen_adddi3 (operand0, operand1, operand2)
900 rtx operand0;
901 rtx operand1;
902 rtx operand2;
903{
904 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (PLUS, DImode, operand1, operand2));
905}
906
907rtx
908gen_addsi3 (operand0, operand1, operand2)
909 rtx operand0;
910 rtx operand1;
911 rtx operand2;
912{
913 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (PLUS, SImode, operand1, operand2));
914}
915
916rtx
917gen_addhi3 (operand0, operand1, operand2)
918 rtx operand0;
919 rtx operand1;
920 rtx operand2;
921{
922 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (PLUS, HImode, operand1, operand2));
923}
924
925rtx
926gen_addqi3 (operand0, operand1, operand2)
927 rtx operand0;
928 rtx operand1;
929 rtx operand2;
930{
931 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (PLUS, QImode, operand1, operand2));
932}
933
934rtx
935gen_adddf3 (operand0, operand1, operand2)
936 rtx operand0;
937 rtx operand1;
938 rtx operand2;
939{
940 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (PLUS, DFmode, operand1, operand2));
941}
942
943rtx
944gen_addsf3 (operand0, operand1, operand2)
945 rtx operand0;
946 rtx operand1;
947 rtx operand2;
948{
949 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (PLUS, SFmode, operand1, operand2));
950}
951
952rtx
953gen_subdi3 (operand0, operand1, operand2)
954 rtx operand0;
955 rtx operand1;
956 rtx operand2;
957{
958 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (MINUS, DImode, operand1, operand2));
959}
960
961rtx
962gen_subsi3 (operand0, operand1, operand2)
963 rtx operand0;
964 rtx operand1;
965 rtx operand2;
966{
967 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (MINUS, SImode, operand1, operand2));
968}
969
970rtx
971gen_subhi3 (operand0, operand1, operand2)
972 rtx operand0;
973 rtx operand1;
974 rtx operand2;
975{
976 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (MINUS, HImode, operand1, operand2));
977}
978
979rtx
980gen_subqi3 (operand0, operand1, operand2)
981 rtx operand0;
982 rtx operand1;
983 rtx operand2;
984{
985 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (MINUS, QImode, operand1, operand2));
986}
987
988rtx
989gen_subdf3 (operand0, operand1, operand2)
990 rtx operand0;
991 rtx operand1;
992 rtx operand2;
993{
994 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (MINUS, DFmode, operand1, operand2));
995}
996
997rtx
998gen_subsf3 (operand0, operand1, operand2)
999 rtx operand0;
1000 rtx operand1;
1001 rtx operand2;
1002{
1003 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (MINUS, SFmode, operand1, operand2));
1004}
1005
1006rtx
1007gen_mulhi3 (operand0, operand1, operand2)
1008 rtx operand0;
1009 rtx operand1;
1010 rtx operand2;
1011{
1012 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (MULT, SImode, operand1, operand2));
1013}
1014
1015rtx
1016gen_mulsi3 (operand0, operand1, operand2)
1017 rtx operand0;
1018 rtx operand1;
1019 rtx operand2;
1020{
1021 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (MULT, SImode, operand1, operand2));
1022}
1023
1024rtx
1025gen_muldf3 (operand0, operand1, operand2)
1026 rtx operand0;
1027 rtx operand1;
1028 rtx operand2;
1029{
1030 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (MULT, DFmode, operand1, operand2));
1031}
1032
1033rtx
1034gen_mulsf3 (operand0, operand1, operand2)
1035 rtx operand0;
1036 rtx operand1;
1037 rtx operand2;
1038{
1039 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (MULT, SFmode, operand1, operand2));
1040}
1041
1042rtx
1043gen_divqi3 (operand0, operand1, operand2)
1044 rtx operand0;
1045 rtx operand1;
1046 rtx operand2;
1047{
1048 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (DIV, QImode, operand1, operand2));
1049}
1050
1051rtx
1052gen_udivqi3 (operand0, operand1, operand2)
1053 rtx operand0;
1054 rtx operand1;
1055 rtx operand2;
1056{
1057 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (UDIV, QImode, operand1, operand2));
1058}
1059
1060rtx
1061gen_divdf3 (operand0, operand1, operand2)
1062 rtx operand0;
1063 rtx operand1;
1064 rtx operand2;
1065{
1066 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (DIV, DFmode, operand1, operand2));
1067}
1068
1069rtx
1070gen_divsf3 (operand0, operand1, operand2)
1071 rtx operand0;
1072 rtx operand1;
1073 rtx operand2;
1074{
1075 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (DIV, SFmode, operand1, operand2));
1076}
1077
1078rtx
1079gen_divmodsi4 (operand0, operand1, operand2, operand3)
1080 rtx operand0;
1081 rtx operand1;
1082 rtx operand2;
1083 rtx operand3;
1084{
1085 return gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2,
1086 gen_rtx (SET, VOIDmode, operand0, gen_rtx (DIV, SImode, operand1, operand2)),
1087 gen_rtx (SET, VOIDmode, operand3, gen_rtx (MOD, SImode, operand1, operand2))));
1088}
1089
1090rtx
1091gen_divmodhi4 (operand0, operand1, operand2, operand3)
1092 rtx operand0;
1093 rtx operand1;
1094 rtx operand2;
1095 rtx operand3;
1096{
1097 return gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2,
1098 gen_rtx (SET, VOIDmode, operand0, gen_rtx (DIV, HImode, operand1, operand2)),
1099 gen_rtx (SET, VOIDmode, operand3, gen_rtx (MOD, HImode, operand1, operand2))));
1100}
1101
1102rtx
1103gen_udivmodsi4 (operand0, operand1, operand2, operand3)
1104 rtx operand0;
1105 rtx operand1;
1106 rtx operand2;
1107 rtx operand3;
1108{
1109 return gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2,
1110 gen_rtx (SET, VOIDmode, operand0, gen_rtx (UDIV, SImode, operand1, operand2)),
1111 gen_rtx (SET, VOIDmode, operand3, gen_rtx (UMOD, SImode, operand1, operand2))));
1112}
1113
1114rtx
1115gen_udivmodhi4 (operand0, operand1, operand2, operand3)
1116 rtx operand0;
1117 rtx operand1;
1118 rtx operand2;
1119 rtx operand3;
1120{
1121 return gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2,
1122 gen_rtx (SET, VOIDmode, operand0, gen_rtx (UDIV, HImode, operand1, operand2)),
1123 gen_rtx (SET, VOIDmode, operand3, gen_rtx (UMOD, HImode, operand1, operand2))));
1124}
1125
1126rtx
1127gen_andsi3 (operand0, operand1, operand2)
1128 rtx operand0;
1129 rtx operand1;
1130 rtx operand2;
1131{
1132 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (AND, SImode, operand1, operand2));
1133}
1134
1135rtx
1136gen_andhi3 (operand0, operand1, operand2)
1137 rtx operand0;
1138 rtx operand1;
1139 rtx operand2;
1140{
1141 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (AND, HImode, operand1, operand2));
1142}
1143
1144rtx
1145gen_andqi3 (operand0, operand1, operand2)
1146 rtx operand0;
1147 rtx operand1;
1148 rtx operand2;
1149{
1150 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (AND, QImode, operand1, operand2));
1151}
1152
1153rtx
1154gen_iorsi3 (operand0, operand1, operand2)
1155 rtx operand0;
1156 rtx operand1;
1157 rtx operand2;
1158{
1159 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (IOR, SImode, operand1, operand2));
1160}
1161
1162rtx
1163gen_iorhi3 (operand0, operand1, operand2)
1164 rtx operand0;
1165 rtx operand1;
1166 rtx operand2;
1167{
1168 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (IOR, HImode, operand1, operand2));
1169}
1170
1171rtx
1172gen_iorqi3 (operand0, operand1, operand2)
1173 rtx operand0;
1174 rtx operand1;
1175 rtx operand2;
1176{
1177 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (IOR, QImode, operand1, operand2));
1178}
1179
1180rtx
1181gen_xorsi3 (operand0, operand1, operand2)
1182 rtx operand0;
1183 rtx operand1;
1184 rtx operand2;
1185{
1186 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (XOR, SImode, operand1, operand2));
1187}
1188
1189rtx
1190gen_xorhi3 (operand0, operand1, operand2)
1191 rtx operand0;
1192 rtx operand1;
1193 rtx operand2;
1194{
1195 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (XOR, HImode, operand1, operand2));
1196}
1197
1198rtx
1199gen_xorqi3 (operand0, operand1, operand2)
1200 rtx operand0;
1201 rtx operand1;
1202 rtx operand2;
1203{
1204 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (XOR, QImode, operand1, operand2));
1205}
1206
1207rtx
1208gen_negdi2 (operand0, operand1)
1209 rtx operand0;
1210 rtx operand1;
1211{
1212 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (NEG, DImode, operand1));
1213}
1214
1215rtx
1216gen_negsi2 (operand0, operand1)
1217 rtx operand0;
1218 rtx operand1;
1219{
1220 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (NEG, SImode, operand1));
1221}
1222
1223rtx
1224gen_neghi2 (operand0, operand1)
1225 rtx operand0;
1226 rtx operand1;
1227{
1228 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (NEG, HImode, operand1));
1229}
1230
1231rtx
1232gen_negqi2 (operand0, operand1)
1233 rtx operand0;
1234 rtx operand1;
1235{
1236 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (NEG, QImode, operand1));
1237}
1238
1239rtx
1240gen_negsf2 (operand0, operand1)
1241 rtx operand0;
1242 rtx operand1;
1243{
1244 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (NEG, SFmode, operand1));
1245}
1246
1247rtx
1248gen_negdf2 (operand0, operand1)
1249 rtx operand0;
1250 rtx operand1;
1251{
1252 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (NEG, DFmode, operand1));
1253}
1254
1255rtx
1256gen_abssf2 (operand0, operand1)
1257 rtx operand0;
1258 rtx operand1;
1259{
1260 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (ABS, SFmode, operand1));
1261}
1262
1263rtx
1264gen_absdf2 (operand0, operand1)
1265 rtx operand0;
1266 rtx operand1;
1267{
1268 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (ABS, DFmode, operand1));
1269}
1270
1271rtx
1272gen_sqrtsf2 (operand0, operand1)
1273 rtx operand0;
1274 rtx operand1;
1275{
1276 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (SQRT, SFmode, operand1));
1277}
1278
1279rtx
1280gen_sqrtdf2 (operand0, operand1)
1281 rtx operand0;
1282 rtx operand1;
1283{
1284 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (SQRT, DFmode, operand1));
1285}
1286
1287rtx
1288gen_sindf2 (operand0, operand1)
1289 rtx operand0;
1290 rtx operand1;
1291{
1292 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (UNSPEC, DFmode, gen_rtvec (1,
1293 operand1), 1));
1294}
1295
1296rtx
1297gen_sinsf2 (operand0, operand1)
1298 rtx operand0;
1299 rtx operand1;
1300{
1301 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (UNSPEC, SFmode, gen_rtvec (1,
1302 operand1), 1));
1303}
1304
1305rtx
1306gen_cosdf2 (operand0, operand1)
1307 rtx operand0;
1308 rtx operand1;
1309{
1310 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (UNSPEC, DFmode, gen_rtvec (1,
1311 operand1), 2));
1312}
1313
1314rtx
1315gen_cossf2 (operand0, operand1)
1316 rtx operand0;
1317 rtx operand1;
1318{
1319 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (UNSPEC, SFmode, gen_rtvec (1,
1320 operand1), 2));
1321}
1322
1323rtx
1324gen_one_cmplsi2 (operand0, operand1)
1325 rtx operand0;
1326 rtx operand1;
1327{
1328 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (NOT, SImode, operand1));
1329}
1330
1331rtx
1332gen_one_cmplhi2 (operand0, operand1)
1333 rtx operand0;
1334 rtx operand1;
1335{
1336 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (NOT, HImode, operand1));
1337}
1338
1339rtx
1340gen_one_cmplqi2 (operand0, operand1)
1341 rtx operand0;
1342 rtx operand1;
1343{
1344 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (NOT, QImode, operand1));
1345}
1346
1347rtx
1348gen_ashldi3 (operand0, operand1, operand2)
1349 rtx operand0;
1350 rtx operand1;
1351 rtx operand2;
1352{
1353 rtx operands[3];
1354 rtx _val = 0;
1355 start_sequence ();
1356 operands[0] = operand0;
1357 operands[1] = operand1;
1358 operands[2] = operand2;
1359
1360{
1361 if (GET_CODE (operands[2]) != CONST_INT
1362 || ! CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'J'))
1363 {
1364 operands[2] = copy_to_mode_reg (QImode, operands[2]);
1365 emit_insn (gen_ashldi3_non_const_int (operands[0], operands[1],
1366 operands[2]));
1367 }
1368 else
1369 emit_insn (gen_ashldi3_const_int (operands[0], operands[1], operands[2]));
1370
1371 DONE;
1372}
1373 operand0 = operands[0];
1374 operand1 = operands[1];
1375 operand2 = operands[2];
1376 emit_insn (gen_rtx (SET, VOIDmode, operand0, gen_rtx (ASHIFT, DImode, operand1, operand2)));
1377 _done:
1378 _val = gen_sequence ();
1379 _fail:
1380 end_sequence ();
1381 return _val;
1382}
1383
1384rtx
1385gen_ashldi3_const_int (operand0, operand1, operand2)
1386 rtx operand0;
1387 rtx operand1;
1388 rtx operand2;
1389{
1390 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (ASHIFT, DImode, operand1, operand2));
1391}
1392
1393rtx
1394gen_ashldi3_non_const_int (operand0, operand1, operand2)
1395 rtx operand0;
1396 rtx operand1;
1397 rtx operand2;
1398{
1399 return gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2,
1400 gen_rtx (SET, VOIDmode, operand0, gen_rtx (ASHIFT, DImode, operand1, operand2)),
1401 gen_rtx (CLOBBER, VOIDmode, operand2)));
1402}
1403
1404rtx
1405gen_ashlsi3 (operand0, operand1, operand2)
1406 rtx operand0;
1407 rtx operand1;
1408 rtx operand2;
1409{
1410 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (ASHIFT, SImode, operand1, operand2));
1411}
1412
1413rtx
1414gen_ashlhi3 (operand0, operand1, operand2)
1415 rtx operand0;
1416 rtx operand1;
1417 rtx operand2;
1418{
1419 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (ASHIFT, HImode, operand1, operand2));
1420}
1421
1422rtx
1423gen_ashlqi3 (operand0, operand1, operand2)
1424 rtx operand0;
1425 rtx operand1;
1426 rtx operand2;
1427{
1428 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (ASHIFT, QImode, operand1, operand2));
1429}
1430
1431rtx
1432gen_ashrdi3 (operand0, operand1, operand2)
1433 rtx operand0;
1434 rtx operand1;
1435 rtx operand2;
1436{
1437 rtx operands[3];
1438 rtx _val = 0;
1439 start_sequence ();
1440 operands[0] = operand0;
1441 operands[1] = operand1;
1442 operands[2] = operand2;
1443
1444{
1445 if (GET_CODE (operands[2]) != CONST_INT
1446 || ! CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'J'))
1447 {
1448 operands[2] = copy_to_mode_reg (QImode, operands[2]);
1449 emit_insn (gen_ashrdi3_non_const_int (operands[0], operands[1],
1450 operands[2]));
1451 }
1452 else
1453 emit_insn (gen_ashrdi3_const_int (operands[0], operands[1], operands[2]));
1454
1455 DONE;
1456}
1457 operand0 = operands[0];
1458 operand1 = operands[1];
1459 operand2 = operands[2];
1460 emit_insn (gen_rtx (SET, VOIDmode, operand0, gen_rtx (ASHIFTRT, DImode, operand1, operand2)));
1461 _done:
1462 _val = gen_sequence ();
1463 _fail:
1464 end_sequence ();
1465 return _val;
1466}
1467
1468rtx
1469gen_ashrdi3_const_int (operand0, operand1, operand2)
1470 rtx operand0;
1471 rtx operand1;
1472 rtx operand2;
1473{
1474 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (ASHIFTRT, DImode, operand1, operand2));
1475}
1476
1477rtx
1478gen_ashrdi3_non_const_int (operand0, operand1, operand2)
1479 rtx operand0;
1480 rtx operand1;
1481 rtx operand2;
1482{
1483 return gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2,
1484 gen_rtx (SET, VOIDmode, operand0, gen_rtx (ASHIFTRT, DImode, operand1, operand2)),
1485 gen_rtx (CLOBBER, VOIDmode, operand2)));
1486}
1487
1488rtx
1489gen_ashrsi3 (operand0, operand1, operand2)
1490 rtx operand0;
1491 rtx operand1;
1492 rtx operand2;
1493{
1494 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (ASHIFTRT, SImode, operand1, operand2));
1495}
1496
1497rtx
1498gen_ashrhi3 (operand0, operand1, operand2)
1499 rtx operand0;
1500 rtx operand1;
1501 rtx operand2;
1502{
1503 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (ASHIFTRT, HImode, operand1, operand2));
1504}
1505
1506rtx
1507gen_ashrqi3 (operand0, operand1, operand2)
1508 rtx operand0;
1509 rtx operand1;
1510 rtx operand2;
1511{
1512 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (ASHIFTRT, QImode, operand1, operand2));
1513}
1514
1515rtx
1516gen_lshrdi3 (operand0, operand1, operand2)
1517 rtx operand0;
1518 rtx operand1;
1519 rtx operand2;
1520{
1521 rtx operands[3];
1522 rtx _val = 0;
1523 start_sequence ();
1524 operands[0] = operand0;
1525 operands[1] = operand1;
1526 operands[2] = operand2;
1527
1528{
1529 if (GET_CODE (operands[2]) != CONST_INT
1530 || ! CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'J'))
1531 {
1532 operands[2] = copy_to_mode_reg (QImode, operands[2]);
1533 emit_insn (gen_lshrdi3_non_const_int (operands[0], operands[1],
1534 operands[2]));
1535 }
1536 else
1537 emit_insn (gen_lshrdi3_const_int (operands[0], operands[1], operands[2]));
1538
1539 DONE;
1540}
1541 operand0 = operands[0];
1542 operand1 = operands[1];
1543 operand2 = operands[2];
1544 emit_insn (gen_rtx (SET, VOIDmode, operand0, gen_rtx (LSHIFTRT, DImode, operand1, operand2)));
1545 _done:
1546 _val = gen_sequence ();
1547 _fail:
1548 end_sequence ();
1549 return _val;
1550}
1551
1552rtx
1553gen_lshrdi3_const_int (operand0, operand1, operand2)
1554 rtx operand0;
1555 rtx operand1;
1556 rtx operand2;
1557{
1558 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (LSHIFTRT, DImode, operand1, operand2));
1559}
1560
1561rtx
1562gen_lshrdi3_non_const_int (operand0, operand1, operand2)
1563 rtx operand0;
1564 rtx operand1;
1565 rtx operand2;
1566{
1567 return gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2,
1568 gen_rtx (SET, VOIDmode, operand0, gen_rtx (LSHIFTRT, DImode, operand1, operand2)),
1569 gen_rtx (CLOBBER, VOIDmode, operand2)));
1570}
1571
1572rtx
1573gen_lshrsi3 (operand0, operand1, operand2)
1574 rtx operand0;
1575 rtx operand1;
1576 rtx operand2;
1577{
1578 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (LSHIFTRT, SImode, operand1, operand2));
1579}
1580
1581rtx
1582gen_lshrhi3 (operand0, operand1, operand2)
1583 rtx operand0;
1584 rtx operand1;
1585 rtx operand2;
1586{
1587 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (LSHIFTRT, HImode, operand1, operand2));
1588}
1589
1590rtx
1591gen_lshrqi3 (operand0, operand1, operand2)
1592 rtx operand0;
1593 rtx operand1;
1594 rtx operand2;
1595{
1596 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (LSHIFTRT, QImode, operand1, operand2));
1597}
1598
1599rtx
1600gen_rotlsi3 (operand0, operand1, operand2)
1601 rtx operand0;
1602 rtx operand1;
1603 rtx operand2;
1604{
1605 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (ROTATE, SImode, operand1, operand2));
1606}
1607
1608rtx
1609gen_rotlhi3 (operand0, operand1, operand2)
1610 rtx operand0;
1611 rtx operand1;
1612 rtx operand2;
1613{
1614 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (ROTATE, HImode, operand1, operand2));
1615}
1616
1617rtx
1618gen_rotlqi3 (operand0, operand1, operand2)
1619 rtx operand0;
1620 rtx operand1;
1621 rtx operand2;
1622{
1623 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (ROTATE, QImode, operand1, operand2));
1624}
1625
1626rtx
1627gen_rotrsi3 (operand0, operand1, operand2)
1628 rtx operand0;
1629 rtx operand1;
1630 rtx operand2;
1631{
1632 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (ROTATERT, SImode, operand1, operand2));
1633}
1634
1635rtx
1636gen_rotrhi3 (operand0, operand1, operand2)
1637 rtx operand0;
1638 rtx operand1;
1639 rtx operand2;
1640{
1641 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (ROTATERT, HImode, operand1, operand2));
1642}
1643
1644rtx
1645gen_rotrqi3 (operand0, operand1, operand2)
1646 rtx operand0;
1647 rtx operand1;
1648 rtx operand2;
1649{
1650 return gen_rtx (SET, VOIDmode, operand0, gen_rtx (ROTATERT, QImode, operand1, operand2));
1651}
1652
1653rtx
1654gen_seq (operand0)
1655 rtx operand0;
1656{
1657 rtx operand1;
1658 rtx operands[2];
1659 rtx _val = 0;
1660 start_sequence ();
1661 operands[0] = operand0;
1662
1663{
1664 if (TARGET_IEEE_FP
1665 && GET_MODE_CLASS (GET_MODE (i386_compare_op0)) == MODE_FLOAT)
1666 operands[1] = (*i386_compare_gen_eq)(i386_compare_op0, i386_compare_op1);
1667 else
1668 operands[1] = (*i386_compare_gen)(i386_compare_op0, i386_compare_op1);
1669}
1670 operand0 = operands[0];
1671 operand1 = operands[1];
1672 emit (operand1);
1673 emit_insn (gen_rtx (SET, VOIDmode, operand0, gen_rtx (EQ, QImode, cc0_rtx, const0_rtx)));
1674 _done:
1675 _val = gen_sequence ();
1676 _fail:
1677 end_sequence ();
1678 return _val;
1679}
1680
1681rtx
1682gen_sne (operand0)
1683 rtx operand0;
1684{
1685 rtx operand1;
1686 rtx operands[2];
1687 rtx _val = 0;
1688 start_sequence ();
1689 operands[0] = operand0;
1690
1691{
1692 if (TARGET_IEEE_FP
1693 && GET_MODE_CLASS (GET_MODE (i386_compare_op0)) == MODE_FLOAT)
1694 operands[1] = (*i386_compare_gen_eq)(i386_compare_op0, i386_compare_op1);
1695 else
1696 operands[1] = (*i386_compare_gen)(i386_compare_op0, i386_compare_op1);
1697}
1698 operand0 = operands[0];
1699 operand1 = operands[1];
1700 emit (operand1);
1701 emit_insn (gen_rtx (SET, VOIDmode, operand0, gen_rtx (NE, QImode, cc0_rtx, const0_rtx)));
1702 _done:
1703 _val = gen_sequence ();
1704 _fail:
1705 end_sequence ();
1706 return _val;
1707}
1708
1709rtx
1710gen_sgt (operand0)
1711 rtx operand0;
1712{
1713 rtx operand1;
1714 rtx operands[2];
1715 rtx _val = 0;
1716 start_sequence ();
1717 operands[0] = operand0;
1718operands[1] = (*i386_compare_gen)(i386_compare_op0, i386_compare_op1);
1719 operand0 = operands[0];
1720 operand1 = operands[1];
1721 emit (operand1);
1722 emit_insn (gen_rtx (SET, VOIDmode, operand0, gen_rtx (GT, QImode, cc0_rtx, const0_rtx)));
1723 _done:
1724 _val = gen_sequence ();
1725 _fail:
1726 end_sequence ();
1727 return _val;
1728}
1729
1730rtx
1731gen_sgtu (operand0)
1732 rtx operand0;
1733{
1734 rtx operand1;
1735 rtx operands[2];
1736 rtx _val = 0;
1737 start_sequence ();
1738 operands[0] = operand0;
1739operands[1] = (*i386_compare_gen)(i386_compare_op0, i386_compare_op1);
1740 operand0 = operands[0];
1741 operand1 = operands[1];
1742 emit (operand1);
1743 emit_insn (gen_rtx (SET, VOIDmode, operand0, gen_rtx (GTU, QImode, cc0_rtx, const0_rtx)));
1744 _done:
1745 _val = gen_sequence ();
1746 _fail:
1747 end_sequence ();
1748 return _val;
1749}
1750
1751rtx
1752gen_slt (operand0)
1753 rtx operand0;
1754{
1755 rtx operand1;
1756 rtx operands[2];
1757 rtx _val = 0;
1758 start_sequence ();
1759 operands[0] = operand0;
1760operands[1] = (*i386_compare_gen)(i386_compare_op0, i386_compare_op1);
1761 operand0 = operands[0];
1762 operand1 = operands[1];
1763 emit (operand1);
1764 emit_insn (gen_rtx (SET, VOIDmode, operand0, gen_rtx (LT, QImode, cc0_rtx, const0_rtx)));
1765 _done:
1766 _val = gen_sequence ();
1767 _fail:
1768 end_sequence ();
1769 return _val;
1770}
1771
1772rtx
1773gen_sltu (operand0)
1774 rtx operand0;
1775{
1776 rtx operand1;
1777 rtx operands[2];
1778 rtx _val = 0;
1779 start_sequence ();
1780 operands[0] = operand0;
1781operands[1] = (*i386_compare_gen)(i386_compare_op0, i386_compare_op1);
1782 operand0 = operands[0];
1783 operand1 = operands[1];
1784 emit (operand1);
1785 emit_insn (gen_rtx (SET, VOIDmode, operand0, gen_rtx (LTU, QImode, cc0_rtx, const0_rtx)));
1786 _done:
1787 _val = gen_sequence ();
1788 _fail:
1789 end_sequence ();
1790 return _val;
1791}
1792
1793rtx
1794gen_sge (operand0)
1795 rtx operand0;
1796{
1797 rtx operand1;
1798 rtx operands[2];
1799 rtx _val = 0;
1800 start_sequence ();
1801 operands[0] = operand0;
1802operands[1] = (*i386_compare_gen)(i386_compare_op0, i386_compare_op1);
1803 operand0 = operands[0];
1804 operand1 = operands[1];
1805 emit (operand1);
1806 emit_insn (gen_rtx (SET, VOIDmode, operand0, gen_rtx (GE, QImode, cc0_rtx, const0_rtx)));
1807 _done:
1808 _val = gen_sequence ();
1809 _fail:
1810 end_sequence ();
1811 return _val;
1812}
1813
1814rtx
1815gen_sgeu (operand0)
1816 rtx operand0;
1817{
1818 rtx operand1;
1819 rtx operands[2];
1820 rtx _val = 0;
1821 start_sequence ();
1822 operands[0] = operand0;
1823operands[1] = (*i386_compare_gen)(i386_compare_op0, i386_compare_op1);
1824 operand0 = operands[0];
1825 operand1 = operands[1];
1826 emit (operand1);
1827 emit_insn (gen_rtx (SET, VOIDmode, operand0, gen_rtx (GEU, QImode, cc0_rtx, const0_rtx)));
1828 _done:
1829 _val = gen_sequence ();
1830 _fail:
1831 end_sequence ();
1832 return _val;
1833}
1834
1835rtx
1836gen_sle (operand0)
1837 rtx operand0;
1838{
1839 rtx operand1;
1840 rtx operands[2];
1841 rtx _val = 0;
1842 start_sequence ();
1843 operands[0] = operand0;
1844operands[1] = (*i386_compare_gen)(i386_compare_op0, i386_compare_op1);
1845 operand0 = operands[0];
1846 operand1 = operands[1];
1847 emit (operand1);
1848 emit_insn (gen_rtx (SET, VOIDmode, operand0, gen_rtx (LE, QImode, cc0_rtx, const0_rtx)));
1849 _done:
1850 _val = gen_sequence ();
1851 _fail:
1852 end_sequence ();
1853 return _val;
1854}
1855
1856rtx
1857gen_sleu (operand0)
1858 rtx operand0;
1859{
1860 rtx operand1;
1861 rtx operands[2];
1862 rtx _val = 0;
1863 start_sequence ();
1864 operands[0] = operand0;
1865operands[1] = (*i386_compare_gen)(i386_compare_op0, i386_compare_op1);
1866 operand0 = operands[0];
1867 operand1 = operands[1];
1868 emit (operand1);
1869 emit_insn (gen_rtx (SET, VOIDmode, operand0, gen_rtx (LEU, QImode, cc0_rtx, const0_rtx)));
1870 _done:
1871 _val = gen_sequence ();
1872 _fail:
1873 end_sequence ();
1874 return _val;
1875}
1876
1877rtx
1878gen_beq (operand0)
1879 rtx operand0;
1880{
1881 rtx operand1;
1882 rtx operands[2];
1883 rtx _val = 0;
1884 start_sequence ();
1885 operands[0] = operand0;
1886
1887{
1888 if (TARGET_IEEE_FP
1889 && GET_MODE_CLASS (GET_MODE (i386_compare_op0)) == MODE_FLOAT)
1890 operands[1] = (*i386_compare_gen_eq)(i386_compare_op0, i386_compare_op1);
1891 else
1892 operands[1] = (*i386_compare_gen)(i386_compare_op0, i386_compare_op1);
1893}
1894 operand0 = operands[0];
1895 operand1 = operands[1];
1896 emit (operand1);
1897 emit_jump_insn (gen_rtx (SET, VOIDmode, pc_rtx, gen_rtx (IF_THEN_ELSE, VOIDmode, gen_rtx (EQ, VOIDmode, cc0_rtx, const0_rtx), gen_rtx (LABEL_REF, VOIDmode, operand0), pc_rtx)));
1898 _done:
1899 _val = gen_sequence ();
1900 _fail:
1901 end_sequence ();
1902 return _val;
1903}
1904
1905rtx
1906gen_bne (operand0)
1907 rtx operand0;
1908{
1909 rtx operand1;
1910 rtx operands[2];
1911 rtx _val = 0;
1912 start_sequence ();
1913 operands[0] = operand0;
1914
1915{
1916 if (TARGET_IEEE_FP
1917 && GET_MODE_CLASS (GET_MODE (i386_compare_op0)) == MODE_FLOAT)
1918 operands[1] = (*i386_compare_gen_eq)(i386_compare_op0, i386_compare_op1);
1919 else
1920 operands[1] = (*i386_compare_gen)(i386_compare_op0, i386_compare_op1);
1921}
1922 operand0 = operands[0];
1923 operand1 = operands[1];
1924 emit (operand1);
1925 emit_jump_insn (gen_rtx (SET, VOIDmode, pc_rtx, gen_rtx (IF_THEN_ELSE, VOIDmode, gen_rtx (NE, VOIDmode, cc0_rtx, const0_rtx), gen_rtx (LABEL_REF, VOIDmode, operand0), pc_rtx)));
1926 _done:
1927 _val = gen_sequence ();
1928 _fail:
1929 end_sequence ();
1930 return _val;
1931}
1932
1933rtx
1934gen_bgt (operand0)
1935 rtx operand0;
1936{
1937 rtx operand1;
1938 rtx operands[2];
1939 rtx _val = 0;
1940 start_sequence ();
1941 operands[0] = operand0;
1942operands[1] = (*i386_compare_gen)(i386_compare_op0, i386_compare_op1);
1943 operand0 = operands[0];
1944 operand1 = operands[1];
1945 emit (operand1);
1946 emit_jump_insn (gen_rtx (SET, VOIDmode, pc_rtx, gen_rtx (IF_THEN_ELSE, VOIDmode, gen_rtx (GT, VOIDmode, cc0_rtx, const0_rtx), gen_rtx (LABEL_REF, VOIDmode, operand0), pc_rtx)));
1947 _done:
1948 _val = gen_sequence ();
1949 _fail:
1950 end_sequence ();
1951 return _val;
1952}
1953
1954rtx
1955gen_bgtu (operand0)
1956 rtx operand0;
1957{
1958 rtx operand1;
1959 rtx operands[2];
1960 rtx _val = 0;
1961 start_sequence ();
1962 operands[0] = operand0;
1963operands[1] = (*i386_compare_gen)(i386_compare_op0, i386_compare_op1);
1964 operand0 = operands[0];
1965 operand1 = operands[1];
1966 emit (operand1);
1967 emit_jump_insn (gen_rtx (SET, VOIDmode, pc_rtx, gen_rtx (IF_THEN_ELSE, VOIDmode, gen_rtx (GTU, VOIDmode, cc0_rtx, const0_rtx), gen_rtx (LABEL_REF, VOIDmode, operand0), pc_rtx)));
1968 _done:
1969 _val = gen_sequence ();
1970 _fail:
1971 end_sequence ();
1972 return _val;
1973}
1974
1975rtx
1976gen_blt (operand0)
1977 rtx operand0;
1978{
1979 rtx operand1;
1980 rtx operands[2];
1981 rtx _val = 0;
1982 start_sequence ();
1983 operands[0] = operand0;
1984operands[1] = (*i386_compare_gen)(i386_compare_op0, i386_compare_op1);
1985 operand0 = operands[0];
1986 operand1 = operands[1];
1987 emit (operand1);
1988 emit_jump_insn (gen_rtx (SET, VOIDmode, pc_rtx, gen_rtx (IF_THEN_ELSE, VOIDmode, gen_rtx (LT, VOIDmode, cc0_rtx, const0_rtx), gen_rtx (LABEL_REF, VOIDmode, operand0), pc_rtx)));
1989 _done:
1990 _val = gen_sequence ();
1991 _fail:
1992 end_sequence ();
1993 return _val;
1994}
1995
1996rtx
1997gen_bltu (operand0)
1998 rtx operand0;
1999{
2000 rtx operand1;
2001 rtx operands[2];
2002 rtx _val = 0;
2003 start_sequence ();
2004 operands[0] = operand0;
2005operands[1] = (*i386_compare_gen)(i386_compare_op0, i386_compare_op1);
2006 operand0 = operands[0];
2007 operand1 = operands[1];
2008 emit (operand1);
2009 emit_jump_insn (gen_rtx (SET, VOIDmode, pc_rtx, gen_rtx (IF_THEN_ELSE, VOIDmode, gen_rtx (LTU, VOIDmode, cc0_rtx, const0_rtx), gen_rtx (LABEL_REF, VOIDmode, operand0), pc_rtx)));
2010 _done:
2011 _val = gen_sequence ();
2012 _fail:
2013 end_sequence ();
2014 return _val;
2015}
2016
2017rtx
2018gen_bge (operand0)
2019 rtx operand0;
2020{
2021 rtx operand1;
2022 rtx operands[2];
2023 rtx _val = 0;
2024 start_sequence ();
2025 operands[0] = operand0;
2026operands[1] = (*i386_compare_gen)(i386_compare_op0, i386_compare_op1);
2027 operand0 = operands[0];
2028 operand1 = operands[1];
2029 emit (operand1);
2030 emit_jump_insn (gen_rtx (SET, VOIDmode, pc_rtx, gen_rtx (IF_THEN_ELSE, VOIDmode, gen_rtx (GE, VOIDmode, cc0_rtx, const0_rtx), gen_rtx (LABEL_REF, VOIDmode, operand0), pc_rtx)));
2031 _done:
2032 _val = gen_sequence ();
2033 _fail:
2034 end_sequence ();
2035 return _val;
2036}
2037
2038rtx
2039gen_bgeu (operand0)
2040 rtx operand0;
2041{
2042 rtx operand1;
2043 rtx operands[2];
2044 rtx _val = 0;
2045 start_sequence ();
2046 operands[0] = operand0;
2047operands[1] = (*i386_compare_gen)(i386_compare_op0, i386_compare_op1);
2048 operand0 = operands[0];
2049 operand1 = operands[1];
2050 emit (operand1);
2051 emit_jump_insn (gen_rtx (SET, VOIDmode, pc_rtx, gen_rtx (IF_THEN_ELSE, VOIDmode, gen_rtx (GEU, VOIDmode, cc0_rtx, const0_rtx), gen_rtx (LABEL_REF, VOIDmode, operand0), pc_rtx)));
2052 _done:
2053 _val = gen_sequence ();
2054 _fail:
2055 end_sequence ();
2056 return _val;
2057}
2058
2059rtx
2060gen_ble (operand0)
2061 rtx operand0;
2062{
2063 rtx operand1;
2064 rtx operands[2];
2065 rtx _val = 0;
2066 start_sequence ();
2067 operands[0] = operand0;
2068operands[1] = (*i386_compare_gen)(i386_compare_op0, i386_compare_op1);
2069 operand0 = operands[0];
2070 operand1 = operands[1];
2071 emit (operand1);
2072 emit_jump_insn (gen_rtx (SET, VOIDmode, pc_rtx, gen_rtx (IF_THEN_ELSE, VOIDmode, gen_rtx (LE, VOIDmode, cc0_rtx, const0_rtx), gen_rtx (LABEL_REF, VOIDmode, operand0), pc_rtx)));
2073 _done:
2074 _val = gen_sequence ();
2075 _fail:
2076 end_sequence ();
2077 return _val;
2078}
2079
2080rtx
2081gen_bleu (operand0)
2082 rtx operand0;
2083{
2084 rtx operand1;
2085 rtx operands[2];
2086 rtx _val = 0;
2087 start_sequence ();
2088 operands[0] = operand0;
2089operands[1] = (*i386_compare_gen)(i386_compare_op0, i386_compare_op1);
2090 operand0 = operands[0];
2091 operand1 = operands[1];
2092 emit (operand1);
2093 emit_jump_insn (gen_rtx (SET, VOIDmode, pc_rtx, gen_rtx (IF_THEN_ELSE, VOIDmode, gen_rtx (LEU, VOIDmode, cc0_rtx, const0_rtx), gen_rtx (LABEL_REF, VOIDmode, operand0), pc_rtx)));
2094 _done:
2095 _val = gen_sequence ();
2096 _fail:
2097 end_sequence ();
2098 return _val;
2099}
2100
2101rtx
2102gen_jump (operand0)
2103 rtx operand0;
2104{
2105 return gen_rtx (SET, VOIDmode, pc_rtx, gen_rtx (LABEL_REF, VOIDmode, operand0));
2106}
2107
2108rtx
2109gen_indirect_jump (operand0)
2110 rtx operand0;
2111{
2112 return gen_rtx (SET, VOIDmode, pc_rtx, operand0);
2113}
2114
2115rtx
2116gen_casesi (operand0, operand1, operand2, operand3, operand4)
2117 rtx operand0;
2118 rtx operand1;
2119 rtx operand2;
2120 rtx operand3;
2121 rtx operand4;
2122{
2123 rtx operand5;
2124 rtx operands[6];
2125 rtx _val = 0;
2126 start_sequence ();
2127 operands[0] = operand0;
2128 operands[1] = operand1;
2129 operands[2] = operand2;
2130 operands[3] = operand3;
2131 operands[4] = operand4;
2132
2133{
2134 operands[5] = gen_reg_rtx (SImode);
2135 current_function_uses_pic_offset_table = 1;
2136}
2137 operand0 = operands[0];
2138 operand1 = operands[1];
2139 operand2 = operands[2];
2140 operand3 = operands[3];
2141 operand4 = operands[4];
2142 operand5 = operands[5];
2143 emit_insn (gen_rtx (SET, VOIDmode, operand5, gen_rtx (MINUS, SImode, operand0, operand1)));
2144 emit_insn (gen_rtx (SET, VOIDmode, cc0_rtx, gen_rtx (COMPARE, CCmode, operand5, operand2)));
2145 emit_jump_insn (gen_rtx (SET, VOIDmode, pc_rtx, gen_rtx (IF_THEN_ELSE, VOIDmode, gen_rtx (GTU, VOIDmode, cc0_rtx, const0_rtx), gen_rtx (LABEL_REF, VOIDmode, operand4), pc_rtx)));
2146 emit_jump_insn (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2,
2147 gen_rtx (SET, VOIDmode, pc_rtx, gen_rtx (MINUS, SImode, gen_rtx (REG, SImode, 3), gen_rtx (MEM, SImode, gen_rtx (PLUS, SImode, gen_rtx (MULT, SImode, operand5, GEN_INT (4)), gen_rtx (LABEL_REF, VOIDmode, operand3))))),
2148 gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, SImode, 0)))));
2149 _done:
2150 _val = gen_sequence ();
2151 _fail:
2152 end_sequence ();
2153 return _val;
2154}
2155
2156rtx
2157gen_tablejump (operand0, operand1)
2158 rtx operand0;
2159 rtx operand1;
2160{
2161 return gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2,
2162 gen_rtx (SET, VOIDmode, pc_rtx, operand0),
2163 gen_rtx (USE, VOIDmode, gen_rtx (LABEL_REF, VOIDmode, operand1))));
2164}
2165
2166rtx
2167gen_call_pop (operand0, operand1, operand2, operand3)
2168 rtx operand0;
2169 rtx operand1;
2170 rtx operand2;
2171 rtx operand3;
2172{
2173 rtx operands[4];
2174 rtx _val = 0;
2175 start_sequence ();
2176 operands[0] = operand0;
2177 operands[1] = operand1;
2178 operands[2] = operand2;
2179 operands[3] = operand3;
2180
2181{
2182 rtx addr;
2183
2184 if (flag_pic)
2185 current_function_uses_pic_offset_table = 1;
2186
2187 /* With half-pic, force the address into a register. */
2188 addr = XEXP (operands[0], 0);
2189 if (GET_CODE (addr) != REG && HALF_PIC_P () && !CONSTANT_ADDRESS_P (addr))
2190 XEXP (operands[0], 0) = force_reg (Pmode, addr);
2191
2a5f595d 2192 if (! expander_call_insn_operand (operands[0], QImode))
9bf86ebb
PR
2193 operands[0]
2194 = change_address (operands[0], VOIDmode,
2195 copy_to_mode_reg (Pmode, XEXP (operands[0], 0)));
2196}
2197 operand0 = operands[0];
2198 operand1 = operands[1];
2199 operand2 = operands[2];
2200 operand3 = operands[3];
2201 emit_call_insn (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2,
2202 gen_rtx (CALL, VOIDmode, operand0, operand1),
2203 gen_rtx (SET, VOIDmode, gen_rtx (REG, SImode, 7), gen_rtx (PLUS, SImode, gen_rtx (REG, SImode, 7), operand3)))));
2204 _done:
2205 _val = gen_sequence ();
2206 _fail:
2207 end_sequence ();
2208 return _val;
2209}
2210
2211rtx
2212gen_call (operand0, operand1)
2213 rtx operand0;
2214 rtx operand1;
2215{
2216 rtx operands[2];
2217 rtx _val = 0;
2218 start_sequence ();
2219 operands[0] = operand0;
2220 operands[1] = operand1;
2221
2222{
2223 rtx addr;
2224
2225 if (flag_pic)
2226 current_function_uses_pic_offset_table = 1;
2227
2228 /* With half-pic, force the address into a register. */
2229 addr = XEXP (operands[0], 0);
2230 if (GET_CODE (addr) != REG && HALF_PIC_P () && !CONSTANT_ADDRESS_P (addr))
2231 XEXP (operands[0], 0) = force_reg (Pmode, addr);
2232
2a5f595d 2233 if (! expander_call_insn_operand (operands[0], QImode))
9bf86ebb
PR
2234 operands[0]
2235 = change_address (operands[0], VOIDmode,
2236 copy_to_mode_reg (Pmode, XEXP (operands[0], 0)));
2237}
2238 operand0 = operands[0];
2239 operand1 = operands[1];
2240 emit_call_insn (gen_rtx (CALL, VOIDmode, operand0, operand1));
2241 _done:
2242 _val = gen_sequence ();
2243 _fail:
2244 end_sequence ();
2245 return _val;
2246}
2247
2248rtx
2249gen_call_value_pop (operand0, operand1, operand2, operand3, operand4)
2250 rtx operand0;
2251 rtx operand1;
2252 rtx operand2;
2253 rtx operand3;
2254 rtx operand4;
2255{
2256 rtx operands[5];
2257 rtx _val = 0;
2258 start_sequence ();
2259 operands[0] = operand0;
2260 operands[1] = operand1;
2261 operands[2] = operand2;
2262 operands[3] = operand3;
2263 operands[4] = operand4;
2264
2265{
2266 rtx addr;
2267
2268 if (flag_pic)
2269 current_function_uses_pic_offset_table = 1;
2270
2271 /* With half-pic, force the address into a register. */
2272 addr = XEXP (operands[1], 0);
2273 if (GET_CODE (addr) != REG && HALF_PIC_P () && !CONSTANT_ADDRESS_P (addr))
2274 XEXP (operands[1], 0) = force_reg (Pmode, addr);
2275
2a5f595d 2276 if (! expander_call_insn_operand (operands[1], QImode))
9bf86ebb
PR
2277 operands[1]
2278 = change_address (operands[1], VOIDmode,
2279 copy_to_mode_reg (Pmode, XEXP (operands[1], 0)));
2280}
2281 operand0 = operands[0];
2282 operand1 = operands[1];
2283 operand2 = operands[2];
2284 operand3 = operands[3];
2285 operand4 = operands[4];
2286 emit_call_insn (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2,
2287 gen_rtx (SET, VOIDmode, operand0, gen_rtx (CALL, VOIDmode, operand1, operand2)),
2288 gen_rtx (SET, VOIDmode, gen_rtx (REG, SImode, 7), gen_rtx (PLUS, SImode, gen_rtx (REG, SImode, 7), operand4)))));
2289 _done:
2290 _val = gen_sequence ();
2291 _fail:
2292 end_sequence ();
2293 return _val;
2294}
2295
2296rtx
2297gen_call_value (operand0, operand1, operand2)
2298 rtx operand0;
2299 rtx operand1;
2300 rtx operand2;
2301{
2302 rtx operands[3];
2303 rtx _val = 0;
2304 start_sequence ();
2305 operands[0] = operand0;
2306 operands[1] = operand1;
2307 operands[2] = operand2;
2308
2309{
2310 rtx addr;
2311
2312 if (flag_pic)
2313 current_function_uses_pic_offset_table = 1;
2314
2315 /* With half-pic, force the address into a register. */
2316 addr = XEXP (operands[1], 0);
2317 if (GET_CODE (addr) != REG && HALF_PIC_P () && !CONSTANT_ADDRESS_P (addr))
2318 XEXP (operands[1], 0) = force_reg (Pmode, addr);
2319
2a5f595d 2320 if (! expander_call_insn_operand (operands[1], QImode))
9bf86ebb
PR
2321 operands[1]
2322 = change_address (operands[1], VOIDmode,
2323 copy_to_mode_reg (Pmode, XEXP (operands[1], 0)));
2324}
2325 operand0 = operands[0];
2326 operand1 = operands[1];
2327 operand2 = operands[2];
2328 emit_call_insn (gen_rtx (SET, VOIDmode, operand0, gen_rtx (CALL, VOIDmode, operand1, operand2)));
2329 _done:
2330 _val = gen_sequence ();
2331 _fail:
2332 end_sequence ();
2333 return _val;
2334}
2335
2336rtx
2337gen_untyped_call (operand0, operand1, operand2)
2338 rtx operand0;
2339 rtx operand1;
2340 rtx operand2;
2341{
2342 rtx operands[3];
2343 rtx _val = 0;
2344 start_sequence ();
2345 operands[0] = operand0;
2346 operands[1] = operand1;
2347 operands[2] = operand2;
2348
2349{
2350 rtx addr;
2351
2352 if (flag_pic)
2353 current_function_uses_pic_offset_table = 1;
2354
2355 /* With half-pic, force the address into a register. */
2356 addr = XEXP (operands[0], 0);
2357 if (GET_CODE (addr) != REG && HALF_PIC_P () && !CONSTANT_ADDRESS_P (addr))
2358 XEXP (operands[0], 0) = force_reg (Pmode, addr);
2359
2360 operands[1] = change_address (operands[1], DImode, XEXP (operands[1], 0));
2a5f595d 2361 if (! expander_call_insn_operand (operands[1], QImode))
9bf86ebb
PR
2362 operands[1]
2363 = change_address (operands[1], VOIDmode,
2364 copy_to_mode_reg (Pmode, XEXP (operands[1], 0)));
2365}
2366 operand0 = operands[0];
2367 operand1 = operands[1];
2368 operand2 = operands[2];
2369 emit_call_insn (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (3,
2370 gen_rtx (CALL, VOIDmode, operand0, const0_rtx),
2371 operand1,
2372 operand2)));
2373 _done:
2374 _val = gen_sequence ();
2375 _fail:
2376 end_sequence ();
2377 return _val;
2378}
2379
2380rtx
2381gen_untyped_return (operand0, operand1)
2382 rtx operand0;
2383 rtx operand1;
2384{
2385 rtx operands[2];
2386 rtx _val = 0;
2387 start_sequence ();
2388 operands[0] = operand0;
2389 operands[1] = operand1;
2390
2391{
2392 rtx valreg1 = gen_rtx (REG, SImode, 0);
2393 rtx valreg2 = gen_rtx (REG, SImode, 1);
2394 rtx result = operands[0];
2395
2396 /* Restore the FPU state. */
2397 emit_insn (gen_update_return (change_address (result, SImode,
2398 plus_constant (XEXP (result, 0),
2399 8))));
2400
2401 /* Reload the function value registers. */
2402 emit_move_insn (valreg1, change_address (result, SImode, XEXP (result, 0)));
2403 emit_move_insn (valreg2,
2404 change_address (result, SImode,
2405 plus_constant (XEXP (result, 0), 4)));
2406
2407 /* Put USE insns before the return. */
2408 emit_insn (gen_rtx (USE, VOIDmode, valreg1));
2409 emit_insn (gen_rtx (USE, VOIDmode, valreg2));
2410
2411 /* Construct the return. */
2412 expand_null_return ();
2413
2414 DONE;
2415}
2416 operand0 = operands[0];
2417 operand1 = operands[1];
2418 emit (operand0);
2419 emit (operand1);
2420 _done:
2421 _val = gen_sequence ();
2422 _fail:
2423 end_sequence ();
2424 return _val;
2425}
2426
2427rtx
2428gen_update_return (operand0)
2429 rtx operand0;
2430{
2431 return gen_rtx (UNSPEC, SImode, gen_rtvec (1,
2432 operand0), 0);
2433}
2434
2435rtx
2436gen_return ()
2437{
2438 return gen_rtx (RETURN, VOIDmode);
2439}
2440
2441rtx
2442gen_nop ()
2443{
2444 return const0_rtx;
2445}
2446
2447rtx
2448gen_movstrsi (operand0, operand1, operand2, operand3)
2449 rtx operand0;
2450 rtx operand1;
2451 rtx operand2;
2452 rtx operand3;
2453{
2454 rtx operand4;
2455 rtx operand5;
2456 rtx operand6;
2457 rtx operands[7];
2458 rtx _val = 0;
2459 start_sequence ();
2460 operands[0] = operand0;
2461 operands[1] = operand1;
2462 operands[2] = operand2;
2463 operands[3] = operand3;
2464
2465{
2466 rtx addr0, addr1;
2467
2468 if (GET_CODE (operands[2]) != CONST_INT)
2469 FAIL;
2470
2471 addr0 = copy_to_mode_reg (Pmode, XEXP (operands[0], 0));
2472 addr1 = copy_to_mode_reg (Pmode, XEXP (operands[1], 0));
2473
2474 operands[5] = addr0;
2475 operands[6] = addr1;
2476
2477 operands[0] = gen_rtx (MEM, BLKmode, addr0);
2478 operands[1] = gen_rtx (MEM, BLKmode, addr1);
2479}
2480 operand0 = operands[0];
2481 operand1 = operands[1];
2482 operand2 = operands[2];
2483 operand3 = operands[3];
2484 operand4 = operands[4];
2485 operand5 = operands[5];
2486 operand6 = operands[6];
2487 emit (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (6,
2488 gen_rtx (SET, VOIDmode, operand0, operand1),
2489 gen_rtx (USE, VOIDmode, operand2),
2490 gen_rtx (USE, VOIDmode, operand3),
2491 gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, SImode, 0)),
2492 gen_rtx (CLOBBER, VOIDmode, operand5),
2493 gen_rtx (CLOBBER, VOIDmode, operand6))));
2494 _done:
2495 _val = gen_sequence ();
2496 _fail:
2497 end_sequence ();
2498 return _val;
2499}
2500
2501rtx
2502gen_cmpstrsi (operand0, operand1, operand2, operand3, operand4)
2503 rtx operand0;
2504 rtx operand1;
2505 rtx operand2;
2506 rtx operand3;
2507 rtx operand4;
2508{
2509 rtx operand5;
2510 rtx operand6;
2511 rtx operands[7];
2512 rtx _val = 0;
2513 start_sequence ();
2514 operands[0] = operand0;
2515 operands[1] = operand1;
2516 operands[2] = operand2;
2517 operands[3] = operand3;
2518 operands[4] = operand4;
2519
2520{
2521 rtx addr1, addr2;
2522
2523 addr1 = copy_to_mode_reg (Pmode, XEXP (operands[1], 0));
2524 addr2 = copy_to_mode_reg (Pmode, XEXP (operands[2], 0));
2525 operands[3] = copy_to_mode_reg (SImode, operands[3]);
2526
2527 operands[5] = addr1;
2528 operands[6] = addr2;
2529
2530 operands[1] = gen_rtx (MEM, BLKmode, addr1);
2531 operands[2] = gen_rtx (MEM, BLKmode, addr2);
2532
2533}
2534 operand0 = operands[0];
2535 operand1 = operands[1];
2536 operand2 = operands[2];
2537 operand3 = operands[3];
2538 operand4 = operands[4];
2539 operand5 = operands[5];
2540 operand6 = operands[6];
2541 emit (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (6,
2542 gen_rtx (SET, VOIDmode, operand0, gen_rtx (COMPARE, SImode, operand1, operand2)),
2543 gen_rtx (USE, VOIDmode, operand3),
2544 gen_rtx (USE, VOIDmode, operand4),
2545 gen_rtx (CLOBBER, VOIDmode, operand5),
2546 gen_rtx (CLOBBER, VOIDmode, operand6),
2547 gen_rtx (CLOBBER, VOIDmode, operand3))));
2548 _done:
2549 _val = gen_sequence ();
2550 _fail:
2551 end_sequence ();
2552 return _val;
2553}
2554
2555rtx
2556gen_ffssi2 (operand0, operand1)
2557 rtx operand0;
2558 rtx operand1;
2559{
2560 rtx operand2;
83e20160
PR
2561 rtx operand3;
2562 rtx operands[4];
9bf86ebb
PR
2563 rtx _val = 0;
2564 start_sequence ();
2565 operands[0] = operand0;
2566 operands[1] = operand1;
83e20160 2567operands[3] = gen_reg_rtx (SImode);
9bf86ebb
PR
2568 operand0 = operands[0];
2569 operand1 = operands[1];
2570 operand2 = operands[2];
83e20160
PR
2571 operand3 = operands[3];
2572 emit (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2,
2573 gen_rtx (SET, VOIDmode, operand3, gen_rtx (PLUS, SImode, gen_rtx (FFS, SImode, operand1), constm1_rtx)),
2574 gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, SImode, 0)))));
2575 emit_insn (gen_rtx (SET, VOIDmode, operand0, gen_rtx (PLUS, SImode, operand3, const1_rtx)));
9bf86ebb
PR
2576 _done:
2577 _val = gen_sequence ();
2578 _fail:
2579 end_sequence ();
2580 return _val;
2581}
2582
2583rtx
2584gen_ffshi2 (operand0, operand1)
2585 rtx operand0;
2586 rtx operand1;
2587{
2588 rtx operand2;
83e20160
PR
2589 rtx operand3;
2590 rtx operands[4];
9bf86ebb
PR
2591 rtx _val = 0;
2592 start_sequence ();
2593 operands[0] = operand0;
2594 operands[1] = operand1;
83e20160 2595operands[3] = gen_reg_rtx (HImode);
9bf86ebb
PR
2596 operand0 = operands[0];
2597 operand1 = operands[1];
2598 operand2 = operands[2];
83e20160
PR
2599 operand3 = operands[3];
2600 emit (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2,
2601 gen_rtx (SET, VOIDmode, operand3, gen_rtx (PLUS, HImode, gen_rtx (FFS, HImode, operand1), constm1_rtx)),
2602 gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, HImode, 0)))));
2603 emit_insn (gen_rtx (SET, VOIDmode, operand0, gen_rtx (PLUS, HImode, operand3, const1_rtx)));
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PR
2604 _done:
2605 _val = gen_sequence ();
2606 _fail:
2607 end_sequence ();
2608 return _val;
2609}
2610
2611rtx
2612gen_strlensi (operand0, operand1, operand2, operand3)
2613 rtx operand0;
2614 rtx operand1;
2615 rtx operand2;
2616 rtx operand3;
2617{
2618 rtx operand4;
2619 rtx operand5;
2620 rtx operands[6];
2621 rtx _val = 0;
2622 start_sequence ();
2623 operands[0] = operand0;
2624 operands[1] = operand1;
2625 operands[2] = operand2;
2626 operands[3] = operand3;
2627
2628{
2629 operands[1] = copy_to_mode_reg (SImode, XEXP (operands[1], 0));
2630 operands[4] = gen_reg_rtx (SImode);
2631 operands[5] = gen_reg_rtx (SImode);
2632}
2633 operand0 = operands[0];
2634 operand1 = operands[1];
2635 operand2 = operands[2];
2636 operand3 = operands[3];
2637 operand4 = operands[4];
2638 operand5 = operands[5];
2639 emit (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2,
2640 gen_rtx (SET, VOIDmode, operand4, gen_rtx (UNSPEC, SImode, gen_rtvec (3,
2641 gen_rtx (MEM, BLKmode, operand1),
2642 operand2,
2643 operand3), 0)),
2644 gen_rtx (CLOBBER, VOIDmode, operand1))));
2645 emit_insn (gen_rtx (SET, VOIDmode, operand5, gen_rtx (NOT, SImode, operand4)));
2646 emit_insn (gen_rtx (SET, VOIDmode, operand0, gen_rtx (MINUS, SImode, operand5, const1_rtx)));
2647 _done:
2648 _val = gen_sequence ();
2649 _fail:
2650 end_sequence ();
2651 return _val;
2652}
2653
2654
2655
2656void
2657add_clobbers (pattern, insn_code_number)
2658 rtx pattern;
2659 int insn_code_number;
2660{
2661 int i;
2662
2663 switch (insn_code_number)
2664 {
83e20160 2665 case 250:
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PR
2666 case 223:
2667 XVECEXP (pattern, 0, 1) = gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, SImode, 0));
2668 break;
2669
2670 case 72:
2671 case 71:
2672 XVECEXP (pattern, 0, 3) = gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, SImode, 0));
2673 break;
2674
2675 case 68:
2676 case 67:
2677 XVECEXP (pattern, 0, 4) = gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, SImode, 0));
2678 break;
2679
83e20160 2680 case 252:
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PR
2681 case 25:
2682 case 24:
2683 case 23:
2684 case 22:
2685 case 21:
2686 case 20:
2687 case 19:
2688 case 18:
2689 case 17:
2690 case 16:
2691 case 8:
2692 case 6:
2693 XVECEXP (pattern, 0, 1) = gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, HImode, 0));
2694 break;
2695
2696 default:
2697 abort ();
2698 }
2699}
2700
2701void
2702init_mov_optab ()
2703{
2704#ifdef HAVE_movccfpeq
2705 if (HAVE_movccfpeq)
2706 mov_optab->handlers[(int) CCFPEQmode].insn_code = CODE_FOR_movccfpeq;
2707#endif
2708}