Add diclaimer of copyright to _osname() manual page.
[unix-history] / gnu / usr.bin / gcc1 / cc1 / expr.h
CommitLineData
15637ed4
RG
1/* Definitions for code generation pass of GNU compiler.
2 Copyright (C) 1987 Free Software Foundation, Inc.
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 1, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GNU CC; see the file COPYING. If not, write to
18the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19
20
21/* Macros to access the slots of a QUEUED rtx.
22 Here rather than in rtl.h because only the expansion pass
23 should ever encounter a QUEUED. */
24
25/* The variable for which an increment is queued. */
26#define QUEUED_VAR(P) XEXP (P, 0)
27/* If the increment has been emitted, this is the insn
28 that does the increment. It is zero before the increment is emitted. */
29#define QUEUED_INSN(P) XEXP (P, 1)
30/* If a pre-increment copy has been generated, this is the copy
31 (it is a temporary reg). Zero if no copy made yet. */
32#define QUEUED_COPY(P) XEXP (P, 2)
33/* This is the body to use for the insn to do the increment.
34 It is used to emit the increment. */
35#define QUEUED_BODY(P) XEXP (P, 3)
36/* Next QUEUED in the queue. */
37#define QUEUED_NEXT(P) XEXP (P, 4)
38
39/* This is the 4th arg to `expand_expr'.
40 EXPAND_SUM means it is ok to return a PLUS rtx or MULT rtx.
41 EXPND_CONST_ADDRESS means it is ok to return a MEM whose address
42 is a constant that is not a legitimate address. */
43enum expand_modifier {EXPAND_NORMAL, EXPAND_SUM, EXPAND_CONST_ADDRESS};
44
45/* If this is nonzero, we do not bother generating VOLATILE
46 around volatile memory references, and we are willing to
47 output indirect addresses. If cse is to follow, we reject
48 indirect addresses so a useful potential cse is generated;
49 if it is used only once, instruction combination will produce
50 the same indirect address eventually. */
51extern int cse_not_expected;
52
53/* List (chain of EXPR_LISTs) of pseudo-regs of SAVE_EXPRs.
54 So we can mark them all live at the end of the function, if stupid. */
55extern rtx save_expr_regs;
56
57extern int current_function_calls_alloca;
58
59/* This is the offset from the arg pointer to the place where the first
60 anonymous arg can be found, if there is one. */
61extern rtx current_function_arg_offset_rtx;
62
63/* Nonzero means stack pops must not be deferred, and deferred stack
64 pops must not be output. It is nonzero inside a function call,
65 inside a conditional expression, inside a statement expression,
66 and in other cases as well. */
67extern int inhibit_defer_pop;
68
69#define NO_DEFER_POP (inhibit_defer_pop += 1)
70#define OK_DEFER_POP (inhibit_defer_pop -= 1)
71\f
72#ifdef TREE_CODE /* Don't lose if tree.h not included. */
73/* Structure to record the size of a sequence of arguments
74 as the sum of a tree-expression and a constant. */
75
76struct args_size
77{
78 int constant;
79 tree var;
80};
81#endif
82
83/* Add the value of the tree INC to the `struct args_size' TO. */
84
85#define ADD_PARM_SIZE(TO, INC) \
86{ tree inc = (INC); \
87 if (TREE_CODE (inc) == INTEGER_CST) \
88 (TO).constant += TREE_INT_CST_LOW (inc); \
89 else if ((TO).var == 0) \
90 (TO).var = inc; \
91 else \
92 (TO).var = genop (PLUS_EXPR, (TO).var, inc); }
93
94#define SUB_PARM_SIZE(TO, DEC) \
95{ tree dec = (DEC); \
96 if (TREE_CODE (dec) == INTEGER_CST) \
97 (TO).constant -= TREE_INT_CST_LOW (dec); \
98 else if ((TO).var == 0) \
99 (TO).var = genop (MINUS_EXPR, integer_zero_node, dec); \
100 else \
101 (TO).var = genop (MINUS_EXPR, (TO).var, dec); }
102
103/* Convert the implicit sum in a `struct args_size' into an rtx. */
104#define ARGS_SIZE_RTX(SIZE) \
105((SIZE).var == 0 ? gen_rtx (CONST_INT, VOIDmode, (SIZE).constant) \
106 : plus_constant (expand_expr ((SIZE).var, 0, VOIDmode, 0), \
107 (SIZE).constant))
108
109/* Supply a default definition for FUNCTION_ARG_PADDING:
110 usually pad upward, but pad short args downward on big-endian machines. */
111
112enum direction {none, upward, downward}; /* Value has this type. */
113
114#ifndef FUNCTION_ARG_PADDING
115#ifdef BYTES_BIG_ENDIAN
116#define FUNCTION_ARG_PADDING(mode, size) \
117 (((mode) == BLKmode \
118 ? (GET_CODE (size) == CONST_INT \
119 && INTVAL (size) < PARM_BOUNDARY / BITS_PER_UNIT) \
120 : GET_MODE_BITSIZE (mode) < PARM_BOUNDARY) \
121 ? downward : upward)
122#else
123#define FUNCTION_ARG_PADDING(mode, size) upward
124#endif
125#endif
126
127/* Nonzero if type TYPE should be returned in memory
128 (even though its mode is not BLKmode).
129 Most machines can use the following default definition. */
130
131#ifndef RETURN_IN_MEMORY
132#define RETURN_IN_MEMORY(type) 0
133#endif
134\f
135/* Optabs are tables saying how to generate insn bodies
136 for various machine modes and numbers of operands.
137 Each optab applies to one operation.
138 For example, add_optab applies to addition.
139
140 The insn_code slot is the enum insn_code that says how to
141 generate an insn for this operation on a particular machine mode.
142 It is CODE_FOR_nothing if there is no such insn on the target machine.
143
144 The `lib_call' slot is the name of the library function that
145 can be used to perform the operation.
146
147 A few optabs, such as move_optab and cmp_optab, are used
148 by special code. */
149
150/* Everything that uses expr.h needs to define enum insn_code
151 but we don't list it in the Makefile dependencies just for that. */
152#include "insn-codes.h"
153
154typedef struct optab
155{
156 enum rtx_code code;
157 struct {
158 enum insn_code insn_code;
159 char *lib_call;
160 } handlers [NUM_MACHINE_MODES];
161} * optab;
162
163/* Given an enum insn_code, access the function to construct
164 the body of that kind of insn. */
165#define GEN_FCN(CODE) (*insn_gen_function[(int) (CODE)])
166extern rtx (*insn_gen_function[]) ();
167
168extern optab add_optab;
169extern optab sub_optab;
170extern optab smul_optab; /* Signed multiply */
171extern optab umul_optab; /* Unsigned multiply */
172extern optab smul_widen_optab; /* Signed multiply with result
173 one machine mode wider than args */
174extern optab umul_widen_optab;
175extern optab sdiv_optab; /* Signed divide */
176extern optab sdivmod_optab; /* Signed divide-and-remainder in one */
177extern optab udiv_optab;
178extern optab udivmod_optab;
179extern optab smod_optab; /* Signed remainder */
180extern optab umod_optab;
181extern optab flodiv_optab; /* Optab for floating divide. */
182extern optab ftrunc_optab; /* Convert float to integer in float fmt */
183extern optab and_optab; /* Logical and */
184extern optab andcb_optab; /* Logical and with complement of 2nd arg */
185extern optab ior_optab; /* Logical or */
186extern optab xor_optab; /* Logical xor */
187extern optab ashl_optab; /* Arithmetic shift left */
188extern optab ashr_optab; /* Arithmetic shift right */
189extern optab lshl_optab; /* Logical shift left */
190extern optab lshr_optab; /* Logical shift right */
191extern optab rotl_optab; /* Rotate left */
192extern optab rotr_optab; /* Rotate right */
193
194extern optab mov_optab; /* Move instruction. */
195extern optab movstrict_optab; /* Move, preserving high part of register. */
196
197extern optab cmp_optab; /* Compare insn; two operands. */
198extern optab tst_optab; /* tst insn; compare one operand against 0 */
199
200/* Unary operations */
201extern optab neg_optab; /* Negation */
202extern optab abs_optab; /* Abs value */
203extern optab one_cmpl_optab; /* Bitwise not */
204extern optab ffs_optab; /* Find first bit set */
205
206/* Passed to expand_binop and expand_unop to say which options to try to use
207 if the requested operation can't be open-coded on the requisite mode.
208 Either OPTAB_LIB or OPTAB_LIB_WIDEN says try using a library call.
209 Either OPTAB_WIDEN or OPTAB_LIB_WIDEN says try using a wider mode.
210 OPTAB_MUST_WIDEN says try widening and don't try anything else. */
211
212enum optab_methods
213{
214 OPTAB_DIRECT,
215 OPTAB_LIB,
216 OPTAB_WIDEN,
217 OPTAB_LIB_WIDEN,
218 OPTAB_MUST_WIDEN
219};
220\f
221typedef rtx (*rtxfun) ();
222
223/* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
224 gives the gen_function to make a branch to test that condition. */
225
226extern rtxfun bcc_gen_fctn[NUM_RTX_CODE];
227
228/* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
229 gives the gen_function to make a store-condition insn
230 to test that condition. */
231
232extern rtxfun setcc_gen_fctn[NUM_RTX_CODE];
233
234/* Expand a binary operation given optab and rtx operands. */
235rtx expand_binop ();
236
237/* Expand a binary operation with both signed and unsigned forms. */
238rtx sign_expand_binop ();
239
240/* Expand a unary arithmetic operation given optab rtx operand. */
241rtx expand_unop ();
242
243/* Arguments MODE, RTX: return an rtx for the negation of that value.
244 May emit insns. */
245rtx negate_rtx ();
246
247/* Initialize the tables that control conversion between fixed and
248 floating values. */
249void init_fixtab ();
250void init_floattab ();
251
252/* Generate code for a FIX_EXPR. */
253void expand_fix ();
254
255/* Generate code for a FLOAT_EXPR. */
256void expand_float ();
257
258/* Create but don't emit one rtl instruction to add one rtx into another.
259 Modes must match.
260 Likewise for subtraction and for just copying.
261 These do not call protect_from_queue; caller must do so. */
262rtx gen_add2_insn ();
263rtx gen_sub2_insn ();
264rtx gen_move_insn ();
265
266/* Emit one rtl instruction to store zero in specified rtx. */
267void emit_clr_insn ();
268
269/* Emit one rtl insn to store 1 in specified rtx assuming it contains 0. */
270void emit_0_to_1_insn ();
271
272/* Emit one rtl insn to compare two rtx's. */
273void emit_cmp_insn ();
274
275/* Emit some rtl insns to move data between rtx's, converting machine modes.
276 Both modes must be floating or both fixed. */
277void convert_move ();
278
279/* Convert an rtx to specified machine mode and return the result. */
280rtx convert_to_mode ();
281
282/* Emit code to push some arguments and call a library routine,
283 storing the value in a specified place. Calling sequence is
284 complicated. */
285void emit_library_call ();
286
287/* Given an rtx that may include add and multiply operations,
288 generate them as insns and return a pseudo-reg containing the value.
289 Useful after calling expand_expr with 1 as sum_ok. */
290rtx force_operand ();
291
292/* Return an rtx for the size in bytes of the value of an expr. */
293rtx expr_size ();
294
295/* Return an rtx for the sum of an rtx and an integer. */
296rtx plus_constant ();
297
298rtx lookup_static_chain ();
299
300/* Return an rtx like arg but sans any constant terms.
301 Returns the original rtx if it has no constant terms.
302 The constant terms are added and stored via a second arg. */
303rtx eliminate_constant_term ();
304
305/* Convert arg to a valid memory address for specified machine mode,
306 by emitting insns to perform arithmetic if nec. */
307rtx memory_address ();
308
309/* Like `memory_address' but pretent `flag_force_addr' is 0. */
310rtx memory_address_noforce ();
311
312/* Return a memory reference like MEMREF, but with its mode changed
313 to MODE and its address changed to ADDR.
314 (VOIDmode means don't change the mode.
315 NULL for ADDR means don't change the address.) */
316rtx change_address ();
317
318/* Return 1 if two rtx's are equivalent in structure and elements. */
319int rtx_equal_p ();
320
321/* Given rtx, return new rtx whose address won't be affected by
322 any side effects. It has been copied to a new temporary reg. */
323rtx stabilize ();
324
325/* Given an rtx, copy all regs it refers to into new temps
326 and return a modified copy that refers to the new temps. */
327rtx copy_all_regs ();
328
329/* Copy given rtx to a new temp reg and return that. */
330rtx copy_to_reg ();
331
332/* Like copy_to_reg but always make the reg Pmode. */
333rtx copy_addr_to_reg ();
334
335/* Like copy_to_reg but always make the reg the specified mode MODE. */
336rtx copy_to_mode_reg ();
337
338/* Copy given rtx to given temp reg and return that. */
339rtx copy_to_suggested_reg ();
340
341/* Copy a value to a register if it isn't already a register.
342 Args are mode (in case value is a constant) and the value. */
343rtx force_reg ();
344
345/* Return given rtx, copied into a new temp reg if it was in memory. */
346rtx force_not_mem ();
347
348/* Remove some bytes from the stack. An rtx says how many. */
349void adjust_stack ();
350
351/* Add some bytes to the stack. An rtx says how many. */
352void anti_adjust_stack ();
353
354/* Emit code to copy function value to a new temp reg and return that reg. */
355rtx function_value ();
356
357/* Return an rtx that refers to the value returned by a function
358 in its original home. This becomes invalid if any more code is emitted. */
359rtx hard_function_value ();
360
361/* Return an rtx that refers to the value returned by a library call
362 in its original home. This becomes invalid if any more code is emitted. */
363rtx hard_libcall_value ();
364
365/* Emit code to copy function value to a specified place. */
366void copy_function_value ();
367
368/* Given an rtx, return an rtx for a value rounded up to a multiple
369 of STACK_BOUNDARY / BITS_PER_UNIT. */
370rtx round_push ();
371
372rtx store_bit_field ();
373rtx extract_bit_field ();
374rtx expand_shift ();
375rtx expand_bit_and ();
376rtx expand_mult ();
377rtx expand_divmod ();
378rtx expand_mult_add ();
379rtx get_structure_value_addr ();
380rtx expand_stmt_expr ();
381
382void jumpifnot ();
383void jumpif ();
384void do_jump ();
385
386rtx assemble_static_space ();