Commit | Line | Data |
---|---|---|
9bf86ebb PR |
1 | /* Register to Stack convert for GNU compiler. |
2 | Copyright (C) 1992, 1993 Free Software Foundation, Inc. | |
3 | ||
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
19 | ||
20 | /* This pass converts stack-like registers from the "flat register | |
21 | file" model that gcc uses, to a stack convention that the 387 uses. | |
22 | ||
23 | * The form of the input: | |
24 | ||
25 | On input, the function consists of insn that have had their | |
26 | registers fully allocated to a set of "virtual" registers. Note that | |
27 | the word "virtual" is used differently here than elsewhere in gcc: for | |
28 | each virtual stack reg, there is a hard reg, but the mapping between | |
29 | them is not known until this pass is run. On output, hard register | |
30 | numbers have been substituted, and various pop and exchange insns have | |
31 | been emitted. The hard register numbers and the virtual register | |
32 | numbers completely overlap - before this pass, all stack register | |
33 | numbers are virtual, and afterward they are all hard. | |
34 | ||
35 | The virtual registers can be manipulated normally by gcc, and their | |
36 | semantics are the same as for normal registers. After the hard | |
37 | register numbers are substituted, the semantics of an insn containing | |
38 | stack-like regs are not the same as for an insn with normal regs: for | |
39 | instance, it is not safe to delete an insn that appears to be a no-op | |
40 | move. In general, no insn containing hard regs should be changed | |
41 | after this pass is done. | |
42 | ||
43 | * The form of the output: | |
44 | ||
45 | After this pass, hard register numbers represent the distance from | |
46 | the current top of stack to the desired register. A reference to | |
47 | FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1, | |
48 | represents the register just below that, and so forth. Also, REG_DEAD | |
49 | notes indicate whether or not a stack register should be popped. | |
50 | ||
51 | A "swap" insn looks like a parallel of two patterns, where each | |
52 | pattern is a SET: one sets A to B, the other B to A. | |
53 | ||
54 | A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG | |
55 | and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS, | |
56 | will replace the existing stack top, not push a new value. | |
57 | ||
58 | A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose | |
59 | SET_SRC is REG or MEM. | |
60 | ||
61 | The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG | |
62 | appears ambiguous. As a special case, the presence of a REG_DEAD note | |
63 | for FIRST_STACK_REG differentiates between a load insn and a pop. | |
64 | ||
65 | If a REG_DEAD is present, the insn represents a "pop" that discards | |
66 | the top of the register stack. If there is no REG_DEAD note, then the | |
67 | insn represents a "dup" or a push of the current top of stack onto the | |
68 | stack. | |
69 | ||
70 | * Methodology: | |
71 | ||
72 | Existing REG_DEAD and REG_UNUSED notes for stack registers are | |
73 | deleted and recreated from scratch. REG_DEAD is never created for a | |
74 | SET_DEST, only REG_UNUSED. | |
75 | ||
76 | Before life analysis, the mode of each insn is set based on whether | |
77 | or not any stack registers are mentioned within that insn. VOIDmode | |
78 | means that no regs are mentioned anyway, and QImode means that at | |
79 | least one pattern within the insn mentions stack registers. This | |
80 | information is valid until after reg_to_stack returns, and is used | |
81 | from jump_optimize. | |
82 | ||
83 | * asm_operands: | |
84 | ||
85 | There are several rules on the usage of stack-like regs in | |
86 | asm_operands insns. These rules apply only to the operands that are | |
87 | stack-like regs: | |
88 | ||
89 | 1. Given a set of input regs that die in an asm_operands, it is | |
90 | necessary to know which are implicitly popped by the asm, and | |
91 | which must be explicitly popped by gcc. | |
92 | ||
93 | An input reg that is implicitly popped by the asm must be | |
94 | explicitly clobbered, unless it is constrained to match an | |
95 | output operand. | |
96 | ||
97 | 2. For any input reg that is implicitly popped by an asm, it is | |
98 | necessary to know how to adjust the stack to compensate for the pop. | |
99 | If any non-popped input is closer to the top of the reg-stack than | |
100 | the implicitly popped reg, it would not be possible to know what the | |
101 | stack looked like - it's not clear how the rest of the stack "slides | |
102 | up". | |
103 | ||
104 | All implicitly popped input regs must be closer to the top of | |
105 | the reg-stack than any input that is not implicitly popped. | |
106 | ||
107 | 3. It is possible that if an input dies in an insn, reload might | |
108 | use the input reg for an output reload. Consider this example: | |
109 | ||
110 | asm ("foo" : "=t" (a) : "f" (b)); | |
111 | ||
112 | This asm says that input B is not popped by the asm, and that | |
113 | the asm pushes a result onto the reg-stack, ie, the stack is one | |
114 | deeper after the asm than it was before. But, it is possible that | |
115 | reload will think that it can use the same reg for both the input and | |
116 | the output, if input B dies in this insn. | |
117 | ||
118 | If any input operand uses the "f" constraint, all output reg | |
119 | constraints must use the "&" earlyclobber. | |
120 | ||
121 | The asm above would be written as | |
122 | ||
123 | asm ("foo" : "=&t" (a) : "f" (b)); | |
124 | ||
125 | 4. Some operands need to be in particular places on the stack. All | |
126 | output operands fall in this category - there is no other way to | |
127 | know which regs the outputs appear in unless the user indicates | |
128 | this in the constraints. | |
129 | ||
130 | Output operands must specifically indicate which reg an output | |
131 | appears in after an asm. "=f" is not allowed: the operand | |
132 | constraints must select a class with a single reg. | |
133 | ||
134 | 5. Output operands may not be "inserted" between existing stack regs. | |
135 | Since no 387 opcode uses a read/write operand, all output operands | |
136 | are dead before the asm_operands, and are pushed by the asm_operands. | |
137 | It makes no sense to push anywhere but the top of the reg-stack. | |
138 | ||
139 | Output operands must start at the top of the reg-stack: output | |
140 | operands may not "skip" a reg. | |
141 | ||
142 | 6. Some asm statements may need extra stack space for internal | |
143 | calculations. This can be guaranteed by clobbering stack registers | |
144 | unrelated to the inputs and outputs. | |
145 | ||
146 | Here are a couple of reasonable asms to want to write. This asm | |
147 | takes one input, which is internally popped, and produces two outputs. | |
148 | ||
149 | asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp)); | |
150 | ||
151 | This asm takes two inputs, which are popped by the fyl2xp1 opcode, | |
152 | and replaces them with one output. The user must code the "st(1)" | |
153 | clobber for reg-stack.c to know that fyl2xp1 pops both inputs. | |
154 | ||
155 | asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)"); | |
156 | ||
157 | */ | |
158 | \f | |
159 | #include <stdio.h> | |
160 | #include "config.h" | |
161 | #include "tree.h" | |
162 | #include "rtl.h" | |
163 | #include "insn-config.h" | |
164 | #include "regs.h" | |
165 | #include "hard-reg-set.h" | |
166 | #include "flags.h" | |
167 | ||
168 | #ifdef STACK_REGS | |
169 | ||
170 | #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1) | |
171 | ||
172 | /* True if the current function returns a real value. */ | |
173 | static int current_function_returns_real; | |
174 | ||
175 | /* This is the basic stack record. TOP is an index into REG[] such | |
176 | that REG[TOP] is the top of stack. If TOP is -1 the stack is empty. | |
177 | ||
178 | If TOP is -2, REG[] is not yet initialized. Stack initialization | |
179 | consists of placing each live reg in array `reg' and setting `top' | |
180 | appropriately. | |
181 | ||
182 | REG_SET indicates which registers are live. */ | |
183 | ||
184 | typedef struct stack_def | |
185 | { | |
186 | int top; /* index to top stack element */ | |
187 | HARD_REG_SET reg_set; /* set of live registers */ | |
188 | char reg[REG_STACK_SIZE]; /* register - stack mapping */ | |
189 | } *stack; | |
190 | ||
191 | /* highest instruction uid */ | |
192 | static int max_uid = 0; | |
193 | ||
194 | /* Number of basic blocks in the current function. */ | |
195 | static int blocks; | |
196 | ||
197 | /* Element N is first insn in basic block N. | |
198 | This info lasts until we finish compiling the function. */ | |
199 | static rtx *block_begin; | |
200 | ||
201 | /* Element N is last insn in basic block N. | |
202 | This info lasts until we finish compiling the function. */ | |
203 | static rtx *block_end; | |
204 | ||
205 | /* Element N is nonzero if control can drop into basic block N */ | |
206 | static char *block_drops_in; | |
207 | ||
208 | /* Element N says all about the stack at entry block N */ | |
209 | static stack block_stack_in; | |
210 | ||
211 | /* Element N says all about the stack life at the end of block N */ | |
212 | static HARD_REG_SET *block_out_reg_set; | |
213 | ||
214 | /* This is where the BLOCK_NUM values are really stored. This is set | |
215 | up by find_blocks and used there and in life_analysis. It can be used | |
216 | later, but only to look up an insn that is the head or tail of some | |
217 | block. life_analysis and the stack register conversion process can | |
218 | add insns within a block. */ | |
219 | static int *block_number; | |
220 | ||
221 | /* This is the register file for all register after conversion */ | |
222 | static rtx FP_mode_reg[FIRST_PSEUDO_REGISTER][(int) MAX_MACHINE_MODE]; | |
223 | ||
224 | /* Get the basic block number of an insn. See note at block_number | |
225 | definition are validity of this information. */ | |
226 | ||
227 | #define BLOCK_NUM(INSN) \ | |
228 | (((INSN_UID (INSN) > max_uid) \ | |
229 | ? (int *)(abort() , 0) \ | |
230 | : block_number)[INSN_UID (INSN)]) | |
231 | ||
232 | extern rtx gen_jump (); | |
233 | extern rtx gen_movdf (); | |
234 | extern rtx find_regno_note (); | |
235 | extern rtx emit_jump_insn_before (); | |
236 | extern rtx emit_label_after (); | |
237 | ||
238 | /* Forward declarations */ | |
239 | ||
240 | static void find_blocks (); | |
241 | static void stack_reg_life_analysis (); | |
242 | static void change_stack (); | |
243 | static void convert_regs (); | |
244 | static void dump_stack_info (); | |
245 | \f | |
246 | /* Return non-zero if any stack register is mentioned somewhere within PAT. */ | |
247 | ||
248 | int | |
249 | stack_regs_mentioned_p (pat) | |
250 | rtx pat; | |
251 | { | |
252 | register char *fmt; | |
253 | register int i; | |
254 | ||
255 | if (STACK_REG_P (pat)) | |
256 | return 1; | |
257 | ||
258 | fmt = GET_RTX_FORMAT (GET_CODE (pat)); | |
259 | for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) | |
260 | { | |
261 | if (fmt[i] == 'E') | |
262 | { | |
263 | register int j; | |
264 | ||
265 | for (j = XVECLEN (pat, i) - 1; j >= 0; j--) | |
266 | if (stack_regs_mentioned_p (XVECEXP (pat, i, j))) | |
267 | return 1; | |
268 | } | |
269 | else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i))) | |
270 | return 1; | |
271 | } | |
272 | ||
273 | return 0; | |
274 | } | |
275 | \f | |
276 | /* Convert register usage from "flat" register file usage to a "stack | |
277 | register file. FIRST is the first insn in the function, FILE is the | |
278 | dump file, if used. | |
279 | ||
280 | First compute the beginning and end of each basic block. Do a | |
281 | register life analysis on the stack registers, recording the result | |
282 | for the head and tail of each basic block. The convert each insn one | |
283 | by one. Run a last jump_optimize() pass, if optimizing, to eliminate | |
284 | any cross-jumping created when the converter inserts pop insns.*/ | |
285 | ||
286 | void | |
287 | reg_to_stack (first, file) | |
288 | rtx first; | |
289 | FILE *file; | |
290 | { | |
291 | register rtx insn; | |
292 | register int i; | |
293 | int stack_reg_seen = 0; | |
294 | enum machine_mode mode; | |
295 | ||
296 | current_function_returns_real | |
297 | = TREE_CODE (TREE_TYPE (DECL_RESULT (current_function_decl))) == REAL_TYPE; | |
298 | ||
299 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode; | |
300 | mode = GET_MODE_WIDER_MODE (mode)) | |
301 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
302 | FP_mode_reg[i][(int) mode] = gen_rtx (REG, mode, i); | |
303 | ||
304 | /* Count the basic blocks. Also find maximum insn uid. */ | |
305 | { | |
306 | register RTX_CODE prev_code = JUMP_INSN; | |
307 | register RTX_CODE code; | |
308 | ||
309 | max_uid = 0; | |
310 | blocks = 0; | |
311 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
312 | { | |
313 | /* Note that this loop must select the same block boundaries | |
314 | as code in find_blocks. */ | |
315 | ||
316 | if (INSN_UID (insn) > max_uid) | |
317 | max_uid = INSN_UID (insn); | |
318 | ||
319 | code = GET_CODE (insn); | |
320 | ||
321 | if (code == CODE_LABEL | |
322 | || (prev_code != INSN | |
323 | && prev_code != CALL_INSN | |
324 | && prev_code != CODE_LABEL | |
325 | && (code == INSN || code == CALL_INSN || code == JUMP_INSN))) | |
326 | blocks++; | |
327 | ||
328 | /* Remember whether or not this insn mentions an FP regs. | |
329 | Check JUMP_INSNs too, in case someone creates a funny PARALLEL. */ | |
330 | ||
331 | if ((GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN | |
332 | || GET_CODE (insn) == JUMP_INSN) | |
333 | && stack_regs_mentioned_p (PATTERN (insn))) | |
334 | { | |
335 | stack_reg_seen = 1; | |
336 | PUT_MODE (insn, QImode); | |
337 | } | |
338 | else | |
339 | PUT_MODE (insn, VOIDmode); | |
340 | ||
341 | if (code != NOTE) | |
342 | prev_code = code; | |
343 | } | |
344 | } | |
345 | ||
346 | /* If no stack register reference exists in this insn, there isn't | |
347 | anything to convert. */ | |
348 | ||
349 | if (! stack_reg_seen) | |
350 | return; | |
351 | ||
352 | /* If there are stack registers, there must be at least one block. */ | |
353 | ||
354 | if (! blocks) | |
355 | abort (); | |
356 | ||
357 | /* Allocate some tables that last till end of compiling this function | |
358 | and some needed only in find_blocks and life_analysis. */ | |
359 | ||
360 | block_begin = (rtx *) alloca (blocks * sizeof (rtx)); | |
361 | block_end = (rtx *) alloca (blocks * sizeof (rtx)); | |
362 | block_drops_in = (char *) alloca (blocks); | |
363 | ||
364 | block_stack_in = (stack) alloca (blocks * sizeof (struct stack_def)); | |
365 | block_out_reg_set = (HARD_REG_SET *) alloca (blocks * sizeof (HARD_REG_SET)); | |
366 | bzero (block_stack_in, blocks * sizeof (struct stack_def)); | |
367 | bzero (block_out_reg_set, blocks * sizeof (HARD_REG_SET)); | |
368 | ||
369 | block_number = (int *) alloca ((max_uid + 1) * sizeof (int)); | |
370 | ||
371 | find_blocks (first); | |
372 | stack_reg_life_analysis (first); | |
373 | ||
374 | /* Dump the life analysis debug information before jump | |
375 | optimization, as that will destroy the LABEL_REFS we keep the | |
376 | information in. */ | |
377 | ||
378 | if (file) | |
379 | dump_stack_info (file); | |
380 | ||
381 | convert_regs (); | |
382 | ||
383 | if (optimize) | |
384 | jump_optimize (first, 2, 0, 0); | |
385 | } | |
386 | \f | |
387 | /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the | |
388 | label's chain of references, and note which insn contains each | |
389 | reference. */ | |
390 | ||
391 | static void | |
392 | record_label_references (insn, pat) | |
393 | rtx insn, pat; | |
394 | { | |
395 | register enum rtx_code code = GET_CODE (pat); | |
396 | register int i; | |
397 | register char *fmt; | |
398 | ||
399 | if (code == LABEL_REF) | |
400 | { | |
401 | register rtx label = XEXP (pat, 0); | |
402 | register rtx ref; | |
403 | ||
404 | if (GET_CODE (label) != CODE_LABEL) | |
405 | abort (); | |
406 | ||
407 | /* Don't make a duplicate in the code_label's chain. */ | |
408 | ||
409 | for (ref = LABEL_REFS (label); ref != label; ref = LABEL_NEXTREF (ref)) | |
410 | if (CONTAINING_INSN (ref) == insn) | |
411 | return; | |
412 | ||
413 | CONTAINING_INSN (pat) = insn; | |
414 | LABEL_NEXTREF (pat) = LABEL_REFS (label); | |
415 | LABEL_REFS (label) = pat; | |
416 | ||
417 | return; | |
418 | } | |
419 | ||
420 | fmt = GET_RTX_FORMAT (code); | |
421 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
422 | { | |
423 | if (fmt[i] == 'e') | |
424 | record_label_references (insn, XEXP (pat, i)); | |
425 | if (fmt[i] == 'E') | |
426 | { | |
427 | register int j; | |
428 | for (j = 0; j < XVECLEN (pat, i); j++) | |
429 | record_label_references (insn, XVECEXP (pat, i, j)); | |
430 | } | |
431 | } | |
432 | } | |
433 | \f | |
434 | /* Return a pointer to the REG expression within PAT. If PAT is not a | |
435 | REG, possible enclosed by a conversion rtx, return the inner part of | |
436 | PAT that stopped the search. */ | |
437 | ||
438 | static rtx * | |
439 | get_true_reg (pat) | |
440 | rtx *pat; | |
441 | { | |
442 | while (GET_CODE (*pat) == SUBREG | |
443 | || GET_CODE (*pat) == FLOAT | |
444 | || GET_CODE (*pat) == FIX | |
445 | || GET_CODE (*pat) == FLOAT_EXTEND) | |
446 | pat = & XEXP (*pat, 0); | |
447 | ||
448 | return pat; | |
449 | } | |
450 | \f | |
451 | /* Scan the OPERANDS and OPERAND_CONSTRAINTS of an asm_operands. | |
452 | N_OPERANDS is the total number of operands. Return which alternative | |
453 | matched, or -1 is no alternative matches. | |
454 | ||
455 | OPERAND_MATCHES is an array which indicates which operand this | |
456 | operand matches due to the constraints, or -1 if no match is required. | |
457 | If two operands match by coincidence, but are not required to match by | |
458 | the constraints, -1 is returned. | |
459 | ||
460 | OPERAND_CLASS is an array which indicates the smallest class | |
461 | required by the constraints. If the alternative that matches calls | |
462 | for some class `class', and the operand matches a subclass of `class', | |
463 | OPERAND_CLASS is set to `class' as required by the constraints, not to | |
464 | the subclass. If an alternative allows more than one class, | |
465 | OPERAND_CLASS is set to the smallest class that is a union of the | |
466 | allowed classes. */ | |
467 | ||
468 | static int | |
469 | constrain_asm_operands (n_operands, operands, operand_constraints, | |
470 | operand_matches, operand_class) | |
471 | int n_operands; | |
472 | rtx *operands; | |
473 | char **operand_constraints; | |
474 | int *operand_matches; | |
475 | enum reg_class *operand_class; | |
476 | { | |
477 | char **constraints = (char **) alloca (n_operands * sizeof (char *)); | |
478 | char *q; | |
479 | int this_alternative, this_operand; | |
480 | int n_alternatives; | |
481 | int j; | |
482 | ||
483 | for (j = 0; j < n_operands; j++) | |
484 | constraints[j] = operand_constraints[j]; | |
485 | ||
486 | /* Compute the number of alternatives in the operands. reload has | |
487 | already guaranteed that all operands have the same number of | |
488 | alternatives. */ | |
489 | ||
490 | n_alternatives = 1; | |
491 | for (q = constraints[0]; *q; q++) | |
492 | n_alternatives += (*q == ','); | |
493 | ||
494 | this_alternative = 0; | |
495 | while (this_alternative < n_alternatives) | |
496 | { | |
497 | int lose = 0; | |
498 | int i; | |
499 | ||
500 | /* No operands match, no narrow class requirements yet. */ | |
501 | for (i = 0; i < n_operands; i++) | |
502 | { | |
503 | operand_matches[i] = -1; | |
504 | operand_class[i] = NO_REGS; | |
505 | } | |
506 | ||
507 | for (this_operand = 0; this_operand < n_operands; this_operand++) | |
508 | { | |
509 | rtx op = operands[this_operand]; | |
510 | enum machine_mode mode = GET_MODE (op); | |
511 | char *p = constraints[this_operand]; | |
512 | int offset = 0; | |
513 | int win = 0; | |
514 | int c; | |
515 | ||
516 | if (GET_CODE (op) == SUBREG) | |
517 | { | |
518 | if (GET_CODE (SUBREG_REG (op)) == REG | |
519 | && REGNO (SUBREG_REG (op)) < FIRST_PSEUDO_REGISTER) | |
520 | offset = SUBREG_WORD (op); | |
521 | op = SUBREG_REG (op); | |
522 | } | |
523 | ||
524 | /* An empty constraint or empty alternative | |
525 | allows anything which matched the pattern. */ | |
526 | if (*p == 0 || *p == ',') | |
527 | win = 1; | |
528 | ||
529 | while (*p && (c = *p++) != ',') | |
530 | switch (c) | |
531 | { | |
532 | case '=': | |
533 | case '+': | |
534 | case '?': | |
535 | case '&': | |
536 | case '!': | |
537 | case '*': | |
538 | case '%': | |
539 | /* Ignore these. */ | |
540 | break; | |
541 | ||
542 | case '#': | |
543 | /* Ignore rest of this alternative. */ | |
544 | while (*p && *p != ',') p++; | |
545 | break; | |
546 | ||
547 | case '0': | |
548 | case '1': | |
549 | case '2': | |
550 | case '3': | |
551 | case '4': | |
552 | case '5': | |
553 | /* This operand must be the same as a previous one. | |
554 | This kind of constraint is used for instructions such | |
555 | as add when they take only two operands. | |
556 | ||
557 | Note that the lower-numbered operand is passed first. */ | |
558 | ||
559 | if (operands_match_p (operands[c - '0'], | |
560 | operands[this_operand])) | |
561 | { | |
562 | operand_matches[this_operand] = c - '0'; | |
563 | win = 1; | |
564 | } | |
565 | break; | |
566 | ||
567 | case 'p': | |
568 | /* p is used for address_operands. Since this is an asm, | |
569 | just to make sure that the operand is valid for Pmode. */ | |
570 | ||
571 | if (strict_memory_address_p (Pmode, op)) | |
572 | win = 1; | |
573 | break; | |
574 | ||
575 | case 'g': | |
576 | /* Anything goes unless it is a REG and really has a hard reg | |
577 | but the hard reg is not in the class GENERAL_REGS. */ | |
578 | if (GENERAL_REGS == ALL_REGS | |
579 | || GET_CODE (op) != REG | |
580 | || reg_fits_class_p (op, GENERAL_REGS, offset, mode)) | |
581 | { | |
582 | if (GET_CODE (op) == REG) | |
583 | operand_class[this_operand] | |
584 | = reg_class_subunion[(int) operand_class[this_operand]][(int) GENERAL_REGS]; | |
585 | win = 1; | |
586 | } | |
587 | break; | |
588 | ||
589 | case 'r': | |
590 | if (GET_CODE (op) == REG | |
591 | && (GENERAL_REGS == ALL_REGS | |
592 | || reg_fits_class_p (op, GENERAL_REGS, offset, mode))) | |
593 | { | |
594 | operand_class[this_operand] | |
595 | = reg_class_subunion[(int) operand_class[this_operand]][(int) GENERAL_REGS]; | |
596 | win = 1; | |
597 | } | |
598 | break; | |
599 | ||
600 | case 'X': | |
601 | /* This is used for a MATCH_SCRATCH in the cases when we | |
602 | don't actually need anything. So anything goes any time. */ | |
603 | win = 1; | |
604 | break; | |
605 | ||
606 | case 'm': | |
607 | if (GET_CODE (op) == MEM) | |
608 | win = 1; | |
609 | break; | |
610 | ||
611 | case '<': | |
612 | if (GET_CODE (op) == MEM | |
613 | && (GET_CODE (XEXP (op, 0)) == PRE_DEC | |
614 | || GET_CODE (XEXP (op, 0)) == POST_DEC)) | |
615 | win = 1; | |
616 | break; | |
617 | ||
618 | case '>': | |
619 | if (GET_CODE (op) == MEM | |
620 | && (GET_CODE (XEXP (op, 0)) == PRE_INC | |
621 | || GET_CODE (XEXP (op, 0)) == POST_INC)) | |
622 | win = 1; | |
623 | break; | |
624 | ||
625 | case 'E': | |
626 | /* Match any CONST_DOUBLE, but only if | |
627 | we can examine the bits of it reliably. */ | |
628 | if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT | |
629 | || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD) | |
630 | && GET_CODE (op) != VOIDmode && ! flag_pretend_float) | |
631 | break; | |
632 | if (GET_CODE (op) == CONST_DOUBLE) | |
633 | win = 1; | |
634 | break; | |
635 | ||
636 | case 'F': | |
637 | if (GET_CODE (op) == CONST_DOUBLE) | |
638 | win = 1; | |
639 | break; | |
640 | ||
641 | case 'G': | |
642 | case 'H': | |
643 | if (GET_CODE (op) == CONST_DOUBLE | |
644 | && CONST_DOUBLE_OK_FOR_LETTER_P (op, c)) | |
645 | win = 1; | |
646 | break; | |
647 | ||
648 | case 's': | |
649 | if (GET_CODE (op) == CONST_INT | |
650 | || (GET_CODE (op) == CONST_DOUBLE | |
651 | && GET_MODE (op) == VOIDmode)) | |
652 | break; | |
653 | /* Fall through */ | |
654 | case 'i': | |
655 | if (CONSTANT_P (op)) | |
656 | win = 1; | |
657 | break; | |
658 | ||
659 | case 'n': | |
660 | if (GET_CODE (op) == CONST_INT | |
661 | || (GET_CODE (op) == CONST_DOUBLE | |
662 | && GET_MODE (op) == VOIDmode)) | |
663 | win = 1; | |
664 | break; | |
665 | ||
666 | case 'I': | |
667 | case 'J': | |
668 | case 'K': | |
669 | case 'L': | |
670 | case 'M': | |
671 | case 'N': | |
672 | case 'O': | |
673 | case 'P': | |
674 | if (GET_CODE (op) == CONST_INT | |
675 | && CONST_OK_FOR_LETTER_P (INTVAL (op), c)) | |
676 | win = 1; | |
677 | break; | |
678 | ||
679 | #ifdef EXTRA_CONSTRAINT | |
680 | case 'Q': | |
681 | case 'R': | |
682 | case 'S': | |
683 | case 'T': | |
684 | case 'U': | |
685 | if (EXTRA_CONSTRAINT (op, c)) | |
686 | win = 1; | |
687 | break; | |
688 | #endif | |
689 | ||
690 | case 'V': | |
691 | if (GET_CODE (op) == MEM && ! offsettable_memref_p (op)) | |
692 | win = 1; | |
693 | break; | |
694 | ||
695 | case 'o': | |
696 | if (offsettable_memref_p (op)) | |
697 | win = 1; | |
698 | break; | |
699 | ||
700 | default: | |
701 | if (GET_CODE (op) == REG | |
702 | && reg_fits_class_p (op, REG_CLASS_FROM_LETTER (c), | |
703 | offset, mode)) | |
704 | { | |
705 | operand_class[this_operand] | |
706 | = reg_class_subunion[(int)operand_class[this_operand]][(int) REG_CLASS_FROM_LETTER (c)]; | |
707 | win = 1; | |
708 | } | |
709 | } | |
710 | ||
711 | constraints[this_operand] = p; | |
712 | /* If this operand did not win somehow, | |
713 | this alternative loses. */ | |
714 | if (! win) | |
715 | lose = 1; | |
716 | } | |
717 | /* This alternative won; the operands are ok. | |
718 | Change whichever operands this alternative says to change. */ | |
719 | if (! lose) | |
720 | break; | |
721 | ||
722 | this_alternative++; | |
723 | } | |
724 | ||
725 | /* For operands constrained to match another operand, copy the other | |
726 | operand's class to this operand's class. */ | |
727 | for (j = 0; j < n_operands; j++) | |
728 | if (operand_matches[j] >= 0) | |
729 | operand_class[j] = operand_class[operand_matches[j]]; | |
730 | ||
731 | return this_alternative == n_alternatives ? -1 : this_alternative; | |
732 | } | |
733 | \f | |
734 | /* Record the life info of each stack reg in INSN, updating REGSTACK. | |
735 | N_INPUTS is the number of inputs; N_OUTPUTS the outputs. CONSTRAINTS | |
736 | is an array of the constraint strings used in the asm statement. | |
737 | OPERANDS is an array of all operands for the insn, and is assumed to | |
738 | contain all output operands, then all inputs operands. | |
739 | ||
740 | There are many rules that an asm statement for stack-like regs must | |
741 | follow. Those rules are explained at the top of this file: the rule | |
742 | numbers below refer to that explanation. */ | |
743 | ||
744 | static void | |
745 | record_asm_reg_life (insn, regstack, operands, constraints, | |
746 | n_inputs, n_outputs) | |
747 | rtx insn; | |
748 | stack regstack; | |
749 | rtx *operands; | |
750 | char **constraints; | |
751 | int n_inputs, n_outputs; | |
752 | { | |
753 | int i; | |
754 | int n_operands = n_inputs + n_outputs; | |
755 | int first_input = n_outputs; | |
756 | int n_clobbers; | |
757 | int malformed_asm = 0; | |
758 | rtx body = PATTERN (insn); | |
759 | ||
760 | int *operand_matches = (int *) alloca (n_operands * sizeof (int *)); | |
761 | ||
762 | enum reg_class *operand_class | |
763 | = (enum reg_class *) alloca (n_operands * sizeof (enum reg_class *)); | |
764 | ||
765 | int reg_used_as_output[FIRST_PSEUDO_REGISTER]; | |
766 | int implicitly_dies[FIRST_PSEUDO_REGISTER]; | |
767 | ||
768 | rtx *clobber_reg; | |
769 | ||
770 | /* Find out what the constraints require. If no constraint | |
771 | alternative matches, this asm is malformed. */ | |
772 | i = constrain_asm_operands (n_operands, operands, constraints, | |
773 | operand_matches, operand_class); | |
774 | if (i < 0) | |
775 | malformed_asm = 1; | |
776 | ||
777 | /* Strip SUBREGs here to make the following code simpler. */ | |
778 | for (i = 0; i < n_operands; i++) | |
779 | if (GET_CODE (operands[i]) == SUBREG | |
780 | && GET_CODE (SUBREG_REG (operands[i])) == REG) | |
781 | operands[i] = SUBREG_REG (operands[i]); | |
782 | ||
783 | /* Set up CLOBBER_REG. */ | |
784 | ||
785 | n_clobbers = 0; | |
786 | ||
787 | if (GET_CODE (body) == PARALLEL) | |
788 | { | |
789 | clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx *)); | |
790 | ||
791 | for (i = 0; i < XVECLEN (body, 0); i++) | |
792 | if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) | |
793 | { | |
794 | rtx clobber = XVECEXP (body, 0, i); | |
795 | rtx reg = XEXP (clobber, 0); | |
796 | ||
797 | if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) | |
798 | reg = SUBREG_REG (reg); | |
799 | ||
800 | if (STACK_REG_P (reg)) | |
801 | { | |
802 | clobber_reg[n_clobbers] = reg; | |
803 | n_clobbers++; | |
804 | } | |
805 | } | |
806 | } | |
807 | ||
808 | /* Enforce rule #4: Output operands must specifically indicate which | |
809 | reg an output appears in after an asm. "=f" is not allowed: the | |
810 | operand constraints must select a class with a single reg. | |
811 | ||
812 | Also enforce rule #5: Output operands must start at the top of | |
813 | the reg-stack: output operands may not "skip" a reg. */ | |
814 | ||
815 | bzero (reg_used_as_output, sizeof (reg_used_as_output)); | |
816 | for (i = 0; i < n_outputs; i++) | |
817 | if (STACK_REG_P (operands[i])) | |
818 | if (reg_class_size[(int) operand_class[i]] != 1) | |
819 | { | |
820 | error_for_asm | |
821 | (insn, "Output constraint %d must specify a single register", i); | |
822 | malformed_asm = 1; | |
823 | } | |
824 | else | |
825 | reg_used_as_output[REGNO (operands[i])] = 1; | |
826 | ||
827 | ||
828 | /* Search for first non-popped reg. */ | |
829 | for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) | |
830 | if (! reg_used_as_output[i]) | |
831 | break; | |
832 | ||
833 | /* If there are any other popped regs, that's an error. */ | |
834 | for (; i < LAST_STACK_REG + 1; i++) | |
835 | if (reg_used_as_output[i]) | |
836 | break; | |
837 | ||
838 | if (i != LAST_STACK_REG + 1) | |
839 | { | |
840 | error_for_asm (insn, "Output regs must be grouped at top of stack"); | |
841 | malformed_asm = 1; | |
842 | } | |
843 | ||
844 | /* Enforce rule #2: All implicitly popped input regs must be closer | |
845 | to the top of the reg-stack than any input that is not implicitly | |
846 | popped. */ | |
847 | ||
848 | bzero (implicitly_dies, sizeof (implicitly_dies)); | |
849 | for (i = first_input; i < first_input + n_inputs; i++) | |
850 | if (STACK_REG_P (operands[i])) | |
851 | { | |
852 | /* An input reg is implicitly popped if it is tied to an | |
853 | output, or if there is a CLOBBER for it. */ | |
854 | int j; | |
855 | ||
856 | for (j = 0; j < n_clobbers; j++) | |
857 | if (operands_match_p (clobber_reg[j], operands[i])) | |
858 | break; | |
859 | ||
860 | if (j < n_clobbers || operand_matches[i] >= 0) | |
861 | implicitly_dies[REGNO (operands[i])] = 1; | |
862 | } | |
863 | ||
864 | /* Search for first non-popped reg. */ | |
865 | for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) | |
866 | if (! implicitly_dies[i]) | |
867 | break; | |
868 | ||
869 | /* If there are any other popped regs, that's an error. */ | |
870 | for (; i < LAST_STACK_REG + 1; i++) | |
871 | if (implicitly_dies[i]) | |
872 | break; | |
873 | ||
874 | if (i != LAST_STACK_REG + 1) | |
875 | { | |
876 | error_for_asm (insn, | |
877 | "Implicitly popped regs must be grouped at top of stack"); | |
878 | malformed_asm = 1; | |
879 | } | |
880 | ||
881 | /* Enfore rule #3: If any input operand uses the "f" constraint, all | |
882 | output constraints must use the "&" earlyclobber. | |
883 | ||
884 | ??? Detect this more deterministically by having constraint_asm_operands | |
885 | record any earlyclobber. */ | |
886 | ||
887 | for (i = first_input; i < first_input + n_inputs; i++) | |
888 | if (operand_matches[i] == -1) | |
889 | { | |
890 | int j; | |
891 | ||
892 | for (j = 0; j < n_outputs; j++) | |
893 | if (operands_match_p (operands[j], operands[i])) | |
894 | { | |
895 | error_for_asm (insn, | |
896 | "Output operand %d must use `&' constraint", j); | |
897 | malformed_asm = 1; | |
898 | } | |
899 | } | |
900 | ||
901 | if (malformed_asm) | |
902 | { | |
903 | /* Avoid further trouble with this insn. */ | |
904 | PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx); | |
905 | PUT_MODE (insn, VOIDmode); | |
906 | return; | |
907 | } | |
908 | ||
909 | /* Process all outputs */ | |
910 | for (i = 0; i < n_outputs; i++) | |
911 | { | |
912 | rtx op = operands[i]; | |
913 | ||
914 | if (! STACK_REG_P (op)) | |
915 | if (stack_regs_mentioned_p (op)) | |
916 | abort (); | |
917 | else | |
918 | continue; | |
919 | ||
920 | /* Each destination is dead before this insn. If the | |
921 | destination is not used after this insn, record this with | |
922 | REG_UNUSED. */ | |
923 | ||
924 | if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (op))) | |
925 | REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_UNUSED, op, | |
926 | REG_NOTES (insn)); | |
927 | ||
928 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (op)); | |
929 | } | |
930 | ||
931 | /* Process all inputs */ | |
932 | for (i = first_input; i < first_input + n_inputs; i++) | |
933 | { | |
934 | if (! STACK_REG_P (operands[i])) | |
935 | if (stack_regs_mentioned_p (operands[i])) | |
936 | abort (); | |
937 | else | |
938 | continue; | |
939 | ||
940 | /* If an input is dead after the insn, record a death note. | |
941 | But don't record a death note if there is already a death note, | |
942 | or if the input is also an output. */ | |
943 | ||
944 | if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (operands[i])) | |
945 | && operand_matches[i] == -1 | |
946 | && find_regno_note (insn, REG_DEAD, REGNO (operands[i])) == NULL_RTX) | |
947 | REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_DEAD, operands[i], | |
948 | REG_NOTES (insn)); | |
949 | ||
950 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (operands[i])); | |
951 | } | |
952 | } | |
953 | ||
954 | /* Scan PAT, which is part of INSN, and record registers appearing in | |
955 | a SET_DEST in DEST, and other registers in SRC. | |
956 | ||
957 | This function does not know about SET_DESTs that are both input and | |
958 | output (such as ZERO_EXTRACT) - this cannot happen on a 387. */ | |
959 | ||
960 | void | |
961 | record_reg_life_pat (pat, src, dest) | |
962 | rtx pat; | |
963 | HARD_REG_SET *src, *dest; | |
964 | { | |
965 | register char *fmt; | |
966 | register int i; | |
967 | ||
968 | if (STACK_REG_P (pat)) | |
969 | { | |
970 | if (src) | |
971 | SET_HARD_REG_BIT (*src, REGNO (pat)); | |
972 | ||
973 | if (dest) | |
974 | SET_HARD_REG_BIT (*dest, REGNO (pat)); | |
975 | ||
976 | return; | |
977 | } | |
978 | ||
979 | if (GET_CODE (pat) == SET) | |
980 | { | |
981 | record_reg_life_pat (XEXP (pat, 0), NULL_PTR, dest); | |
982 | record_reg_life_pat (XEXP (pat, 1), src, NULL_PTR); | |
983 | return; | |
984 | } | |
985 | ||
986 | /* We don't need to consider either of these cases. */ | |
987 | if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER) | |
988 | return; | |
989 | ||
990 | fmt = GET_RTX_FORMAT (GET_CODE (pat)); | |
991 | for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) | |
992 | { | |
993 | if (fmt[i] == 'E') | |
994 | { | |
995 | register int j; | |
996 | ||
997 | for (j = XVECLEN (pat, i) - 1; j >= 0; j--) | |
998 | record_reg_life_pat (XVECEXP (pat, i, j), src, dest); | |
999 | } | |
1000 | else if (fmt[i] == 'e') | |
1001 | record_reg_life_pat (XEXP (pat, i), src, dest); | |
1002 | } | |
1003 | } | |
1004 | \f | |
1005 | /* Calculate the number of inputs and outputs in BODY, an | |
1006 | asm_operands. N_OPERANDS is the total number of operands, and | |
1007 | N_INPUTS and N_OUTPUTS are pointers to ints into which the results are | |
1008 | placed. */ | |
1009 | ||
1010 | static void | |
1011 | get_asm_operand_lengths (body, n_operands, n_inputs, n_outputs) | |
1012 | rtx body; | |
1013 | int n_operands; | |
1014 | int *n_inputs, *n_outputs; | |
1015 | { | |
1016 | if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS) | |
1017 | *n_inputs = ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body)); | |
1018 | ||
1019 | else if (GET_CODE (body) == ASM_OPERANDS) | |
1020 | *n_inputs = ASM_OPERANDS_INPUT_LENGTH (body); | |
1021 | ||
1022 | else if (GET_CODE (body) == PARALLEL | |
1023 | && GET_CODE (XVECEXP (body, 0, 0)) == SET) | |
1024 | *n_inputs = ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0))); | |
1025 | ||
1026 | else if (GET_CODE (body) == PARALLEL | |
1027 | && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS) | |
1028 | *n_inputs = ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0)); | |
1029 | else | |
1030 | abort (); | |
1031 | ||
1032 | *n_outputs = n_operands - *n_inputs; | |
1033 | } | |
1034 | \f | |
1035 | /* Scan INSN, which is in BLOCK, and record the life & death of stack | |
1036 | registers in REGSTACK. This function is called to process insns from | |
1037 | the last insn in a block to the first. The actual scanning is done in | |
1038 | record_reg_life_pat. | |
1039 | ||
1040 | If a register is live after a CALL_INSN, but is not a value return | |
1041 | register for that CALL_INSN, then code is emitted to initialize that | |
1042 | register. The block_end[] data is kept accurate. | |
1043 | ||
1044 | Existing death and unset notes for stack registers are deleted | |
1045 | before processing the insn. */ | |
1046 | ||
1047 | static void | |
1048 | record_reg_life (insn, block, regstack) | |
1049 | rtx insn; | |
1050 | int block; | |
1051 | stack regstack; | |
1052 | { | |
1053 | rtx note, *note_link; | |
1054 | int n_operands; | |
1055 | ||
1056 | if ((GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN) | |
1057 | || INSN_DELETED_P (insn)) | |
1058 | return; | |
1059 | ||
1060 | /* Strip death notes for stack regs from this insn */ | |
1061 | ||
1062 | note_link = ®_NOTES(insn); | |
1063 | for (note = *note_link; note; note = XEXP (note, 1)) | |
1064 | if (STACK_REG_P (XEXP (note, 0)) | |
1065 | && (REG_NOTE_KIND (note) == REG_DEAD | |
1066 | || REG_NOTE_KIND (note) == REG_UNUSED)) | |
1067 | *note_link = XEXP (note, 1); | |
1068 | else | |
1069 | note_link = &XEXP (note, 1); | |
1070 | ||
1071 | /* Process all patterns in the insn. */ | |
1072 | ||
1073 | n_operands = asm_noperands (PATTERN (insn)); | |
1074 | if (n_operands >= 0) | |
1075 | { | |
1076 | /* This insn is an `asm' with operands. Decode the operands, | |
1077 | decide how many are inputs, and record the life information. */ | |
1078 | ||
1079 | rtx operands[MAX_RECOG_OPERANDS]; | |
1080 | rtx body = PATTERN (insn); | |
1081 | int n_inputs, n_outputs; | |
1082 | char **constraints = (char **) alloca (n_operands * sizeof (char *)); | |
1083 | ||
1084 | decode_asm_operands (body, operands, NULL_PTR, constraints, NULL_PTR); | |
1085 | get_asm_operand_lengths (body, n_operands, &n_inputs, &n_outputs); | |
1086 | record_asm_reg_life (insn, regstack, operands, constraints, | |
1087 | n_inputs, n_outputs); | |
1088 | return; | |
1089 | } | |
1090 | ||
1091 | /* An insn referencing a stack reg has a mode of QImode. */ | |
1092 | if (GET_MODE (insn) == QImode) | |
1093 | { | |
1094 | HARD_REG_SET src, dest; | |
1095 | int regno; | |
1096 | ||
1097 | CLEAR_HARD_REG_SET (src); | |
1098 | CLEAR_HARD_REG_SET (dest); | |
1099 | record_reg_life_pat (PATTERN (insn), &src, &dest); | |
1100 | ||
1101 | for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG; regno++) | |
1102 | if (! TEST_HARD_REG_BIT (regstack->reg_set, regno)) | |
1103 | { | |
1104 | if (TEST_HARD_REG_BIT (src, regno) | |
1105 | && ! TEST_HARD_REG_BIT (dest, regno)) | |
1106 | REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_DEAD, | |
1107 | FP_mode_reg[regno][(int) DFmode], | |
1108 | REG_NOTES (insn)); | |
1109 | else if (TEST_HARD_REG_BIT (dest, regno)) | |
1110 | REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_UNUSED, | |
1111 | FP_mode_reg[regno][(int) DFmode], | |
1112 | REG_NOTES (insn)); | |
1113 | } | |
1114 | ||
1115 | AND_COMPL_HARD_REG_SET (regstack->reg_set, dest); | |
1116 | IOR_HARD_REG_SET (regstack->reg_set, src); | |
1117 | } | |
1118 | ||
1119 | /* There might be a reg that is live after a function call. | |
1120 | Initialize it to zero so that the program does not crash. See comment | |
1121 | towards the end of stack_reg_life_analysis(). */ | |
1122 | ||
1123 | if (GET_CODE (insn) == CALL_INSN) | |
1124 | { | |
1125 | int reg = FIRST_FLOAT_REG; | |
1126 | ||
1127 | /* If a stack reg is mentioned in a CALL_INSN, it must be as the | |
1128 | return value. */ | |
1129 | ||
1130 | if (stack_regs_mentioned_p (PATTERN (insn))) | |
1131 | reg++; | |
1132 | ||
1133 | for (; reg <= LAST_STACK_REG; reg++) | |
1134 | if (TEST_HARD_REG_BIT (regstack->reg_set, reg)) | |
1135 | { | |
1136 | rtx init, pat; | |
1137 | ||
1138 | /* The insn will use virtual register numbers, and so | |
1139 | convert_regs is expected to process these. But BLOCK_NUM | |
1140 | cannot be used on these insns, because they do not appear in | |
1141 | block_number[]. */ | |
1142 | ||
1143 | pat = gen_rtx (SET, VOIDmode, FP_mode_reg[reg][(int) DFmode], | |
1144 | CONST0_RTX (DFmode)); | |
1145 | init = emit_insn_after (pat, insn); | |
1146 | PUT_MODE (init, QImode); | |
1147 | ||
1148 | CLEAR_HARD_REG_BIT (regstack->reg_set, reg); | |
1149 | ||
1150 | /* If the CALL_INSN was the end of a block, move the | |
1151 | block_end to point to the new insn. */ | |
1152 | ||
1153 | if (block_end[block] == insn) | |
1154 | block_end[block] = init; | |
1155 | } | |
1156 | ||
1157 | /* Some regs do not survive a CALL */ | |
1158 | ||
1159 | AND_COMPL_HARD_REG_SET (regstack->reg_set, call_used_reg_set); | |
1160 | } | |
1161 | } | |
1162 | \f | |
1163 | /* Find all basic blocks of the function, which starts with FIRST. | |
1164 | For each JUMP_INSN, build the chain of LABEL_REFS on each CODE_LABEL. */ | |
1165 | ||
1166 | static void | |
1167 | find_blocks (first) | |
1168 | rtx first; | |
1169 | { | |
1170 | register rtx insn; | |
1171 | register int block; | |
1172 | register RTX_CODE prev_code = BARRIER; | |
1173 | register RTX_CODE code; | |
1174 | ||
1175 | /* Record where all the blocks start and end. | |
1176 | Record which basic blocks control can drop in to. */ | |
1177 | ||
1178 | block = -1; | |
1179 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
1180 | { | |
1181 | /* Note that this loop must select the same block boundaries | |
1182 | as code in reg_to_stack. */ | |
1183 | ||
1184 | code = GET_CODE (insn); | |
1185 | ||
1186 | if (code == CODE_LABEL | |
1187 | || (prev_code != INSN | |
1188 | && prev_code != CALL_INSN | |
1189 | && prev_code != CODE_LABEL | |
1190 | && (code == INSN || code == CALL_INSN || code == JUMP_INSN))) | |
1191 | { | |
1192 | block_begin[++block] = insn; | |
1193 | block_end[block] = insn; | |
1194 | block_drops_in[block] = prev_code != BARRIER; | |
1195 | } | |
1196 | else if (code == INSN || code == CALL_INSN || code == JUMP_INSN) | |
1197 | block_end[block] = insn; | |
1198 | ||
1199 | BLOCK_NUM (insn) = block; | |
1200 | ||
1201 | if (code == CODE_LABEL) | |
1202 | LABEL_REFS (insn) = insn; /* delete old chain */ | |
1203 | ||
1204 | if (code != NOTE) | |
1205 | prev_code = code; | |
1206 | } | |
1207 | ||
1208 | if (block + 1 != blocks) | |
1209 | abort (); | |
1210 | ||
1211 | /* generate all label references to the corresponding jump insn */ | |
1212 | for (block = 0; block < blocks; block++) | |
1213 | { | |
1214 | insn = block_end[block]; | |
1215 | ||
1216 | if (GET_CODE (insn) == JUMP_INSN) | |
1217 | record_label_references (insn, PATTERN (insn)); | |
1218 | } | |
1219 | } | |
2a5f595d PR |
1220 | |
1221 | /* If current function returns its result in an fp stack register, | |
1222 | return the register number. Otherwise return -1. */ | |
1223 | ||
1224 | static int | |
1225 | stack_result_p (decl) | |
1226 | tree decl; | |
1227 | { | |
1228 | rtx result = DECL_RTL (DECL_RESULT (decl)); | |
1229 | ||
1230 | if (result != 0 | |
1231 | && !(GET_CODE (result) == REG | |
1232 | && REGNO (result) < FIRST_PSEUDO_REGISTER)) | |
1233 | { | |
1234 | #ifdef FUNCTION_OUTGOING_VALUE | |
1235 | result | |
1236 | = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl); | |
1237 | #else | |
1238 | result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl); | |
1239 | #endif | |
1240 | } | |
1241 | ||
1242 | return STACK_REG_P (result) ? REGNO (result) : -1; | |
1243 | } | |
9bf86ebb PR |
1244 | \f |
1245 | /* Determine the which registers are live at the start of each basic | |
1246 | block of the function whose first insn is FIRST. | |
1247 | ||
1248 | First, if the function returns a real_type, mark the function | |
1249 | return type as live at each return point, as the RTL may not give any | |
1250 | hint that the register is live. | |
1251 | ||
1252 | Then, start with the last block and work back to the first block. | |
1253 | Similarly, work backwards within each block, insn by insn, recording | |
1254 | which regs are die and which are used (and therefore live) in the | |
1255 | hard reg set of block_stack_in[]. | |
1256 | ||
1257 | After processing each basic block, if there is a label at the start | |
1258 | of the block, propagate the live registers to all jumps to this block. | |
1259 | ||
1260 | As a special case, if there are regs live in this block, that are | |
1261 | not live in a block containing a jump to this label, and the block | |
1262 | containing the jump has already been processed, we must propagate this | |
1263 | block's entry register life back to the block containing the jump, and | |
1264 | restart life analysis from there. | |
1265 | ||
1266 | In the worst case, this function may traverse the insns | |
1267 | REG_STACK_SIZE times. This is necessary, since a jump towards the end | |
1268 | of the insns may not know that a reg is live at a target that is early | |
1269 | in the insns. So we back up and start over with the new reg live. | |
1270 | ||
1271 | If there are registers that are live at the start of the function, | |
1272 | insns are emitted to initialize these registers. Something similar is | |
1273 | done after CALL_INSNs in record_reg_life. */ | |
1274 | ||
1275 | static void | |
1276 | stack_reg_life_analysis (first) | |
1277 | rtx first; | |
1278 | { | |
1279 | int reg, block; | |
1280 | struct stack_def regstack; | |
1281 | ||
1282 | if (current_function_returns_real | |
2a5f595d | 1283 | && stack_result_p (current_function_decl) >= 0) |
9bf86ebb PR |
1284 | { |
1285 | /* Find all RETURN insns and mark them. */ | |
1286 | ||
2a5f595d | 1287 | int value_regno = stack_result_p (current_function_decl); |
9bf86ebb PR |
1288 | |
1289 | for (block = blocks - 1; block >= 0; block--) | |
1290 | if (GET_CODE (block_end[block]) == JUMP_INSN | |
1291 | && GET_CODE (PATTERN (block_end[block])) == RETURN) | |
1292 | SET_HARD_REG_BIT (block_out_reg_set[block], value_regno); | |
1293 | ||
1294 | /* Mark of the end of last block if we "fall off" the end of the | |
1295 | function into the epilogue. */ | |
1296 | ||
1297 | if (GET_CODE (block_end[blocks-1]) != JUMP_INSN | |
1298 | || GET_CODE (PATTERN (block_end[blocks-1])) == RETURN) | |
1299 | SET_HARD_REG_BIT (block_out_reg_set[blocks-1], value_regno); | |
1300 | } | |
1301 | ||
1302 | /* now scan all blocks backward for stack register use */ | |
1303 | ||
1304 | block = blocks - 1; | |
1305 | while (block >= 0) | |
1306 | { | |
1307 | register rtx insn, prev; | |
1308 | ||
1309 | /* current register status at last instruction */ | |
1310 | ||
1311 | COPY_HARD_REG_SET (regstack.reg_set, block_out_reg_set[block]); | |
1312 | ||
1313 | prev = block_end[block]; | |
1314 | do | |
1315 | { | |
1316 | insn = prev; | |
1317 | prev = PREV_INSN (insn); | |
1318 | ||
1319 | /* If the insn is a CALL_INSN, we need to ensure that | |
1320 | everything dies. But otherwise don't process unless there | |
1321 | are some stack regs present. */ | |
1322 | ||
1323 | if (GET_MODE (insn) == QImode || GET_CODE (insn) == CALL_INSN) | |
1324 | record_reg_life (insn, block, ®stack); | |
1325 | ||
1326 | } while (insn != block_begin[block]); | |
1327 | ||
1328 | /* Set the state at the start of the block. Mark that no | |
1329 | register mapping information known yet. */ | |
1330 | ||
1331 | COPY_HARD_REG_SET (block_stack_in[block].reg_set, regstack.reg_set); | |
1332 | block_stack_in[block].top = -2; | |
1333 | ||
1334 | /* If there is a label, propagate our register life to all jumps | |
1335 | to this label. */ | |
1336 | ||
1337 | if (GET_CODE (insn) == CODE_LABEL) | |
1338 | { | |
1339 | register rtx label; | |
1340 | int must_restart = 0; | |
1341 | ||
1342 | for (label = LABEL_REFS (insn); label != insn; | |
1343 | label = LABEL_NEXTREF (label)) | |
1344 | { | |
1345 | int jump_block = BLOCK_NUM (CONTAINING_INSN (label)); | |
1346 | ||
1347 | if (jump_block < block) | |
1348 | IOR_HARD_REG_SET (block_out_reg_set[jump_block], | |
1349 | block_stack_in[block].reg_set); | |
1350 | else | |
1351 | { | |
1352 | /* The block containing the jump has already been | |
1353 | processed. If there are registers that were not known | |
1354 | to be live then, but are live now, we must back up | |
1355 | and restart life analysis from that point with the new | |
1356 | life information. */ | |
1357 | ||
1358 | GO_IF_HARD_REG_SUBSET (block_stack_in[block].reg_set, | |
1359 | block_out_reg_set[jump_block], | |
1360 | win); | |
1361 | ||
1362 | IOR_HARD_REG_SET (block_out_reg_set[jump_block], | |
1363 | block_stack_in[block].reg_set); | |
1364 | ||
1365 | block = jump_block; | |
1366 | must_restart = 1; | |
1367 | ||
1368 | win: | |
1369 | ; | |
1370 | } | |
1371 | } | |
1372 | if (must_restart) | |
1373 | continue; | |
1374 | } | |
1375 | ||
1376 | if (block_drops_in[block]) | |
1377 | IOR_HARD_REG_SET (block_out_reg_set[block-1], | |
1378 | block_stack_in[block].reg_set); | |
1379 | ||
1380 | block -= 1; | |
1381 | } | |
1382 | ||
1383 | { | |
1384 | /* If any reg is live at the start of the first block of a | |
1385 | function, then we must guarantee that the reg holds some value by | |
1386 | generating our own "load" of that register. Otherwise a 387 would | |
1387 | fault trying to access an empty register. */ | |
1388 | ||
1389 | HARD_REG_SET empty_regs; | |
1390 | CLEAR_HARD_REG_SET (empty_regs); | |
1391 | GO_IF_HARD_REG_SUBSET (block_stack_in[0].reg_set, empty_regs, | |
1392 | no_live_regs); | |
1393 | } | |
1394 | ||
1395 | /* Load zero into each live register. The fact that a register | |
1396 | appears live at the function start does not necessarily imply an error | |
1397 | in the user program: it merely means that we could not determine that | |
1398 | there wasn't such an error, just as -Wunused sometimes gives | |
1399 | "incorrect" warnings. In those cases, these initializations will do | |
1400 | no harm. | |
1401 | ||
1402 | Note that we are inserting virtual register references here: | |
1403 | these insns must be processed by convert_regs later. Also, these | |
1404 | insns will not be in block_number, so BLOCK_NUM() will fail for them. */ | |
1405 | ||
1406 | for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; reg--) | |
1407 | if (TEST_HARD_REG_BIT (block_stack_in[0].reg_set, reg)) | |
1408 | { | |
1409 | rtx init_rtx; | |
1410 | ||
1411 | init_rtx = gen_rtx (SET, VOIDmode, FP_mode_reg[reg][(int) DFmode], | |
1412 | CONST0_RTX (DFmode)); | |
1413 | block_begin[0] = emit_insn_after (init_rtx, first); | |
1414 | PUT_MODE (block_begin[0], QImode); | |
1415 | ||
1416 | CLEAR_HARD_REG_BIT (block_stack_in[0].reg_set, reg); | |
1417 | } | |
1418 | ||
1419 | no_live_regs: | |
1420 | ; | |
1421 | } | |
1422 | \f | |
1423 | /***************************************************************************** | |
1424 | This section deals with stack register substitution, and forms the second | |
1425 | pass over the RTL. | |
1426 | *****************************************************************************/ | |
1427 | ||
1428 | /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for | |
1429 | the desired hard REGNO. */ | |
1430 | ||
1431 | static void | |
1432 | replace_reg (reg, regno) | |
1433 | rtx *reg; | |
1434 | int regno; | |
1435 | { | |
1436 | if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG | |
1437 | || ! STACK_REG_P (*reg)) | |
1438 | abort (); | |
1439 | ||
1440 | if (GET_MODE_CLASS (GET_MODE (*reg)) != MODE_FLOAT) | |
1441 | abort (); | |
1442 | ||
1443 | *reg = FP_mode_reg[regno][(int) GET_MODE (*reg)]; | |
1444 | } | |
1445 | ||
1446 | /* Remove a note of type NOTE, which must be found, for register | |
1447 | number REGNO from INSN. Remove only one such note. */ | |
1448 | ||
1449 | static void | |
1450 | remove_regno_note (insn, note, regno) | |
1451 | rtx insn; | |
1452 | enum reg_note note; | |
1453 | int regno; | |
1454 | { | |
1455 | register rtx *note_link, this; | |
1456 | ||
1457 | note_link = ®_NOTES(insn); | |
1458 | for (this = *note_link; this; this = XEXP (this, 1)) | |
1459 | if (REG_NOTE_KIND (this) == note | |
1460 | && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno) | |
1461 | { | |
1462 | *note_link = XEXP (this, 1); | |
1463 | return; | |
1464 | } | |
1465 | else | |
1466 | note_link = &XEXP (this, 1); | |
1467 | ||
1468 | abort (); | |
1469 | } | |
1470 | ||
1471 | /* Find the hard register number of virtual register REG in REGSTACK. | |
1472 | The hard register number is relative to the top of the stack. -1 is | |
1473 | returned if the register is not found. */ | |
1474 | ||
1475 | static int | |
1476 | get_hard_regnum (regstack, reg) | |
1477 | stack regstack; | |
1478 | rtx reg; | |
1479 | { | |
1480 | int i; | |
1481 | ||
1482 | if (! STACK_REG_P (reg)) | |
1483 | abort (); | |
1484 | ||
1485 | for (i = regstack->top; i >= 0; i--) | |
1486 | if (regstack->reg[i] == REGNO (reg)) | |
1487 | break; | |
1488 | ||
1489 | return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1; | |
1490 | } | |
1491 | ||
1492 | /* Delete INSN from the RTL. Mark the insn, but don't remove it from | |
1493 | the chain of insns. Doing so could confuse block_begin and block_end | |
1494 | if this were the only insn in the block. */ | |
1495 | ||
1496 | static void | |
1497 | delete_insn_for_stacker (insn) | |
1498 | rtx insn; | |
1499 | { | |
1500 | PUT_CODE (insn, NOTE); | |
1501 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
1502 | NOTE_SOURCE_FILE (insn) = 0; | |
1503 | INSN_DELETED_P (insn) = 1; | |
1504 | } | |
1505 | \f | |
1506 | /* Emit an insn to pop virtual register REG before or after INSN. | |
1507 | REGSTACK is the stack state after INSN and is updated to reflect this | |
1508 | pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn | |
1509 | is represented as a SET whose destination is the register to be popped | |
1510 | and source is the top of stack. A death note for the top of stack | |
1511 | cases the movdf pattern to pop. */ | |
1512 | ||
1513 | static rtx | |
1514 | emit_pop_insn (insn, regstack, reg, when) | |
1515 | rtx insn; | |
1516 | stack regstack; | |
1517 | rtx reg; | |
1518 | rtx (*when)(); | |
1519 | { | |
1520 | rtx pop_insn, pop_rtx; | |
1521 | int hard_regno; | |
1522 | ||
1523 | hard_regno = get_hard_regnum (regstack, reg); | |
1524 | ||
1525 | if (hard_regno < FIRST_STACK_REG) | |
1526 | abort (); | |
1527 | ||
1528 | pop_rtx = gen_rtx (SET, VOIDmode, FP_mode_reg[hard_regno][(int) DFmode], | |
1529 | FP_mode_reg[FIRST_STACK_REG][(int) DFmode]); | |
1530 | ||
1531 | pop_insn = (*when) (pop_rtx, insn); | |
1532 | /* ??? This used to be VOIDmode, but that seems wrong. */ | |
1533 | PUT_MODE (pop_insn, QImode); | |
1534 | ||
1535 | REG_NOTES (pop_insn) = gen_rtx (EXPR_LIST, REG_DEAD, | |
1536 | FP_mode_reg[FIRST_STACK_REG][(int) DFmode], | |
1537 | REG_NOTES (pop_insn)); | |
1538 | ||
1539 | regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)] | |
1540 | = regstack->reg[regstack->top]; | |
1541 | regstack->top -= 1; | |
1542 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg)); | |
1543 | ||
1544 | return pop_insn; | |
1545 | } | |
1546 | \f | |
1547 | /* Emit an insn before or after INSN to swap virtual register REG with the | |
1548 | top of stack. WHEN should be `emit_insn_before' or `emit_insn_before' | |
1549 | REGSTACK is the stack state before the swap, and is updated to reflect | |
1550 | the swap. A swap insn is represented as a PARALLEL of two patterns: | |
1551 | each pattern moves one reg to the other. | |
1552 | ||
1553 | If REG is already at the top of the stack, no insn is emitted. */ | |
1554 | ||
1555 | static void | |
1556 | emit_swap_insn (insn, regstack, reg) | |
1557 | rtx insn; | |
1558 | stack regstack; | |
1559 | rtx reg; | |
1560 | { | |
1561 | int hard_regno; | |
1562 | rtx gen_swapdf(); | |
1563 | rtx swap_rtx, swap_insn; | |
1564 | int tmp, other_reg; /* swap regno temps */ | |
1565 | rtx i1; /* the stack-reg insn prior to INSN */ | |
1566 | rtx i1set = NULL_RTX; /* the SET rtx within I1 */ | |
1567 | ||
1568 | hard_regno = get_hard_regnum (regstack, reg); | |
1569 | ||
1570 | if (hard_regno < FIRST_STACK_REG) | |
1571 | abort (); | |
1572 | if (hard_regno == FIRST_STACK_REG) | |
1573 | return; | |
1574 | ||
1575 | other_reg = regstack->top - (hard_regno - FIRST_STACK_REG); | |
1576 | ||
1577 | tmp = regstack->reg[other_reg]; | |
1578 | regstack->reg[other_reg] = regstack->reg[regstack->top]; | |
1579 | regstack->reg[regstack->top] = tmp; | |
1580 | ||
1581 | /* Find the previous insn involving stack regs, but don't go past | |
1582 | any labels, calls or jumps. */ | |
1583 | i1 = prev_nonnote_insn (insn); | |
1584 | while (i1 && GET_CODE (i1) == INSN && GET_MODE (i1) != QImode) | |
1585 | i1 = prev_nonnote_insn (i1); | |
1586 | ||
1587 | if (i1) | |
1588 | i1set = single_set (i1); | |
1589 | ||
1590 | if (i1set) | |
1591 | { | |
1592 | rtx i2; /* the stack-reg insn prior to I1 */ | |
1593 | rtx i1src = *get_true_reg (&SET_SRC (i1set)); | |
1594 | rtx i1dest = *get_true_reg (&SET_DEST (i1set)); | |
1595 | ||
1596 | /* If the previous register stack push was from the reg we are to | |
1597 | swap with, omit the swap. */ | |
1598 | ||
1599 | if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG | |
1600 | && GET_CODE (i1src) == REG && REGNO (i1src) == hard_regno - 1 | |
1601 | && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) | |
1602 | return; | |
1603 | ||
1604 | /* If the previous insn wrote to the reg we are to swap with, | |
1605 | omit the swap. */ | |
1606 | ||
1607 | if (GET_CODE (i1dest) == REG && REGNO (i1dest) == hard_regno | |
1608 | && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG | |
1609 | && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) | |
1610 | return; | |
1611 | } | |
1612 | ||
1613 | if (GET_RTX_CLASS (GET_CODE (i1)) == 'i' && sets_cc0_p (PATTERN (i1))) | |
1614 | { | |
1615 | i1 = next_nonnote_insn (i1); | |
1616 | if (i1 == insn) | |
1617 | abort (); | |
1618 | } | |
1619 | ||
1620 | swap_rtx = gen_swapdf (FP_mode_reg[hard_regno][(int) DFmode], | |
1621 | FP_mode_reg[FIRST_STACK_REG][(int) DFmode]); | |
1622 | swap_insn = emit_insn_after (swap_rtx, i1); | |
1623 | /* ??? This used to be VOIDmode, but that seems wrong. */ | |
1624 | PUT_MODE (swap_insn, QImode); | |
1625 | } | |
1626 | \f | |
1627 | /* Handle a move to or from a stack register in PAT, which is in INSN. | |
1628 | REGSTACK is the current stack. */ | |
1629 | ||
1630 | static void | |
1631 | move_for_stack_reg (insn, regstack, pat) | |
1632 | rtx insn; | |
1633 | stack regstack; | |
1634 | rtx pat; | |
1635 | { | |
1636 | rtx *src = get_true_reg (&SET_SRC (pat)); | |
1637 | rtx *dest = get_true_reg (&SET_DEST (pat)); | |
1638 | rtx note; | |
1639 | ||
1640 | if (STACK_REG_P (*src) && STACK_REG_P (*dest)) | |
1641 | { | |
1642 | /* Write from one stack reg to another. If SRC dies here, then | |
1643 | just change the register mapping and delete the insn. */ | |
1644 | ||
1645 | note = find_regno_note (insn, REG_DEAD, REGNO (*src)); | |
1646 | if (note) | |
1647 | { | |
1648 | int i; | |
1649 | ||
1650 | /* If this is a no-op move, there must not be a REG_DEAD note. */ | |
1651 | if (REGNO (*src) == REGNO (*dest)) | |
1652 | abort (); | |
1653 | ||
1654 | for (i = regstack->top; i >= 0; i--) | |
1655 | if (regstack->reg[i] == REGNO (*src)) | |
1656 | break; | |
1657 | ||
1658 | /* The source must be live, and the dest must be dead. */ | |
1659 | if (i < 0 || get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG) | |
1660 | abort (); | |
1661 | ||
1662 | /* It is possible that the dest is unused after this insn. | |
1663 | If so, just pop the src. */ | |
1664 | ||
1665 | if (find_regno_note (insn, REG_UNUSED, REGNO (*dest))) | |
1666 | { | |
1667 | emit_pop_insn (insn, regstack, *src, emit_insn_after); | |
1668 | ||
1669 | delete_insn_for_stacker (insn); | |
1670 | return; | |
1671 | } | |
1672 | ||
1673 | regstack->reg[i] = REGNO (*dest); | |
1674 | ||
1675 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1676 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src)); | |
1677 | ||
1678 | delete_insn_for_stacker (insn); | |
1679 | ||
1680 | return; | |
1681 | } | |
1682 | ||
1683 | /* The source reg does not die. */ | |
1684 | ||
1685 | /* If this appears to be a no-op move, delete it, or else it | |
1686 | will confuse the machine description output patterns. But if | |
1687 | it is REG_UNUSED, we must pop the reg now, as per-insn processing | |
1688 | for REG_UNUSED will not work for deleted insns. */ | |
1689 | ||
1690 | if (REGNO (*src) == REGNO (*dest)) | |
1691 | { | |
1692 | if (find_regno_note (insn, REG_UNUSED, REGNO (*dest))) | |
1693 | emit_pop_insn (insn, regstack, *dest, emit_insn_after); | |
1694 | ||
1695 | delete_insn_for_stacker (insn); | |
1696 | return; | |
1697 | } | |
1698 | ||
1699 | /* The destination ought to be dead */ | |
1700 | if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG) | |
1701 | abort (); | |
1702 | ||
1703 | replace_reg (src, get_hard_regnum (regstack, *src)); | |
1704 | ||
1705 | regstack->reg[++regstack->top] = REGNO (*dest); | |
1706 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1707 | replace_reg (dest, FIRST_STACK_REG); | |
1708 | } | |
1709 | else if (STACK_REG_P (*src)) | |
1710 | { | |
1711 | /* Save from a stack reg to MEM, or possibly integer reg. Since | |
1712 | only top of stack may be saved, emit an exchange first if | |
1713 | needs be. */ | |
1714 | ||
1715 | emit_swap_insn (insn, regstack, *src); | |
1716 | ||
1717 | note = find_regno_note (insn, REG_DEAD, REGNO (*src)); | |
1718 | if (note) | |
1719 | { | |
1720 | replace_reg (&XEXP (note, 0), FIRST_STACK_REG); | |
1721 | regstack->top--; | |
1722 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src)); | |
1723 | } | |
1724 | ||
1725 | replace_reg (src, FIRST_STACK_REG); | |
1726 | } | |
1727 | else if (STACK_REG_P (*dest)) | |
1728 | { | |
1729 | /* Load from MEM, or possibly integer REG or constant, into the | |
1730 | stack regs. The actual target is always the top of the | |
1731 | stack. The stack mapping is changed to reflect that DEST is | |
1732 | now at top of stack. */ | |
1733 | ||
1734 | /* The destination ought to be dead */ | |
1735 | if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG) | |
1736 | abort (); | |
1737 | ||
1738 | if (regstack->top >= REG_STACK_SIZE) | |
1739 | abort (); | |
1740 | ||
1741 | regstack->reg[++regstack->top] = REGNO (*dest); | |
1742 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1743 | replace_reg (dest, FIRST_STACK_REG); | |
1744 | } | |
1745 | else | |
1746 | abort (); | |
1747 | } | |
1748 | \f | |
1749 | void | |
1750 | swap_rtx_condition (pat) | |
1751 | rtx pat; | |
1752 | { | |
1753 | register char *fmt; | |
1754 | register int i; | |
1755 | ||
1756 | if (GET_RTX_CLASS (GET_CODE (pat)) == '<') | |
1757 | { | |
1758 | PUT_CODE (pat, swap_condition (GET_CODE (pat))); | |
1759 | return; | |
1760 | } | |
1761 | ||
1762 | fmt = GET_RTX_FORMAT (GET_CODE (pat)); | |
1763 | for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) | |
1764 | { | |
1765 | if (fmt[i] == 'E') | |
1766 | { | |
1767 | register int j; | |
1768 | ||
1769 | for (j = XVECLEN (pat, i) - 1; j >= 0; j--) | |
1770 | swap_rtx_condition (XVECEXP (pat, i, j)); | |
1771 | } | |
1772 | else if (fmt[i] == 'e') | |
1773 | swap_rtx_condition (XEXP (pat, i)); | |
1774 | } | |
1775 | } | |
1776 | ||
1777 | /* Handle a comparison. Special care needs to be taken to avoid | |
1778 | causing comparisons that a 387 cannot do correctly, such as EQ. | |
1779 | ||
1780 | Also, a pop insn may need to be emitted. The 387 does have an | |
1781 | `fcompp' insn that can pop two regs, but it is sometimes too expensive | |
1782 | to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to | |
1783 | set up. */ | |
1784 | ||
1785 | static void | |
1786 | compare_for_stack_reg (insn, regstack, pat) | |
1787 | rtx insn; | |
1788 | stack regstack; | |
1789 | rtx pat; | |
1790 | { | |
1791 | rtx *src1, *src2; | |
1792 | rtx src1_note, src2_note; | |
1793 | ||
1794 | src1 = get_true_reg (&XEXP (SET_SRC (pat), 0)); | |
1795 | src2 = get_true_reg (&XEXP (SET_SRC (pat), 1)); | |
1796 | ||
1797 | /* ??? If fxch turns out to be cheaper than fstp, give priority to | |
1798 | registers that die in this insn - move those to stack top first. */ | |
1799 | if (! STACK_REG_P (*src1) | |
1800 | || (STACK_REG_P (*src2) | |
1801 | && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG)) | |
1802 | { | |
1803 | rtx temp, next; | |
1804 | ||
1805 | temp = XEXP (SET_SRC (pat), 0); | |
1806 | XEXP (SET_SRC (pat), 0) = XEXP (SET_SRC (pat), 1); | |
1807 | XEXP (SET_SRC (pat), 1) = temp; | |
1808 | ||
1809 | src1 = get_true_reg (&XEXP (SET_SRC (pat), 0)); | |
1810 | src2 = get_true_reg (&XEXP (SET_SRC (pat), 1)); | |
1811 | ||
1812 | next = next_cc0_user (insn); | |
1813 | if (next == NULL_RTX) | |
1814 | abort (); | |
1815 | ||
1816 | swap_rtx_condition (PATTERN (next)); | |
1817 | INSN_CODE (next) = -1; | |
1818 | INSN_CODE (insn) = -1; | |
1819 | } | |
1820 | ||
1821 | /* We will fix any death note later. */ | |
1822 | ||
1823 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
1824 | ||
1825 | if (STACK_REG_P (*src2)) | |
1826 | src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
1827 | else | |
1828 | src2_note = NULL_RTX; | |
1829 | ||
1830 | emit_swap_insn (insn, regstack, *src1); | |
1831 | ||
1832 | replace_reg (src1, FIRST_STACK_REG); | |
1833 | ||
1834 | if (STACK_REG_P (*src2)) | |
1835 | replace_reg (src2, get_hard_regnum (regstack, *src2)); | |
1836 | ||
1837 | if (src1_note) | |
1838 | { | |
1839 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (XEXP (src1_note, 0))); | |
1840 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
1841 | regstack->top--; | |
1842 | } | |
1843 | ||
1844 | /* If the second operand dies, handle that. But if the operands are | |
1845 | the same stack register, don't bother, because only one death is | |
1846 | needed, and it was just handled. */ | |
1847 | ||
1848 | if (src2_note | |
1849 | && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2) | |
1850 | && REGNO (*src1) == REGNO (*src2))) | |
1851 | { | |
1852 | /* As a special case, two regs may die in this insn if src2 is | |
1853 | next to top of stack and the top of stack also dies. Since | |
1854 | we have already popped src1, "next to top of stack" is really | |
1855 | at top (FIRST_STACK_REG) now. */ | |
1856 | ||
1857 | if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG | |
1858 | && src1_note) | |
1859 | { | |
1860 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (XEXP (src2_note, 0))); | |
1861 | replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); | |
1862 | regstack->top--; | |
1863 | } | |
1864 | else | |
1865 | { | |
1866 | /* The 386 can only represent death of the first operand in | |
1867 | the case handled above. In all other cases, emit a separate | |
1868 | pop and remove the death note from here. */ | |
1869 | ||
1870 | link_cc0_insns (insn); | |
1871 | ||
1872 | remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0))); | |
1873 | ||
1874 | emit_pop_insn (insn, regstack, XEXP (src2_note, 0), | |
1875 | emit_insn_after); | |
1876 | } | |
1877 | } | |
1878 | } | |
1879 | \f | |
1880 | /* Substitute new registers in PAT, which is part of INSN. REGSTACK | |
1881 | is the current register layout. */ | |
1882 | ||
1883 | static void | |
1884 | subst_stack_regs_pat (insn, regstack, pat) | |
1885 | rtx insn; | |
1886 | stack regstack; | |
1887 | rtx pat; | |
1888 | { | |
1889 | rtx *dest, *src; | |
1890 | rtx *src1 = (rtx *) NULL_PTR, *src2; | |
1891 | rtx src1_note, src2_note; | |
1892 | ||
1893 | if (GET_CODE (pat) != SET) | |
1894 | return; | |
1895 | ||
1896 | dest = get_true_reg (&SET_DEST (pat)); | |
1897 | src = get_true_reg (&SET_SRC (pat)); | |
1898 | ||
1899 | /* See if this is a `movM' pattern, and handle elsewhere if so. */ | |
1900 | ||
1901 | if (*dest != cc0_rtx | |
1902 | && (STACK_REG_P (*src) | |
1903 | || (STACK_REG_P (*dest) | |
1904 | && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM | |
1905 | || GET_CODE (*src) == CONST_DOUBLE)))) | |
1906 | move_for_stack_reg (insn, regstack, pat); | |
1907 | else | |
1908 | switch (GET_CODE (SET_SRC (pat))) | |
1909 | { | |
1910 | case COMPARE: | |
1911 | compare_for_stack_reg (insn, regstack, pat); | |
1912 | break; | |
1913 | ||
1914 | case CALL: | |
1915 | regstack->reg[++regstack->top] = REGNO (*dest); | |
1916 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1917 | replace_reg (dest, FIRST_STACK_REG); | |
1918 | break; | |
1919 | ||
1920 | case REG: | |
1921 | /* This is a `tstM2' case. */ | |
1922 | if (*dest != cc0_rtx) | |
1923 | abort (); | |
1924 | ||
1925 | src1 = src; | |
1926 | ||
1927 | /* Fall through. */ | |
1928 | ||
1929 | case FLOAT_TRUNCATE: | |
1930 | case SQRT: | |
1931 | case ABS: | |
1932 | case NEG: | |
1933 | /* These insns only operate on the top of the stack. DEST might | |
1934 | be cc0_rtx if we're processing a tstM pattern. Also, it's | |
1935 | possible that the tstM case results in a REG_DEAD note on the | |
1936 | source. */ | |
1937 | ||
1938 | if (src1 == 0) | |
1939 | src1 = get_true_reg (&XEXP (SET_SRC (pat), 0)); | |
1940 | ||
1941 | emit_swap_insn (insn, regstack, *src1); | |
1942 | ||
1943 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
1944 | ||
1945 | if (STACK_REG_P (*dest)) | |
1946 | replace_reg (dest, FIRST_STACK_REG); | |
1947 | ||
1948 | if (src1_note) | |
1949 | { | |
1950 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
1951 | regstack->top--; | |
1952 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); | |
1953 | } | |
1954 | ||
1955 | replace_reg (src1, FIRST_STACK_REG); | |
1956 | ||
1957 | break; | |
1958 | ||
1959 | case MINUS: | |
1960 | case DIV: | |
1961 | /* On i386, reversed forms of subM3 and divM3 exist for | |
1962 | MODE_FLOAT, so the same code that works for addM3 and mulM3 | |
1963 | can be used. */ | |
1964 | case MULT: | |
1965 | case PLUS: | |
1966 | /* These insns can accept the top of stack as a destination | |
1967 | from a stack reg or mem, or can use the top of stack as a | |
1968 | source and some other stack register (possibly top of stack) | |
1969 | as a destination. */ | |
1970 | ||
1971 | src1 = get_true_reg (&XEXP (SET_SRC (pat), 0)); | |
1972 | src2 = get_true_reg (&XEXP (SET_SRC (pat), 1)); | |
1973 | ||
1974 | /* We will fix any death note later. */ | |
1975 | ||
1976 | if (STACK_REG_P (*src1)) | |
1977 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
1978 | else | |
1979 | src1_note = NULL_RTX; | |
1980 | if (STACK_REG_P (*src2)) | |
1981 | src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
1982 | else | |
1983 | src2_note = NULL_RTX; | |
1984 | ||
1985 | /* If either operand is not a stack register, then the dest | |
1986 | must be top of stack. */ | |
1987 | ||
1988 | if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2)) | |
1989 | emit_swap_insn (insn, regstack, *dest); | |
1990 | else | |
1991 | { | |
1992 | /* Both operands are REG. If neither operand is already | |
1993 | at the top of stack, choose to make the one that is the dest | |
1994 | the new top of stack. */ | |
1995 | ||
1996 | int src1_hard_regnum, src2_hard_regnum; | |
1997 | ||
1998 | src1_hard_regnum = get_hard_regnum (regstack, *src1); | |
1999 | src2_hard_regnum = get_hard_regnum (regstack, *src2); | |
2000 | if (src1_hard_regnum == -1 || src2_hard_regnum == -1) | |
2001 | abort (); | |
2002 | ||
2003 | if (src1_hard_regnum != FIRST_STACK_REG | |
2004 | && src2_hard_regnum != FIRST_STACK_REG) | |
2005 | emit_swap_insn (insn, regstack, *dest); | |
2006 | } | |
2007 | ||
2008 | if (STACK_REG_P (*src1)) | |
2009 | replace_reg (src1, get_hard_regnum (regstack, *src1)); | |
2010 | if (STACK_REG_P (*src2)) | |
2011 | replace_reg (src2, get_hard_regnum (regstack, *src2)); | |
2012 | ||
2013 | if (src1_note) | |
2014 | { | |
2015 | /* If the register that dies is at the top of stack, then | |
2016 | the destination is somewhere else - merely substitute it. | |
2017 | But if the reg that dies is not at top of stack, then | |
2018 | move the top of stack to the dead reg, as though we had | |
2019 | done the insn and then a store-with-pop. */ | |
2020 | ||
2021 | if (REGNO (XEXP (src1_note, 0)) == regstack->reg[regstack->top]) | |
2022 | { | |
2023 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
2024 | replace_reg (dest, get_hard_regnum (regstack, *dest)); | |
2025 | } | |
2026 | else | |
2027 | { | |
2028 | int regno = get_hard_regnum (regstack, XEXP (src1_note, 0)); | |
2029 | ||
2030 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
2031 | replace_reg (dest, regno); | |
2032 | ||
2033 | regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] | |
2034 | = regstack->reg[regstack->top]; | |
2035 | } | |
2036 | ||
2037 | CLEAR_HARD_REG_BIT (regstack->reg_set, | |
2038 | REGNO (XEXP (src1_note, 0))); | |
2039 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
2040 | regstack->top--; | |
2041 | } | |
2042 | else if (src2_note) | |
2043 | { | |
2044 | if (REGNO (XEXP (src2_note, 0)) == regstack->reg[regstack->top]) | |
2045 | { | |
2046 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
2047 | replace_reg (dest, get_hard_regnum (regstack, *dest)); | |
2048 | } | |
2049 | else | |
2050 | { | |
2051 | int regno = get_hard_regnum (regstack, XEXP (src2_note, 0)); | |
2052 | ||
2053 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
2054 | replace_reg (dest, regno); | |
2055 | ||
2056 | regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] | |
2057 | = regstack->reg[regstack->top]; | |
2058 | } | |
2059 | ||
2060 | CLEAR_HARD_REG_BIT (regstack->reg_set, | |
2061 | REGNO (XEXP (src2_note, 0))); | |
2062 | replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG); | |
2063 | regstack->top--; | |
2064 | } | |
2065 | else | |
2066 | { | |
2067 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
2068 | replace_reg (dest, get_hard_regnum (regstack, *dest)); | |
2069 | } | |
2070 | ||
2071 | break; | |
2072 | ||
2073 | case UNSPEC: | |
2074 | switch (XINT (SET_SRC (pat), 1)) | |
2075 | { | |
2076 | case 1: /* sin */ | |
2077 | case 2: /* cos */ | |
2078 | /* These insns only operate on the top of the stack. */ | |
2079 | ||
2080 | src1 = get_true_reg (&XVECEXP (SET_SRC (pat), 0, 0)); | |
2081 | ||
2082 | emit_swap_insn (insn, regstack, *src1); | |
2083 | ||
2084 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
2085 | ||
2086 | if (STACK_REG_P (*dest)) | |
2087 | replace_reg (dest, FIRST_STACK_REG); | |
2088 | ||
2089 | if (src1_note) | |
2090 | { | |
2091 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
2092 | regstack->top--; | |
2093 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); | |
2094 | } | |
2095 | ||
2096 | replace_reg (src1, FIRST_STACK_REG); | |
2097 | ||
2098 | break; | |
2099 | ||
2100 | default: | |
2101 | abort (); | |
2102 | } | |
2103 | break; | |
2104 | ||
2105 | default: | |
2106 | abort (); | |
2107 | } | |
2108 | } | |
2109 | \f | |
2110 | /* Substitute hard regnums for any stack regs in INSN, which has | |
2111 | N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info | |
2112 | before the insn, and is updated with changes made here. CONSTRAINTS is | |
2113 | an array of the constraint strings used in the asm statement. | |
2114 | ||
2115 | OPERANDS is an array of the operands, and OPERANDS_LOC is a | |
2116 | parallel array of where the operands were found. The output operands | |
2117 | all precede the input operands. | |
2118 | ||
2119 | There are several requirements and assumptions about the use of | |
2120 | stack-like regs in asm statements. These rules are enforced by | |
2121 | record_asm_stack_regs; see comments there for details. Any | |
2122 | asm_operands left in the RTL at this point may be assume to meet the | |
2123 | requirements, since record_asm_stack_regs removes any problem asm. */ | |
2124 | ||
2125 | static void | |
2126 | subst_asm_stack_regs (insn, regstack, operands, operands_loc, constraints, | |
2127 | n_inputs, n_outputs) | |
2128 | rtx insn; | |
2129 | stack regstack; | |
2130 | rtx *operands, **operands_loc; | |
2131 | char **constraints; | |
2132 | int n_inputs, n_outputs; | |
2133 | { | |
2134 | int n_operands = n_inputs + n_outputs; | |
2135 | int first_input = n_outputs; | |
2136 | rtx body = PATTERN (insn); | |
2137 | ||
2138 | int *operand_matches = (int *) alloca (n_operands * sizeof (int *)); | |
2139 | enum reg_class *operand_class | |
2140 | = (enum reg_class *) alloca (n_operands * sizeof (enum reg_class *)); | |
2141 | ||
2142 | rtx *note_reg; /* Array of note contents */ | |
2143 | rtx **note_loc; /* Address of REG field of each note */ | |
2144 | enum reg_note *note_kind; /* The type of each note */ | |
2145 | ||
2146 | rtx *clobber_reg; | |
2147 | rtx **clobber_loc; | |
2148 | ||
2149 | struct stack_def temp_stack; | |
2150 | int n_notes; | |
2151 | int n_clobbers; | |
2152 | rtx note; | |
2153 | int i; | |
2154 | ||
2155 | /* Find out what the constraints required. If no constraint | |
2156 | alternative matches, that is a compiler bug: we should have caught | |
2157 | such an insn during the life analysis pass (and reload should have | |
2158 | caught it regardless). */ | |
2159 | ||
2160 | i = constrain_asm_operands (n_operands, operands, constraints, | |
2161 | operand_matches, operand_class); | |
2162 | if (i < 0) | |
2163 | abort (); | |
2164 | ||
2165 | /* Strip SUBREGs here to make the following code simpler. */ | |
2166 | for (i = 0; i < n_operands; i++) | |
2167 | if (GET_CODE (operands[i]) == SUBREG | |
2168 | && GET_CODE (SUBREG_REG (operands[i])) == REG) | |
2169 | { | |
2170 | operands_loc[i] = & SUBREG_REG (operands[i]); | |
2171 | operands[i] = SUBREG_REG (operands[i]); | |
2172 | } | |
2173 | ||
2174 | /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */ | |
2175 | ||
2176 | for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
2177 | i++; | |
2178 | ||
2179 | note_reg = (rtx *) alloca (i * sizeof (rtx)); | |
2180 | note_loc = (rtx **) alloca (i * sizeof (rtx *)); | |
2181 | note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note)); | |
2182 | ||
2183 | n_notes = 0; | |
2184 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
2185 | { | |
2186 | rtx reg = XEXP (note, 0); | |
2187 | rtx *loc = & XEXP (note, 0); | |
2188 | ||
2189 | if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) | |
2190 | { | |
2191 | loc = & SUBREG_REG (reg); | |
2192 | reg = SUBREG_REG (reg); | |
2193 | } | |
2194 | ||
2195 | if (STACK_REG_P (reg) | |
2196 | && (REG_NOTE_KIND (note) == REG_DEAD | |
2197 | || REG_NOTE_KIND (note) == REG_UNUSED)) | |
2198 | { | |
2199 | note_reg[n_notes] = reg; | |
2200 | note_loc[n_notes] = loc; | |
2201 | note_kind[n_notes] = REG_NOTE_KIND (note); | |
2202 | n_notes++; | |
2203 | } | |
2204 | } | |
2205 | ||
2206 | /* Set up CLOBBER_REG and CLOBBER_LOC. */ | |
2207 | ||
2208 | n_clobbers = 0; | |
2209 | ||
2210 | if (GET_CODE (body) == PARALLEL) | |
2211 | { | |
2212 | clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx *)); | |
2213 | clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx **)); | |
2214 | ||
2215 | for (i = 0; i < XVECLEN (body, 0); i++) | |
2216 | if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) | |
2217 | { | |
2218 | rtx clobber = XVECEXP (body, 0, i); | |
2219 | rtx reg = XEXP (clobber, 0); | |
2220 | rtx *loc = & XEXP (clobber, 0); | |
2221 | ||
2222 | if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) | |
2223 | { | |
2224 | loc = & SUBREG_REG (reg); | |
2225 | reg = SUBREG_REG (reg); | |
2226 | } | |
2227 | ||
2228 | if (STACK_REG_P (reg)) | |
2229 | { | |
2230 | clobber_reg[n_clobbers] = reg; | |
2231 | clobber_loc[n_clobbers] = loc; | |
2232 | n_clobbers++; | |
2233 | } | |
2234 | } | |
2235 | } | |
2236 | ||
2237 | bcopy (regstack, &temp_stack, sizeof (temp_stack)); | |
2238 | ||
2239 | /* Put the input regs into the desired place in TEMP_STACK. */ | |
2240 | ||
2241 | for (i = first_input; i < first_input + n_inputs; i++) | |
2242 | if (STACK_REG_P (operands[i]) | |
2243 | && reg_class_subset_p (operand_class[i], FLOAT_REGS) | |
2244 | && operand_class[i] != FLOAT_REGS) | |
2245 | { | |
2246 | /* If an operand needs to be in a particular reg in | |
2247 | FLOAT_REGS, the constraint was either 't' or 'u'. Since | |
2248 | these constraints are for single register classes, and reload | |
2249 | guaranteed that operand[i] is already in that class, we can | |
2250 | just use REGNO (operands[i]) to know which actual reg this | |
2251 | operand needs to be in. */ | |
2252 | ||
2253 | int regno = get_hard_regnum (&temp_stack, operands[i]); | |
2254 | ||
2255 | if (regno < 0) | |
2256 | abort (); | |
2257 | ||
2258 | if (regno != REGNO (operands[i])) | |
2259 | { | |
2260 | /* operands[i] is not in the right place. Find it | |
2261 | and swap it with whatever is already in I's place. | |
2262 | K is where operands[i] is now. J is where it should | |
2263 | be. */ | |
2264 | int j, k, temp; | |
2265 | ||
2266 | k = temp_stack.top - (regno - FIRST_STACK_REG); | |
2267 | j = (temp_stack.top | |
2268 | - (REGNO (operands[i]) - FIRST_STACK_REG)); | |
2269 | ||
2270 | temp = temp_stack.reg[k]; | |
2271 | temp_stack.reg[k] = temp_stack.reg[j]; | |
2272 | temp_stack.reg[j] = temp; | |
2273 | } | |
2274 | } | |
2275 | ||
2276 | /* emit insns before INSN to make sure the reg-stack is in the right | |
2277 | order. */ | |
2278 | ||
2279 | change_stack (insn, regstack, &temp_stack, emit_insn_before); | |
2280 | ||
2281 | /* Make the needed input register substitutions. Do death notes and | |
2282 | clobbers too, because these are for inputs, not outputs. */ | |
2283 | ||
2284 | for (i = first_input; i < first_input + n_inputs; i++) | |
2285 | if (STACK_REG_P (operands[i])) | |
2286 | { | |
2287 | int regnum = get_hard_regnum (regstack, operands[i]); | |
2288 | ||
2289 | if (regnum < 0) | |
2290 | abort (); | |
2291 | ||
2292 | replace_reg (operands_loc[i], regnum); | |
2293 | } | |
2294 | ||
2295 | for (i = 0; i < n_notes; i++) | |
2296 | if (note_kind[i] == REG_DEAD) | |
2297 | { | |
2298 | int regnum = get_hard_regnum (regstack, note_reg[i]); | |
2299 | ||
2300 | if (regnum < 0) | |
2301 | abort (); | |
2302 | ||
2303 | replace_reg (note_loc[i], regnum); | |
2304 | } | |
2305 | ||
2306 | for (i = 0; i < n_clobbers; i++) | |
2307 | { | |
2308 | /* It's OK for a CLOBBER to reference a reg that is not live. | |
2309 | Don't try to replace it in that case. */ | |
2310 | int regnum = get_hard_regnum (regstack, clobber_reg[i]); | |
2311 | ||
2312 | if (regnum >= 0) | |
2313 | { | |
2314 | /* Sigh - clobbers always have QImode. But replace_reg knows | |
2315 | that these regs can't be MODE_INT and will abort. Just put | |
2316 | the right reg there without calling replace_reg. */ | |
2317 | ||
2318 | *clobber_loc[i] = FP_mode_reg[regnum][(int) DFmode]; | |
2319 | } | |
2320 | } | |
2321 | ||
2322 | /* Now remove from REGSTACK any inputs that the asm implicitly popped. */ | |
2323 | ||
2324 | for (i = first_input; i < first_input + n_inputs; i++) | |
2325 | if (STACK_REG_P (operands[i])) | |
2326 | { | |
2327 | /* An input reg is implicitly popped if it is tied to an | |
2328 | output, or if there is a CLOBBER for it. */ | |
2329 | int j; | |
2330 | ||
2331 | for (j = 0; j < n_clobbers; j++) | |
2332 | if (operands_match_p (clobber_reg[j], operands[i])) | |
2333 | break; | |
2334 | ||
2335 | if (j < n_clobbers || operand_matches[i] >= 0) | |
2336 | { | |
2337 | /* operands[i] might not be at the top of stack. But that's OK, | |
2338 | because all we need to do is pop the right number of regs | |
2339 | off of the top of the reg-stack. record_asm_stack_regs | |
2340 | guaranteed that all implicitly popped regs were grouped | |
2341 | at the top of the reg-stack. */ | |
2342 | ||
2343 | CLEAR_HARD_REG_BIT (regstack->reg_set, | |
2344 | regstack->reg[regstack->top]); | |
2345 | regstack->top--; | |
2346 | } | |
2347 | } | |
2348 | ||
2349 | /* Now add to REGSTACK any outputs that the asm implicitly pushed. | |
2350 | Note that there isn't any need to substitute register numbers. | |
2351 | ??? Explain why this is true. */ | |
2352 | ||
2353 | for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--) | |
2354 | { | |
2355 | /* See if there is an output for this hard reg. */ | |
2356 | int j; | |
2357 | ||
2358 | for (j = 0; j < n_outputs; j++) | |
2359 | if (STACK_REG_P (operands[j]) && REGNO (operands[j]) == i) | |
2360 | { | |
2361 | regstack->reg[++regstack->top] = i; | |
2362 | SET_HARD_REG_BIT (regstack->reg_set, i); | |
2363 | break; | |
2364 | } | |
2365 | } | |
2366 | ||
2367 | /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD | |
2368 | input that the asm didn't implicitly pop. If the asm didn't | |
2369 | implicitly pop an input reg, that reg will still be live. | |
2370 | ||
2371 | Note that we can't use find_regno_note here: the register numbers | |
2372 | in the death notes have already been substituted. */ | |
2373 | ||
2374 | for (i = 0; i < n_outputs; i++) | |
2375 | if (STACK_REG_P (operands[i])) | |
2376 | { | |
2377 | int j; | |
2378 | ||
2379 | for (j = 0; j < n_notes; j++) | |
2380 | if (REGNO (operands[i]) == REGNO (note_reg[j]) | |
2381 | && note_kind[j] == REG_UNUSED) | |
2382 | { | |
2383 | insn = emit_pop_insn (insn, regstack, operands[i], | |
2384 | emit_insn_after); | |
2385 | break; | |
2386 | } | |
2387 | } | |
2388 | ||
2389 | for (i = first_input; i < first_input + n_inputs; i++) | |
2390 | if (STACK_REG_P (operands[i])) | |
2391 | { | |
2392 | int j; | |
2393 | ||
2394 | for (j = 0; j < n_notes; j++) | |
2395 | if (REGNO (operands[i]) == REGNO (note_reg[j]) | |
2396 | && note_kind[j] == REG_DEAD | |
2397 | && TEST_HARD_REG_BIT (regstack->reg_set, REGNO (operands[i]))) | |
2398 | { | |
2399 | insn = emit_pop_insn (insn, regstack, operands[i], | |
2400 | emit_insn_after); | |
2401 | break; | |
2402 | } | |
2403 | } | |
2404 | } | |
2405 | \f | |
2406 | /* Substitute stack hard reg numbers for stack virtual registers in | |
2407 | INSN. Non-stack register numbers are not changed. REGSTACK is the | |
2408 | current stack content. Insns may be emitted as needed to arrange the | |
2409 | stack for the 387 based on the contents of the insn. */ | |
2410 | ||
2411 | static void | |
2412 | subst_stack_regs (insn, regstack) | |
2413 | rtx insn; | |
2414 | stack regstack; | |
2415 | { | |
2416 | register rtx *note_link, note; | |
2417 | register int i; | |
2418 | int n_operands; | |
2419 | ||
2420 | if ((GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN) | |
2421 | || INSN_DELETED_P (insn)) | |
2422 | return; | |
2423 | ||
2424 | /* The stack should be empty at a call. */ | |
2425 | ||
2426 | if (GET_CODE (insn) == CALL_INSN) | |
2427 | for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) | |
2428 | if (TEST_HARD_REG_BIT (regstack->reg_set, i)) | |
2429 | abort (); | |
2430 | ||
2431 | /* Do the actual substitution if any stack regs are mentioned. | |
2432 | Since we only record whether entire insn mentions stack regs, and | |
2433 | subst_stack_regs_pat only works for patterns that contain stack regs, | |
2434 | we must check each pattern in a parallel here. A call_value_pop could | |
2435 | fail otherwise. */ | |
2436 | ||
2437 | if (GET_MODE (insn) == QImode) | |
2438 | { | |
2439 | n_operands = asm_noperands (PATTERN (insn)); | |
2440 | if (n_operands >= 0) | |
2441 | { | |
2442 | /* This insn is an `asm' with operands. Decode the operands, | |
2443 | decide how many are inputs, and do register substitution. | |
2444 | Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */ | |
2445 | ||
2446 | rtx operands[MAX_RECOG_OPERANDS]; | |
2447 | rtx *operands_loc[MAX_RECOG_OPERANDS]; | |
2448 | rtx body = PATTERN (insn); | |
2449 | int n_inputs, n_outputs; | |
2450 | char **constraints | |
2451 | = (char **) alloca (n_operands * sizeof (char *)); | |
2452 | ||
2453 | decode_asm_operands (body, operands, operands_loc, | |
2454 | constraints, NULL_PTR); | |
2455 | get_asm_operand_lengths (body, n_operands, &n_inputs, &n_outputs); | |
2456 | subst_asm_stack_regs (insn, regstack, operands, operands_loc, | |
2457 | constraints, n_inputs, n_outputs); | |
2458 | return; | |
2459 | } | |
2460 | ||
2461 | if (GET_CODE (PATTERN (insn)) == PARALLEL) | |
2462 | for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) | |
2463 | { | |
2464 | if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i))) | |
2465 | subst_stack_regs_pat (insn, regstack, | |
2466 | XVECEXP (PATTERN (insn), 0, i)); | |
2467 | } | |
2468 | else | |
2469 | subst_stack_regs_pat (insn, regstack, PATTERN (insn)); | |
2470 | } | |
2471 | ||
2472 | /* subst_stack_regs_pat may have deleted a no-op insn. If so, any | |
2473 | REG_UNUSED will already have been dealt with, so just return. */ | |
2474 | ||
2475 | if (INSN_DELETED_P (insn)) | |
2476 | return; | |
2477 | ||
2478 | /* If there is a REG_UNUSED note on a stack register on this insn, | |
2479 | the indicated reg must be popped. The REG_UNUSED note is removed, | |
2480 | since the form of the newly emitted pop insn references the reg, | |
2481 | making it no longer `unset'. */ | |
2482 | ||
2483 | note_link = ®_NOTES(insn); | |
2484 | for (note = *note_link; note; note = XEXP (note, 1)) | |
2485 | if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0))) | |
2486 | { | |
2487 | *note_link = XEXP (note, 1); | |
2488 | insn = emit_pop_insn (insn, regstack, XEXP (note, 0), emit_insn_after); | |
2489 | } | |
2490 | else | |
2491 | note_link = &XEXP (note, 1); | |
2492 | } | |
2493 | \f | |
2494 | /* Change the organization of the stack so that it fits a new basic | |
2495 | block. Some registers might have to be popped, but there can never be | |
2496 | a register live in the new block that is not now live. | |
2497 | ||
2498 | Insert any needed insns before or after INSN. WHEN is emit_insn_before | |
2499 | or emit_insn_after. OLD is the original stack layout, and NEW is | |
2500 | the desired form. OLD is updated to reflect the code emitted, ie, it | |
2501 | will be the same as NEW upon return. | |
2502 | ||
2503 | This function will not preserve block_end[]. But that information | |
2504 | is no longer needed once this has executed. */ | |
2505 | ||
2506 | static void | |
2507 | change_stack (insn, old, new, when) | |
2508 | rtx insn; | |
2509 | stack old; | |
2510 | stack new; | |
2511 | rtx (*when)(); | |
2512 | { | |
2513 | int reg; | |
2514 | ||
2515 | /* We will be inserting new insns "backwards", by calling emit_insn_before. | |
2516 | If we are to insert after INSN, find the next insn, and insert before | |
2517 | it. */ | |
2518 | ||
2519 | if (when == emit_insn_after) | |
2520 | insn = NEXT_INSN (insn); | |
2521 | ||
2522 | /* Pop any registers that are not needed in the new block. */ | |
2523 | ||
2524 | for (reg = old->top; reg >= 0; reg--) | |
2525 | if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg])) | |
2526 | emit_pop_insn (insn, old, FP_mode_reg[old->reg[reg]][(int) DFmode], | |
2527 | emit_insn_before); | |
2528 | ||
2529 | if (new->top == -2) | |
2530 | { | |
2531 | /* If the new block has never been processed, then it can inherit | |
2532 | the old stack order. */ | |
2533 | ||
2534 | new->top = old->top; | |
2535 | bcopy (old->reg, new->reg, sizeof (new->reg)); | |
2536 | } | |
2537 | else | |
2538 | { | |
2539 | /* This block has been entered before, and we must match the | |
2540 | previously selected stack order. */ | |
2541 | ||
2542 | /* By now, the only difference should be the order of the stack, | |
2543 | not their depth or liveliness. */ | |
2544 | ||
2545 | GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win); | |
2546 | ||
2547 | abort (); | |
2548 | ||
2549 | win: | |
2550 | ||
2551 | if (old->top != new->top) | |
2552 | abort (); | |
2553 | ||
2554 | /* Loop here emitting swaps until the stack is correct. The | |
2555 | worst case number of swaps emitted is N + 2, where N is the | |
2556 | depth of the stack. In some cases, the reg at the top of | |
2557 | stack may be correct, but swapped anyway in order to fix | |
2558 | other regs. But since we never swap any other reg away from | |
2559 | its correct slot, this algorithm will converge. */ | |
2560 | ||
2561 | do | |
2562 | { | |
2563 | /* Swap the reg at top of stack into the position it is | |
2564 | supposed to be in, until the correct top of stack appears. */ | |
2565 | ||
2566 | while (old->reg[old->top] != new->reg[new->top]) | |
2567 | { | |
2568 | for (reg = new->top; reg >= 0; reg--) | |
2569 | if (new->reg[reg] == old->reg[old->top]) | |
2570 | break; | |
2571 | ||
2572 | if (reg == -1) | |
2573 | abort (); | |
2574 | ||
2575 | emit_swap_insn (insn, old, | |
2576 | FP_mode_reg[old->reg[reg]][(int) DFmode]); | |
2577 | } | |
2578 | ||
2579 | /* See if any regs remain incorrect. If so, bring an | |
2580 | incorrect reg to the top of stack, and let the while loop | |
2581 | above fix it. */ | |
2582 | ||
2583 | for (reg = new->top; reg >= 0; reg--) | |
2584 | if (new->reg[reg] != old->reg[reg]) | |
2585 | { | |
2586 | emit_swap_insn (insn, old, | |
2587 | FP_mode_reg[old->reg[reg]][(int) DFmode]); | |
2588 | break; | |
2589 | } | |
2590 | } while (reg >= 0); | |
2591 | ||
2592 | /* At this point there must be no differences. */ | |
2593 | ||
2594 | for (reg = old->top; reg >= 0; reg--) | |
2595 | if (old->reg[reg] != new->reg[reg]) | |
2596 | abort (); | |
2597 | } | |
2598 | } | |
2599 | \f | |
2600 | /* Check PAT, which points to RTL in INSN, for a LABEL_REF. If it is | |
2601 | found, ensure that a jump from INSN to the code_label to which the | |
2602 | label_ref points ends up with the same stack as that at the | |
2603 | code_label. Do this by inserting insns just before the code_label to | |
2604 | pop and rotate the stack until it is in the correct order. REGSTACK | |
2605 | is the order of the register stack in INSN. | |
2606 | ||
2607 | Any code that is emitted here must not be later processed as part | |
2608 | of any block, as it will already contain hard register numbers. */ | |
2609 | ||
2610 | static void | |
2611 | goto_block_pat (insn, regstack, pat) | |
2612 | rtx insn; | |
2613 | stack regstack; | |
2614 | rtx pat; | |
2615 | { | |
2616 | rtx label; | |
2617 | rtx new_jump, new_label, new_barrier; | |
2618 | rtx *ref; | |
2619 | stack label_stack; | |
2620 | struct stack_def temp_stack; | |
2621 | int reg; | |
2622 | ||
2623 | if (GET_CODE (pat) != LABEL_REF) | |
2624 | { | |
2625 | int i, j; | |
2626 | char *fmt = GET_RTX_FORMAT (GET_CODE (pat)); | |
2627 | ||
2628 | for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) | |
2629 | { | |
2630 | if (fmt[i] == 'e') | |
2631 | goto_block_pat (insn, regstack, XEXP (pat, i)); | |
2632 | if (fmt[i] == 'E') | |
2633 | for (j = 0; j < XVECLEN (pat, i); j++) | |
2634 | goto_block_pat (insn, regstack, XVECEXP (pat, i, j)); | |
2635 | } | |
2636 | return; | |
2637 | } | |
2638 | ||
2639 | label = XEXP (pat, 0); | |
2640 | if (GET_CODE (label) != CODE_LABEL) | |
2641 | abort (); | |
2642 | ||
2643 | /* First, see if in fact anything needs to be done to the stack at all. */ | |
2644 | ||
2645 | label_stack = &block_stack_in[BLOCK_NUM (label)]; | |
2646 | ||
2647 | if (label_stack->top == -2) | |
2648 | { | |
2649 | /* If the target block hasn't had a stack order selected, then | |
2650 | we need merely ensure that no pops are needed. */ | |
2651 | ||
2652 | for (reg = regstack->top; reg >= 0; reg--) | |
2653 | if (! TEST_HARD_REG_BIT (label_stack->reg_set, regstack->reg[reg])) | |
2654 | break; | |
2655 | ||
2656 | if (reg == -1) | |
2657 | { | |
2658 | /* change_stack will not emit any code in this case. */ | |
2659 | ||
2660 | change_stack (label, regstack, label_stack, emit_insn_after); | |
2661 | return; | |
2662 | } | |
2663 | } | |
2664 | else if (label_stack->top == regstack->top) | |
2665 | { | |
2666 | for (reg = label_stack->top; reg >= 0; reg--) | |
2667 | if (label_stack->reg[reg] != regstack->reg[reg]) | |
2668 | break; | |
2669 | ||
2670 | if (reg == -1) | |
2671 | return; | |
2672 | } | |
2673 | ||
2674 | /* At least one insn will need to be inserted before label. Insert | |
2675 | a jump around the code we are about to emit. Emit a label for the new | |
2676 | code, and point the original insn at this new label. We can't use | |
2677 | redirect_jump here, because we're using fld[4] of the code labels as | |
2678 | LABEL_REF chains, no NUSES counters. */ | |
2679 | ||
2680 | new_jump = emit_jump_insn_before (gen_jump (label), label); | |
2681 | record_label_references (new_jump, PATTERN (new_jump)); | |
2682 | JUMP_LABEL (new_jump) = label; | |
2683 | ||
2684 | new_barrier = emit_barrier_after (new_jump); | |
2685 | ||
2686 | new_label = gen_label_rtx (); | |
2687 | emit_label_after (new_label, new_barrier); | |
2688 | LABEL_REFS (new_label) = new_label; | |
2689 | ||
2690 | /* The old label_ref will no longer point to the code_label if now uses, | |
2691 | so strip the label_ref from the code_label's chain of references. */ | |
2692 | ||
2693 | for (ref = &LABEL_REFS (label); *ref != label; ref = &LABEL_NEXTREF (*ref)) | |
2694 | if (*ref == pat) | |
2695 | break; | |
2696 | ||
2697 | if (*ref == label) | |
2698 | abort (); | |
2699 | ||
2700 | *ref = LABEL_NEXTREF (*ref); | |
2701 | ||
2702 | XEXP (pat, 0) = new_label; | |
2703 | record_label_references (insn, PATTERN (insn)); | |
2704 | ||
2705 | if (JUMP_LABEL (insn) == label) | |
2706 | JUMP_LABEL (insn) = new_label; | |
2707 | ||
2708 | /* Now emit the needed code. */ | |
2709 | ||
2710 | temp_stack = *regstack; | |
2711 | ||
2712 | change_stack (new_label, &temp_stack, label_stack, emit_insn_after); | |
2713 | } | |
2714 | \f | |
2715 | /* Traverse all basic blocks in a function, converting the register | |
2716 | references in each insn from the "flat" register file that gcc uses, to | |
2717 | the stack-like registers the 387 uses. */ | |
2718 | ||
2719 | static void | |
2720 | convert_regs () | |
2721 | { | |
2722 | register int block, reg; | |
2723 | register rtx insn, next; | |
2724 | struct stack_def regstack; | |
2725 | ||
2726 | for (block = 0; block < blocks; block++) | |
2727 | { | |
2728 | if (block_stack_in[block].top == -2) | |
2729 | { | |
2730 | /* This block has not been previously encountered. Choose a | |
2731 | default mapping for any stack regs live on entry */ | |
2732 | ||
2733 | block_stack_in[block].top = -1; | |
2734 | ||
2735 | for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; reg--) | |
2736 | if (TEST_HARD_REG_BIT (block_stack_in[block].reg_set, reg)) | |
2737 | block_stack_in[block].reg[++block_stack_in[block].top] = reg; | |
2738 | } | |
2739 | ||
2740 | /* Process all insns in this block. Keep track of `next' here, | |
2741 | so that we don't process any insns emitted while making | |
2742 | substitutions in INSN. */ | |
2743 | ||
2744 | next = block_begin[block]; | |
2745 | regstack = block_stack_in[block]; | |
2746 | do | |
2747 | { | |
2748 | insn = next; | |
2749 | next = NEXT_INSN (insn); | |
2750 | ||
2751 | /* Don't bother processing unless there is a stack reg | |
2752 | mentioned. | |
2753 | ||
2754 | ??? For now, process CALL_INSNs too to make sure that the | |
2755 | stack regs are dead after a call. Remove this eventually. */ | |
2756 | ||
2757 | if (GET_MODE (insn) == QImode || GET_CODE (insn) == CALL_INSN) | |
2758 | subst_stack_regs (insn, ®stack); | |
2759 | ||
2760 | } while (insn != block_end[block]); | |
2761 | ||
2762 | /* Something failed if the stack life doesn't match. */ | |
2763 | ||
2764 | GO_IF_HARD_REG_EQUAL (regstack.reg_set, block_out_reg_set[block], win); | |
2765 | ||
2766 | abort (); | |
2767 | ||
2768 | win: | |
2769 | ||
2770 | /* Adjust the stack of this block on exit to match the stack of | |
2771 | the target block, or copy stack information into stack of | |
2772 | jump target if the target block's stack order hasn't been set | |
2773 | yet. */ | |
2774 | ||
2775 | if (GET_CODE (insn) == JUMP_INSN) | |
2776 | goto_block_pat (insn, ®stack, PATTERN (insn)); | |
2777 | ||
2778 | /* Likewise handle the case where we fall into the next block. */ | |
2779 | ||
2780 | if ((block < blocks - 1) && block_drops_in[block+1]) | |
2781 | change_stack (insn, ®stack, &block_stack_in[block+1], | |
2782 | emit_insn_after); | |
2783 | } | |
2784 | ||
2785 | /* If the last basic block is the end of a loop, and that loop has | |
2786 | regs live at its start, then the last basic block will have regs live | |
2787 | at its end that need to be popped before the function returns. */ | |
2788 | ||
2789 | for (reg = regstack.top; reg >= 0; reg--) | |
2790 | if (! current_function_returns_real | |
2791 | || regstack.reg[reg] != FIRST_STACK_REG) | |
2792 | insn = emit_pop_insn (insn, ®stack, | |
2793 | FP_mode_reg[regstack.reg[reg]][(int) DFmode], | |
2794 | emit_insn_after); | |
2795 | } | |
2796 | \f | |
2797 | /* Check expression PAT, which is in INSN, for label references. if | |
2798 | one is found, print the block number of destination to FILE. */ | |
2799 | ||
2800 | static void | |
2801 | print_blocks (file, insn, pat) | |
2802 | FILE *file; | |
2803 | rtx insn, pat; | |
2804 | { | |
2805 | register RTX_CODE code = GET_CODE (pat); | |
2806 | register int i; | |
2807 | register char *fmt; | |
2808 | ||
2809 | if (code == LABEL_REF) | |
2810 | { | |
2811 | register rtx label = XEXP (pat, 0); | |
2812 | ||
2813 | if (GET_CODE (label) != CODE_LABEL) | |
2814 | abort (); | |
2815 | ||
2816 | fprintf (file, " %d", BLOCK_NUM (label)); | |
2817 | ||
2818 | return; | |
2819 | } | |
2820 | ||
2821 | fmt = GET_RTX_FORMAT (code); | |
2822 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2823 | { | |
2824 | if (fmt[i] == 'e') | |
2825 | print_blocks (file, insn, XEXP (pat, i)); | |
2826 | if (fmt[i] == 'E') | |
2827 | { | |
2828 | register int j; | |
2829 | for (j = 0; j < XVECLEN (pat, i); j++) | |
2830 | print_blocks (file, insn, XVECEXP (pat, i, j)); | |
2831 | } | |
2832 | } | |
2833 | } | |
2834 | \f | |
2835 | /* Write information about stack registers and stack blocks into FILE. | |
2836 | This is part of making a debugging dump. */ | |
2837 | static void | |
2838 | dump_stack_info (file) | |
2839 | FILE *file; | |
2840 | { | |
2841 | register int block; | |
2842 | ||
2843 | fprintf (file, "\n%d stack blocks.\n", blocks); | |
2844 | for (block = 0; block < blocks; block++) | |
2845 | { | |
2846 | register rtx head, jump, end; | |
2847 | register int regno; | |
2848 | ||
2849 | fprintf (file, "\nStack block %d: first insn %d, last %d.\n", | |
2850 | block, INSN_UID (block_begin[block]), | |
2851 | INSN_UID (block_end[block])); | |
2852 | ||
2853 | head = block_begin[block]; | |
2854 | ||
2855 | fprintf (file, "Reached from blocks: "); | |
2856 | if (GET_CODE (head) == CODE_LABEL) | |
2857 | for (jump = LABEL_REFS (head); | |
2858 | jump != head; | |
2859 | jump = LABEL_NEXTREF (jump)) | |
2860 | { | |
2861 | register int from_block = BLOCK_NUM (CONTAINING_INSN (jump)); | |
2862 | fprintf (file, " %d", from_block); | |
2863 | } | |
2864 | if (block_drops_in[block]) | |
2865 | fprintf (file, " previous"); | |
2866 | ||
2867 | fprintf (file, "\nlive stack registers on block entry: "); | |
2868 | for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG ; regno++) | |
2869 | { | |
2870 | if (TEST_HARD_REG_BIT (block_stack_in[block].reg_set, regno)) | |
2871 | fprintf (file, "%d ", regno); | |
2872 | } | |
2873 | ||
2874 | fprintf (file, "\nlive stack registers on block exit: "); | |
2875 | for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG ; regno++) | |
2876 | { | |
2877 | if (TEST_HARD_REG_BIT (block_out_reg_set[block], regno)) | |
2878 | fprintf (file, "%d ", regno); | |
2879 | } | |
2880 | ||
2881 | end = block_end[block]; | |
2882 | ||
2883 | fprintf (file, "\nJumps to blocks: "); | |
2884 | if (GET_CODE (end) == JUMP_INSN) | |
2885 | print_blocks (file, end, PATTERN (end)); | |
2886 | ||
2887 | if (block + 1 < blocks && block_drops_in[block+1]) | |
2888 | fprintf (file, " next"); | |
2889 | else if (block + 1 == blocks | |
2890 | || (GET_CODE (end) == JUMP_INSN | |
2891 | && GET_CODE (PATTERN (end)) == RETURN)) | |
2892 | fprintf (file, " return"); | |
2893 | ||
2894 | fprintf (file, "\n"); | |
2895 | } | |
2896 | } | |
2897 | #endif /* STACK_REGS */ |