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1 | /* Definitions of target machine for GNU compiler for Intel 80386. |
2 | Copyright (C) 1988 Free Software Foundation, Inc. | |
3 | ||
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 1, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
19 | ||
20 | ||
21 | /* Note that some other tm- files include this one and then override | |
22 | many of the definitions that relate to assembler syntax. */ | |
23 | ||
24 | /* Names to predefine in the preprocessor for this target machine. */ | |
25 | ||
26 | /* the file tm-compaq.h includes this file */ | |
27 | ||
28 | ||
29 | #define I386 1 | |
30 | ||
31 | /* Run-time compilation parameters selecting different hardware subsets. */ | |
32 | ||
33 | extern int target_flags; | |
34 | ||
35 | /* Macros used in the machine description to test the flags. */ | |
36 | ||
37 | /* Compile 80387 insns for floating point (not library calls). */ | |
38 | #define TARGET_80387 (target_flags & 1) | |
39 | /* Compile using ret insn that pops args. | |
40 | This will not work unless you use prototypes at least | |
41 | for all functions that can take varying numbers of args. */ | |
42 | #define TARGET_RTD (target_flags & 8) | |
43 | /* Compile passing first two args in regs 0 and 1. | |
44 | This exists only to test compiler features that will | |
45 | be needed for RISC chips. It is not usable | |
46 | and is not intended to be usable on this cpu. */ | |
47 | #define TARGET_REGPARM (target_flags & 020) | |
48 | ||
49 | /* Macro to define tables used to set the flags. | |
50 | This is a list in braces of pairs in braces, | |
51 | each pair being { "NAME", VALUE } | |
52 | where VALUE is the bits to set or minus the bits to clear. | |
53 | An empty string NAME is used to identify the default VALUE. */ | |
54 | ||
55 | #define TARGET_SWITCHES \ | |
56 | { { "80387", 1}, \ | |
57 | { "soft-float", -1}, \ | |
58 | { "rtd", 8}, \ | |
59 | { "nortd", -8}, \ | |
60 | { "regparm", 020}, \ | |
61 | { "noregparm", -020}, \ | |
62 | { "", TARGET_DEFAULT}} | |
63 | ||
64 | /* TARGET_DEFAULT is defined in tm-compaq.h, etc. */ | |
65 | \f | |
66 | /* target machine storage layout */ | |
67 | ||
68 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
69 | /* That is true on the 80386. */ | |
70 | ||
71 | /* #define BITS_BIG_ENDIAN */ | |
72 | ||
73 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
74 | /* That is not true on the 80386. */ | |
75 | /* #define BYTES_BIG_ENDIAN */ | |
76 | ||
77 | /* Define this if most significant word of a multiword number is numbered. */ | |
78 | /* Not true for 80386 */ | |
79 | /* #define WORDS_BIG_ENDIAN */ | |
80 | ||
81 | /* number of bits in an addressible storage unit */ | |
82 | #define BITS_PER_UNIT 8 | |
83 | ||
84 | /* Width in bits of a "word", which is the contents of a machine register. | |
85 | Note that this is not necessarily the width of data type `int'; | |
86 | if using 16-bit ints on a 80386, this would still be 32. | |
87 | But on a machine with 16-bit registers, this would be 16. */ | |
88 | #define BITS_PER_WORD 32 | |
89 | ||
90 | /* Width of a word, in units (bytes). */ | |
91 | #define UNITS_PER_WORD 4 | |
92 | ||
93 | /* Width in bits of a pointer. | |
94 | See also the macro `Pmode' defined below. */ | |
95 | #define POINTER_SIZE 32 | |
96 | ||
97 | /* Allocation boundary (in *bits*) for storing pointers in memory. */ | |
98 | #define POINTER_BOUNDARY 32 | |
99 | ||
100 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
101 | #define PARM_BOUNDARY 32 | |
102 | ||
103 | /* Boundary (in *bits*) on which stack pointer should be aligned. */ | |
104 | #define STACK_BOUNDARY 32 | |
105 | ||
106 | /* Allocation boundary (in *bits*) for the code of a function. */ | |
107 | #define FUNCTION_BOUNDARY 32 | |
108 | ||
109 | /* Alignment of field after `int : 0' in a structure. */ | |
110 | ||
111 | #define EMPTY_FIELD_BOUNDARY 32 | |
112 | ||
113 | /* There is no point aligning anything to a rounder boundary than this. */ | |
114 | /* Some structures in the ATT libraries are assumed to round up from 16 to 18 | |
115 | bytes, for example the _io_buf */ | |
116 | #define BIGGEST_ALIGNMENT 32 | |
117 | ||
118 | /* Define this if move instructions will actually fail to work | |
119 | when given unaligned data. */ | |
120 | /* #define STRICT_ALIGNMENT */ | |
121 | \f | |
122 | /* Standard register usage. */ | |
123 | ||
124 | /* Number of actual hardware registers. | |
125 | The hardware registers are assigned numbers for the compiler | |
126 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
127 | All registers that the compiler knows about must be given numbers, | |
128 | even those that are not normally considered general registers. | |
129 | In the 80387 we give the 8 general purpose registers the numbers 0-7, | |
130 | we assign 6 numbers for floating point registers 8-13, | |
131 | Note that registers 0-7 can be accessed as a short or int, | |
132 | while only 0-3 may be used with mov byte instructions. | |
133 | */ | |
134 | #define FIRST_PSEUDO_REGISTER 10 | |
135 | ||
136 | /* 1 for registers that have pervasive standard uses | |
137 | and are not available for the register allocator. | |
138 | On the 80386, only the stack pointer is such. */ | |
139 | #define FIXED_REGISTERS \ | |
140 | /*ax,ad,ac,ab,si,di,bp,sp,fval,fp0*/ \ | |
141 | { 0, 0, 0, 0, 0, 0, 0, 1, 1, 0} | |
142 | ||
143 | /* ;;change-wfs */ | |
144 | ||
145 | /* 1 for registers not available across function calls. | |
146 | These must include the FIXED_REGISTERS and also any | |
147 | registers that can be used without being saved. | |
148 | The latter must include the registers where values are returned | |
149 | and the register where structure-value addresses are passed. | |
150 | Aside from that, you can include as many other registers as you like. */ | |
151 | ||
152 | #define CALL_USED_REGISTERS \ | |
153 | /*ax,ad,ac,ab,si,di,bp,sp,*/ \ | |
154 | { 1, 1, 1, 0, 0, 0, 0, 1, \ | |
155 | 1, 1} | |
156 | ||
157 | /* Return number of consecutive hard regs needed starting at reg REGNO | |
158 | to hold something of mode MODE. | |
159 | This is ordinarily the length in words of a value of mode MODE | |
160 | but can be less for certain modes in special long registers. | |
161 | ||
162 | Actually there are no two word move instructions for consecutive | |
163 | registers. And only registers 0-3 may have mov byte instructions | |
164 | applied to them. | |
165 | */ | |
166 | ||
167 | #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
168 | ((REGNO) >= 8 ? 1 \ | |
169 | : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) | |
170 | ||
171 | /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. | |
172 | On the 80386, the first 4 cpu registers can hold any mode. | |
173 | While the floating point registers may hold SFmode or DFmode only. | |
174 | */ | |
175 | ||
176 | #define HARD_REGNO_MODE_OK(REGNO, MODE) \ | |
177 | hard_regno_mode_ok(REGNO,MODE) | |
178 | ||
179 | /* Value is 1 if it is a good idea to tie two pseudo registers | |
180 | when one has mode MODE1 and one has mode MODE2. | |
181 | If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
182 | for any hard reg, then this must be 0 for correct output. */ | |
183 | ||
184 | #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2)) | |
185 | ||
186 | /* Specify the registers used for certain standard purposes. | |
187 | The values of these macros are register numbers. */ | |
188 | ||
189 | /* on the 386 the pc register is %eip, and is not usable as a general | |
190 | register. The ordinary mov instructions won't work */ | |
191 | /* #define PC_REGNUM */ | |
192 | ||
193 | /* Register to use for pushing function arguments. */ | |
194 | #define STACK_POINTER_REGNUM 7 | |
195 | ||
196 | /* Base register for access to local variables of the function. */ | |
197 | #define FRAME_POINTER_REGNUM 6 | |
198 | ||
199 | /* First floating point reg */ | |
200 | #define FIRST_FLOAT_REG 8 | |
201 | /* Value should be nonzero if functions must have frame pointers. | |
202 | Zero means the frame pointer need not be set up (and parms | |
203 | may be accessed via the stack pointer) in functions that seem suitable. | |
204 | This is computed in `reload', in reload1.c. */ | |
205 | #define FRAME_POINTER_REQUIRED 0 | |
206 | ||
207 | /* Base register for access to arguments of the function. */ | |
208 | #define ARG_POINTER_REGNUM 6 | |
209 | ||
210 | /* Register in which static-chain is passed to a function. */ | |
211 | #define STATIC_CHAIN_REGNUM 2 | |
212 | ||
213 | /* Register in which address to store a structure value | |
214 | arrives in the function. On the 386, the prologue | |
215 | copies this from the stack to register %eax. */ | |
216 | #define STRUCT_VALUE_INCOMING \ | |
217 | gen_rtx (MEM, Pmode, gen_rtx (PLUS, Pmode, frame_pointer_rtx, \ | |
218 | gen_rtx (CONST_INT, VOIDmode, 8))) | |
219 | ||
220 | /* Place in which caller passes the structure value address. | |
221 | Actually, all that matters about this value is it its rtx_code: | |
222 | MEM means push the value on the stack like an argument. */ | |
223 | #define STRUCT_VALUE \ | |
224 | gen_rtx (MEM, Pmode, gen_rtx (PRE_DEC, Pmode, stack_pointer_rtx)) | |
225 | \f | |
226 | /* Define the classes of registers for register constraints in the | |
227 | machine description. Also define ranges of constants. | |
228 | ||
229 | One of the classes must always be named ALL_REGS and include all hard regs. | |
230 | If there is more than one class, another class must be named NO_REGS | |
231 | and contain no registers. | |
232 | ||
233 | The name GENERAL_REGS must be the name of a class (or an alias for | |
234 | another name such as ALL_REGS). This is the class of registers | |
235 | that is allowed by "g" or "r" in a register constraint. | |
236 | Also, registers outside this class are allocated only when | |
237 | instructions express preferences for them. | |
238 | ||
239 | The classes must be numbered in nondecreasing order; that is, | |
240 | a larger-numbered class must never be contained completely | |
241 | in a smaller-numbered class. | |
242 | ||
243 | For any two classes, it is very desirable that there be another | |
244 | class that represents their union. */ | |
245 | ||
246 | ||
247 | enum reg_class { | |
248 | NO_REGS, AREG, DREG, ADREG, CREG, BREG, Q_REGS, SIREG, DIREG, | |
249 | INDEX_REGS, GENERAL_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES }; | |
250 | ||
251 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
252 | ||
253 | /* Give names of register classes as strings for dump file. */ | |
254 | ||
255 | #define REG_CLASS_NAMES \ | |
256 | { "NO_REGS", "AREG", "DREG", "ADREG", "CREG", "BREG","Q_REGS", \ | |
257 | "SIREG", "DIREG", \ | |
258 | "INDEX_REGS", "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS"} | |
259 | /* Define which registers fit in which classes. | |
260 | This is an initializer for a vector of HARD_REG_SET | |
261 | of length N_REG_CLASSES. */ | |
262 | ||
263 | ||
264 | ||
265 | #define REG_CLASS_CONTENTS {0, 0x1, 0x2, 0x3, 0x4, 0x8, 0xf,\ | |
266 | 0x10, 0x20, 0x7f, 0xff, 0x300, 0x3ff} | |
267 | ||
268 | /* The same information, inverted: | |
269 | Return the class number of the smallest class containing | |
270 | reg number REGNO. This could be a conditional expression | |
271 | or could index an array. */ | |
272 | ||
273 | #define REGNO_REG_CLASS(REGNO) \ | |
274 | ((REGNO) == 0 ? AREG : \ | |
275 | (REGNO) == 1 ? DREG : \ | |
276 | (REGNO) == 2 ? CREG : \ | |
277 | (REGNO) == 3 ? BREG : \ | |
278 | (REGNO) == 4 ? SIREG : \ | |
279 | (REGNO) == 5 ? DIREG : \ | |
280 | (REGNO) == 7 ? GENERAL_REGS : \ | |
281 | (REGNO) < 8 ? INDEX_REGS : \ | |
282 | FLOAT_REGS) | |
283 | ||
284 | #define NON_QI_REG_P(X) \ | |
285 | (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER) | |
286 | ||
287 | #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X))) | |
288 | #define FP_REGNO_P(n) ((n) >= FIRST_FLOAT_REG && (n) < FIRST_PSEUDO_REGISTER) | |
289 | ||
290 | /* Try to maintain the accuracy of the death notes for regs satisfying the | |
291 | following. Important for stack like regs, to know when to pop. */ | |
292 | ||
293 | #define PRESERVE_DEATH_INFO_REGNO_P(x) FP_REGNO_P(x) | |
294 | ||
295 | /* 1 if register REGNO can magically overlap other regs. | |
296 | Note that nonzero values work only in very special circumstances. | |
297 | We return 1 for an FP reg because "both" our FP regs | |
298 | are really the same reg. */ | |
299 | ||
300 | #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO) | |
301 | ||
302 | /* The class value for index registers, and the one for base regs. */ | |
303 | ||
304 | #define INDEX_REG_CLASS INDEX_REGS | |
305 | #define BASE_REG_CLASS GENERAL_REGS | |
306 | ||
307 | /* Get reg_class from a letter such as appears in the machine description. */ | |
308 | ||
309 | #define REG_CLASS_FROM_LETTER(C) \ | |
310 | ((C) == 'r' ? GENERAL_REGS : \ | |
311 | (C) == 'q' ? Q_REGS : \ | |
312 | (C) == 'f' ? FLOAT_REGS : \ | |
313 | (C) == 'a' ? AREG : (C) == 'b' ? BREG : \ | |
314 | (C) == 'c' ? CREG : (C) == 'd' ? DREG : \ | |
315 | (C) == 'A' ? ADREG : \ | |
316 | (C) == 'S' ? SIREG : \ | |
317 | (C) == 'D' ? DIREG : NO_REGS) | |
318 | ||
319 | /* The letters I, J, K, L and M in a register constraint string | |
320 | can be used to stand for particular ranges of immediate operands. | |
321 | This macro defines what the ranges are. | |
322 | C is the letter, and VALUE is a constant value. | |
323 | Return 1 if VALUE is in the range specified by C. | |
324 | ||
325 | I is for the maximum shifts. | |
326 | */ | |
327 | ||
328 | #define CONST_OK_FOR_LETTER_P(VALUE, C) \ | |
329 | ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 :0) | |
330 | ||
331 | /* Similar, but for floating constants, and defining letters G and H. | |
332 | Here VALUE is the CONST_DOUBLE rtx itself. */ | |
333 | ||
334 | #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ | |
335 | ((C) == 'G' ? ! (TARGET_80387 && standard_80387_constant_p (VALUE)) : 1) | |
336 | ||
337 | /* Given an rtx X being reloaded into a reg required to be | |
338 | in class CLASS, return the class of reg to actually use. | |
339 | In general this is just CLASS; but on some machines | |
340 | in some cases it is preferable to use a more restrictive class. | |
341 | On the 80386 series, we prevent floating constants from being | |
342 | reloaded into floating registers (since no move-insn can do that) | |
343 | and we ensure that QImodes aren't reloaded into the esi or edi reg. */ | |
344 | ||
345 | #define PREFERRED_RELOAD_CLASS(X,CLASS) \ | |
346 | (GET_CODE (X) == CONST_DOUBLE \ | |
347 | ? ((CLASS) == GENERAL_REGS || (CLASS) == ALL_REGS \ | |
348 | ? GENERAL_REGS : NO_REGS) \ | |
349 | : GET_MODE (X) == QImode \ | |
350 | ? ((CLASS) == GENERAL_REGS || (CLASS) == ALL_REGS \ | |
351 | ? Q_REGS \ | |
352 | : (CLASS) == INDEX_REGS ? (abort (), INDEX_REGS) \ | |
353 | : (CLASS)) \ | |
354 | : (CLASS)) | |
355 | ||
356 | /* Return the maximum number of consecutive registers | |
357 | needed to represent mode MODE in a register of class CLASS. */ | |
358 | /* On the 80386, this is the size of MODE in words, | |
359 | except in the FP regs, where a single reg is always enough. */ | |
360 | #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
361 | ((CLASS) == FLOAT_REGS ? 1 : \ | |
362 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) | |
363 | \f | |
364 | /* Stack layout; function entry, exit and calling. */ | |
365 | ||
366 | /* Define this if pushing a word on the stack | |
367 | makes the stack pointer a smaller address. */ | |
368 | #define STACK_GROWS_DOWNWARD | |
369 | ||
370 | /* Define this if the nominal address of the stack frame | |
371 | is at the high-address end of the local variables; | |
372 | that is, each additional local variable allocated | |
373 | goes at a more negative offset in the frame. */ | |
374 | #define FRAME_GROWS_DOWNWARD | |
375 | ||
376 | /* Offset within stack frame to start allocating local variables at. | |
377 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
378 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
379 | of the first local allocated. */ | |
380 | #define STARTING_FRAME_OFFSET 0 | |
381 | ||
382 | /* If we generate an insn to push BYTES bytes, | |
383 | this says how many the stack pointer really advances by. | |
384 | On 386 pushw decrements by exactly 2 no matter what the position was. | |
385 | On the 386 there is no pushb; we use pushw instead, and this | |
386 | has the effect of rounding up to 2. */ | |
387 | ||
388 | #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & (-2)) | |
389 | ||
390 | /* Offset of first parameter from the argument pointer register value. */ | |
391 | #define FIRST_PARM_OFFSET(FNDECL) 8 | |
392 | ||
393 | /* Value is 1 if returning from a function call automatically | |
394 | pops the arguments described by the number-of-args field in the call. | |
395 | FUNTYPE is the data type of the function (as a tree), | |
396 | or for a library call it is an identifier node for the subroutine name. | |
397 | ||
398 | On the 80386, the RTD insn may be used to pop them if the number | |
399 | of args is fixed, but if the number is variable then the caller | |
400 | must pop them all. RTD can't be used for library calls now | |
401 | because the library is compiled with the Unix compiler. | |
402 | Use of RTD is a selectable option, since it is incompatible with | |
403 | standard Unix calling sequences. If the option is not selected, | |
404 | the caller must always pop the args. */ | |
405 | ||
406 | #define RETURN_POPS_ARGS(FUNTYPE) \ | |
407 | (TARGET_RTD && TREE_CODE (FUNTYPE) != IDENTIFIER_NODE \ | |
408 | && (TYPE_ARG_TYPES (FUNTYPE) == 0 \ | |
409 | || TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) == void_type_node)) | |
410 | ||
411 | #define FUNCTION_VALUE(VALTYPE, FUNC) \ | |
412 | gen_rtx (REG, TYPE_MODE (VALTYPE), \ | |
413 | VALUE_REGNO(TYPE_MODE(VALTYPE))) | |
414 | ||
415 | /* Define how to find the value returned by a library function | |
416 | assuming the value has mode MODE. */ | |
417 | ||
418 | #define LIBCALL_VALUE(MODE) \ | |
419 | gen_rtx (REG, MODE, VALUE_REGNO(MODE)) | |
420 | ||
421 | /* 1 if N is a possible register number for function argument passing. | |
422 | On the 80386, no registers are used in this way. | |
423 | *NOTE* -mregparm does not work. | |
424 | It exists only to test register calling conventions. */ | |
425 | ||
426 | #define FUNCTION_ARG_REGNO_P(N) 0 | |
427 | /* Define a data type for recording info about an argument list | |
428 | during the scan of that argument list. This data type should | |
429 | hold all necessary information about the function itself | |
430 | and about the args processed so far, enough to enable macros | |
431 | such as FUNCTION_ARG to determine where the next arg should go. | |
432 | ||
433 | On the 80386, this is a single integer, which is a number of bytes | |
434 | of arguments scanned so far. */ | |
435 | ||
436 | #define CUMULATIVE_ARGS int | |
437 | ||
438 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
439 | for a call to a function whose data type is FNTYPE. | |
440 | For a library call, FNTYPE is 0. | |
441 | ||
442 | On the 80386, the offset starts at 0. */ | |
443 | ||
444 | #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE) \ | |
445 | ((CUM) = 0) | |
446 | ||
447 | /* Update the data in CUM to advance over an argument | |
448 | of mode MODE and data type TYPE. | |
449 | (TYPE is null for libcalls where that information may not be available.) */ | |
450 | ||
451 | #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
452 | ((CUM) += ((MODE) != BLKmode \ | |
453 | ? (GET_MODE_SIZE (MODE) + 3) & ~3 \ | |
454 | : (int_size_in_bytes (TYPE) + 3) & ~3)) | |
455 | ||
456 | /* Define where to put the arguments to a function. | |
457 | Value is zero to push the argument on the stack, | |
458 | or a hard register in which to store the argument. | |
459 | ||
460 | MODE is the argument's machine mode. | |
461 | TYPE is the data type of the argument (as a tree). | |
462 | This is null for libcalls where that information may | |
463 | not be available. | |
464 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
465 | the preceding args and about the function being called. | |
466 | NAMED is nonzero if this argument is a named parameter | |
467 | (otherwise it is an extra parameter matching an ellipsis). */ | |
468 | ||
469 | ||
470 | /* On the 80386 all args are pushed, except if -mregparm is specified | |
471 | then the first two words of arguments are passed in EAX, EDX. | |
472 | *NOTE* -mregparm does not work. | |
473 | It exists only to test register calling conventions. */ | |
474 | ||
475 | #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ | |
476 | ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0) | |
477 | ||
478 | /* For an arg passed partly in registers and partly in memory, | |
479 | this is the number of registers used. | |
480 | For args passed entirely in registers or entirely in memory, zero. */ | |
481 | ||
482 | ||
483 | #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ | |
484 | ((TARGET_REGPARM && (CUM) < 8 \ | |
485 | && 8 < ((CUM) + ((MODE) == BLKmode \ | |
486 | ? int_size_in_bytes (TYPE) \ | |
487 | : GET_MODE_SIZE (MODE)))) \ | |
488 | ? 2 - (CUM) / 4 : 0) | |
489 | ||
490 | /* This macro generates the assembly code for function entry. | |
491 | FILE is a stdio stream to output the code to. | |
492 | SIZE is an int: how many units of temporary storage to allocate. | |
493 | Refer to the array `regs_ever_live' to determine which registers | |
494 | to save; `regs_ever_live[I]' is nonzero if register number I | |
495 | is ever used in the function. This macro is responsible for | |
496 | knowing which registers should not be saved even if used. */ | |
497 | ||
498 | #define FUNCTION_PROLOGUE(FILE, SIZE) \ | |
499 | function_prologue (FILE, SIZE) | |
500 | ||
501 | /* Output assembler code to FILE to increment profiler label # LABELNO | |
502 | for profiling a function entry. */ | |
503 | ||
504 | #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
505 | fprintf (FILE, "\tmovl $%sP%d,%%edx\n\tcall _mcount\n", LPREFIX, (LABELNO)); | |
506 | ||
507 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
508 | the stack pointer does not matter. The value is tested only in | |
509 | functions that have frame pointers. | |
510 | No definition is equivalent to always zero. */ | |
511 | /* Note on the 386 it might be more efficient not to define this since | |
512 | we have to restore it ourselves from the frame pointer, in order to | |
513 | use pop */ | |
514 | ||
515 | #define EXIT_IGNORE_STACK 1 | |
516 | ||
517 | /* This macro generates the assembly code for function exit, | |
518 | on machines that need it. If FUNCTION_EPILOGUE is not defined | |
519 | then individual return instructions are generated for each | |
520 | return statement. Args are same as for FUNCTION_PROLOGUE. | |
521 | ||
522 | The function epilogue should not depend on the current stack pointer! | |
523 | It should use the frame pointer only. This is mandatory because | |
524 | of alloca; we also take advantage of it to omit stack adjustments | |
525 | before returning. */ | |
526 | ||
527 | #define FUNCTION_EPILOGUE(FILE, SIZE) \ | |
528 | function_epilogue (FILE, SIZE) | |
529 | ||
530 | /* If the memory address ADDR is relative to the frame pointer, | |
531 | correct it to be relative to the stack pointer instead. | |
532 | This is for when we don't use a frame pointer. | |
533 | ADDR should be a variable name. */ | |
534 | ||
535 | ||
536 | #define FIX_FRAME_POINTER_ADDRESS(ADDR,DEPTH) \ | |
537 | { int offset = -1; \ | |
538 | rtx regs = stack_pointer_rtx; \ | |
539 | if (ADDR == frame_pointer_rtx) \ | |
540 | offset = 0; \ | |
541 | else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) == frame_pointer_rtx \ | |
542 | && GET_CODE (XEXP (ADDR, 1)) == CONST_INT) \ | |
543 | offset = INTVAL (XEXP (ADDR, 1)); \ | |
544 | else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) == frame_pointer_rtx) \ | |
545 | { rtx other_reg = XEXP (ADDR, 1); \ | |
546 | offset = 0; \ | |
547 | regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \ | |
548 | else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 1) == frame_pointer_rtx) \ | |
549 | { rtx other_reg = XEXP (ADDR, 0); \ | |
550 | offset = 0; \ | |
551 | regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \ | |
552 | else if (GET_CODE (ADDR) == PLUS \ | |
553 | && GET_CODE (XEXP (ADDR, 0)) == PLUS \ | |
554 | && XEXP (XEXP (ADDR, 0), 0) == frame_pointer_rtx \ | |
555 | && GET_CODE (XEXP (ADDR, 1)) == CONST_INT) \ | |
556 | { rtx other_reg = XEXP (XEXP (ADDR, 0), 1); \ | |
557 | offset = INTVAL (XEXP (ADDR, 1)); \ | |
558 | regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \ | |
559 | else if (GET_CODE (ADDR) == PLUS \ | |
560 | && GET_CODE (XEXP (ADDR, 0)) == PLUS \ | |
561 | && XEXP (XEXP (ADDR, 0), 1) == frame_pointer_rtx \ | |
562 | && GET_CODE (XEXP (ADDR, 1)) == CONST_INT) \ | |
563 | { rtx other_reg = XEXP (XEXP (ADDR, 0), 0); \ | |
564 | offset = INTVAL (XEXP (ADDR, 1)); \ | |
565 | regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \ | |
566 | if (offset >= 0) \ | |
567 | { int regno; \ | |
568 | extern char call_used_regs[]; \ | |
569 | for (regno = FIRST_FLOAT_REG; regno < FIRST_PSEUDO_REGISTER; regno++)\ | |
570 | if (regs_ever_live[regno] && ! call_used_regs[regno]) \ | |
571 | offset += 8; \ | |
572 | for (regno=0 ; regno <FIRST_FLOAT_REG ; regno++) \ | |
573 | if (regs_ever_live[regno] && ! call_used_regs[regno]) \ | |
574 | offset += 4; \ | |
575 | offset -= 4; \ | |
576 | ADDR = plus_constant (regs, offset + (DEPTH)); } } \ | |
577 | \f | |
578 | /* Addressing modes, and classification of registers for them. */ | |
579 | ||
580 | /* #define HAVE_POST_INCREMENT */ | |
581 | /* #define HAVE_POST_DECREMENT */ | |
582 | ||
583 | /* #define HAVE_PRE_DECREMENT */ | |
584 | /* #define HAVE_PRE_INCREMENT */ | |
585 | ||
586 | /* Macros to check register numbers against specific register classes. */ | |
587 | ||
588 | /* These assume that REGNO is a hard or pseudo reg number. | |
589 | They give nonzero only if REGNO is a hard reg of the suitable class | |
590 | or a pseudo reg currently allocated to a suitable hard reg. | |
591 | Since they use reg_renumber, they are safe only once reg_renumber | |
592 | has been allocated, which happens in local-alloc.c. */ | |
593 | ||
594 | #define REGNO_OK_FOR_INDEX_P(REGNO) \ | |
595 | ((REGNO) < STACK_POINTER_REGNUM || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM) | |
596 | #define REGNO_OK_FOR_BASE_P(REGNO) \ | |
597 | ((REGNO) <= STACK_POINTER_REGNUM || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM) | |
598 | ||
599 | #define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4) | |
600 | #define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5) | |
601 | ||
602 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
603 | and check its validity for a certain class. | |
604 | We have two alternate definitions for each of them. | |
605 | The usual definition accepts all pseudo regs; the other rejects | |
606 | them unless they have been allocated suitable hard regs. | |
607 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
608 | ||
609 | Most source files want to accept pseudo regs in the hope that | |
610 | they will get allocated to the class that the insn wants them to be in. | |
611 | Source files for reload pass need to be strict. | |
612 | After reload, it makes no difference, since pseudo regs have | |
613 | been eliminated by then. */ | |
614 | ||
615 | #ifndef REG_OK_STRICT | |
616 | ||
617 | /* Nonzero if X is a hard reg that can be used as an index or if | |
618 | it is a pseudo reg. */ | |
619 | #define REG_OK_FOR_INDEX_P(X) (REGNO (X) < STACK_POINTER_REGNUM || REGNO (X) >= FIRST_PSEUDO_REGISTER) | |
620 | /* Nonzero if X is a hard reg that can be used as a base reg | |
621 | of if it is a pseudo reg. */ | |
622 | /* ?wfs */ | |
623 | #define REG_OK_FOR_BASE_P(X) (REGNO (X) <= STACK_POINTER_REGNUM || REGNO(X) >= FIRST_PSEUDO_REGISTER) | |
624 | #define REG_OK_FOR_STRREG_P(X) \ | |
625 | (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER) | |
626 | ||
627 | #else | |
628 | ||
629 | /* Nonzero if X is a hard reg that can be used as an index. */ | |
630 | #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
631 | /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
632 | #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
633 | #define REG_OK_FOR_STRREG_P(X) \ | |
634 | (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X))) | |
635 | ||
636 | #endif | |
637 | ||
638 | /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression | |
639 | that is a valid memory address for an instruction. | |
640 | The MODE argument is the machine mode for the MEM expression | |
641 | that wants to use this address. | |
642 | ||
643 | The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS, | |
644 | except for CONSTANT_ADDRESS_P which is usually machine-independent. */ | |
645 | ||
646 | #define MAX_REGS_PER_ADDRESS 2 | |
647 | ||
648 | #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X) | |
649 | ||
650 | /* Nonzero if the constant value X is a legitimate general operand. | |
651 | It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ | |
652 | ||
653 | #define LEGITIMATE_CONSTANT_P(X) 1 | |
654 | ||
655 | #define GO_IF_INDEXABLE_BASE(X, ADDR) \ | |
656 | if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) goto ADDR | |
657 | ||
658 | #define LEGITIMATE_INDEX_REG_P(X) \ | |
659 | (GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) | |
660 | ||
661 | /* Return 1 if X is an index or an index times a scale. */ | |
662 | ||
663 | #define LEGITIMATE_INDEX_P(X) \ | |
664 | (LEGITIMATE_INDEX_REG_P (X) \ | |
665 | || (GET_CODE (X) == MULT \ | |
666 | && LEGITIMATE_INDEX_REG_P (XEXP (X, 0)) \ | |
667 | && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
668 | && (INTVAL (XEXP (X, 1)) == 2 \ | |
669 | || INTVAL (XEXP (X, 1)) == 4 \ | |
670 | || INTVAL (XEXP (X, 1)) == 8))) | |
671 | ||
672 | /* Go to ADDR if X is an index term, a base reg, or a sum of those. */ | |
673 | ||
674 | #define GO_IF_INDEXING(X, ADDR) \ | |
675 | { if (LEGITIMATE_INDEX_P (X)) goto ADDR; \ | |
676 | GO_IF_INDEXABLE_BASE (X, ADDR); \ | |
677 | if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 0))) \ | |
678 | { GO_IF_INDEXABLE_BASE (XEXP (X, 1), ADDR); } \ | |
679 | if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 1))) \ | |
680 | { GO_IF_INDEXABLE_BASE (XEXP (X, 0), ADDR); } } | |
681 | ||
682 | /* We used to allow this, but it isn't ever used. | |
683 | || ((GET_CODE (X) == POST_DEC || GET_CODE (X) == POST_INC) \ | |
684 | && REG_P (XEXP (X, 0)) \ | |
685 | && REG_OK_FOR_STRREG_P (XEXP (X, 0))) \ | |
686 | */ | |
687 | ||
688 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ | |
689 | { if (CONSTANT_ADDRESS_P (X)) goto ADDR; \ | |
690 | GO_IF_INDEXING (X, ADDR); \ | |
691 | if (GET_CODE (X) == PLUS) \ | |
692 | { if (CONSTANT_ADDRESS_P (XEXP (X, 1))) \ | |
693 | GO_IF_INDEXING (XEXP (X, 0), ADDR); \ | |
694 | if (CONSTANT_ADDRESS_P (XEXP (X, 0))) \ | |
695 | GO_IF_INDEXING (XEXP (X, 1), ADDR); } } | |
696 | ||
697 | /* Try machine-dependent ways of modifying an illegitimate address | |
698 | to be legitimate. If we find one, return the new, valid address. | |
699 | This macro is used in only one place: `memory_address' in explow.c. | |
700 | ||
701 | OLDX is the address as it was before break_out_memory_refs was called. | |
702 | In some cases it is useful to look at this to decide what needs to be done. | |
703 | ||
704 | MODE and WIN are passed so that this macro can use | |
705 | GO_IF_LEGITIMATE_ADDRESS. | |
706 | ||
707 | It is always safe for this macro to do nothing. It exists to recognize | |
708 | opportunities to optimize the output. | |
709 | ||
710 | For the 80386, we handle X+REG by loading X into a register R and | |
711 | using R+REG. R will go in a general reg and indexing will be used. | |
712 | However, if REG is a broken-out memory address or multiplication, | |
713 | nothing needs to be done because REG can certainly go in a general reg. */ | |
714 | ||
715 | #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ | |
716 | { register int ch = (X) != (OLDX); \ | |
717 | if (GET_CODE (X) == PLUS) \ | |
718 | { if (GET_CODE (XEXP (X, 0)) == MULT) \ | |
719 | ch = 1, XEXP (X, 0) = force_operand (XEXP (X, 0), 0); \ | |
720 | if (GET_CODE (XEXP (X, 1)) == MULT) \ | |
721 | ch = 1, XEXP (X, 1) = force_operand (XEXP (X, 1), 0); \ | |
722 | if (ch && GET_CODE (XEXP (X, 1)) == REG \ | |
723 | && GET_CODE (XEXP (X, 0)) == REG) \ | |
724 | return X; \ | |
725 | if (ch) { GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); } \ | |
726 | if (GET_CODE (XEXP (X, 0)) == REG \ | |
727 | || (GET_CODE (XEXP (X, 0)) == SIGN_EXTEND \ | |
728 | && GET_CODE (XEXP (XEXP (X, 0), 0)) == REG \ | |
729 | && GET_MODE (XEXP (XEXP (X, 0), 0)) == HImode)) \ | |
730 | { register rtx temp = gen_reg_rtx (Pmode); \ | |
731 | register rtx val = force_operand (XEXP (X, 1), temp); \ | |
732 | if (val != temp) emit_move_insn (temp, val, 0); \ | |
733 | XEXP (X, 1) = temp; \ | |
734 | return X; } \ | |
735 | else if (GET_CODE (XEXP (X, 1)) == REG \ | |
736 | || (GET_CODE (XEXP (X, 1)) == SIGN_EXTEND \ | |
737 | && GET_CODE (XEXP (XEXP (X, 1), 0)) == REG \ | |
738 | && GET_MODE (XEXP (XEXP (X, 1), 0)) == HImode)) \ | |
739 | { register rtx temp = gen_reg_rtx (Pmode); \ | |
740 | register rtx val = force_operand (XEXP (X, 0), temp); \ | |
741 | if (val != temp) emit_move_insn (temp, val, 0); \ | |
742 | XEXP (X, 0) = temp; \ | |
743 | return X; }}} | |
744 | ||
745 | /* Go to LABEL if ADDR (a legitimate address expression) | |
746 | has an effect that depends on the machine mode it is used for. | |
747 | On the 80386, only postdecrement and postincrement address depend thus | |
748 | (the amount of decrement or increment being the length of the operand). */ | |
749 | #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ | |
750 | if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL | |
751 | \f | |
752 | /* Specify the machine mode that this machine uses | |
753 | for the index in the tablejump instruction. */ | |
754 | #define CASE_VECTOR_MODE Pmode | |
755 | ||
756 | /* Define this if the tablejump instruction expects the table | |
757 | to contain offsets from the address of the table. | |
758 | Do not define this if the table should contain absolute addresses. */ | |
759 | /* #define CASE_VECTOR_PC_RELATIVE */ | |
760 | ||
761 | /* Specify the tree operation to be used to convert reals to integers. | |
762 | This should be changed to take advantage of fist --wfs ?? | |
763 | */ | |
764 | #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR | |
765 | ||
766 | /* This is the kind of divide that is easiest to do in the general case. */ | |
767 | #define EASY_DIV_EXPR TRUNC_DIV_EXPR | |
768 | ||
769 | /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
770 | #define DEFAULT_SIGNED_CHAR 1 | |
771 | ||
772 | /* Max number of bytes we can move from memory to memory | |
773 | in one reasonably fast instruction. */ | |
774 | #define MOVE_MAX 4 | |
775 | ||
776 | /* Define this if zero-extension is slow (more than one real instruction). */ | |
777 | /* #define SLOW_ZERO_EXTEND */ | |
778 | ||
779 | /* Nonzero if access to memory by bytes is slow and undesirable. */ | |
780 | #define SLOW_BYTE_ACCESS 0 | |
781 | ||
782 | /* Define if shifts truncate the shift count | |
783 | which implies one can omit a sign-extension or zero-extension | |
784 | of a shift count. */ | |
785 | #define SHIFT_COUNT_TRUNCATED | |
786 | ||
787 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits | |
788 | is done just by pretending it is already truncated. */ | |
789 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
790 | ||
791 | /* We assume that the store-condition-codes instructions store 0 for false | |
792 | and some other value for true. This is the value stored for true. */ | |
793 | ||
794 | #define STORE_FLAG_VALUE 1 | |
795 | ||
796 | /* When a prototype says `char' or `short', really pass an `int'. | |
797 | (The 386 can't easily push less than an int.) */ | |
798 | ||
799 | #define PROMOTE_PROTOTYPES | |
800 | ||
801 | /* Specify the machine mode that pointers have. | |
802 | After generation of rtl, the compiler makes no further distinction | |
803 | between pointers and any other objects of this machine mode. */ | |
804 | #define Pmode SImode | |
805 | ||
806 | /* A function address in a call instruction | |
807 | is a byte address (for indexing purposes) | |
808 | so give the MEM rtx a byte's mode. */ | |
809 | #define FUNCTION_MODE QImode | |
810 | ||
811 | /* Define this if addresses of constant functions | |
812 | shouldn't be put through pseudo regs where they can be cse'd. | |
813 | Desirable on the 386 because a CALL with a constant address is | |
814 | not much slower than one with a register address. */ | |
815 | #define NO_FUNCTION_CSE | |
816 | ||
817 | /* Compute the cost of computing a constant rtl expression RTX | |
818 | whose rtx-code is CODE. The body of this macro is a portion | |
819 | of a switch statement. If the code is computed here, | |
820 | return it with a return statement. Otherwise, break from the switch. */ | |
821 | ||
822 | #define CONST_COSTS(RTX,CODE) \ | |
823 | case CONST_INT: \ | |
824 | if (RTX == const0_rtx) return 0; \ | |
825 | if ((unsigned) INTVAL (RTX) < 077) return 1; \ | |
826 | case CONST: \ | |
827 | case LABEL_REF: \ | |
828 | case SYMBOL_REF: \ | |
829 | return 3; \ | |
830 | case CONST_DOUBLE: \ | |
831 | return 5; \ | |
832 | case PLUS: \ | |
833 | if (GET_CODE (XEXP (RTX, 0)) == REG \ | |
834 | && GET_CODE (XEXP (RTX, 1)) == CONST_INT) \ | |
835 | return 2; | |
836 | \f | |
837 | /* Tell final.c how to eliminate redundant test instructions. */ | |
838 | ||
839 | /* ??? Find a better place to put this. */ | |
840 | #if 0 | |
841 | #define FINAL_PRESCAN_INSN(INSN, OPERANDS, NOPERANDS) \ | |
842 | fp_hook (INSN, OPERANDS, NOPERANDS) | |
843 | #endif | |
844 | ||
845 | /* Here we define machine-dependent flags and fields in cc_status | |
846 | (see `conditions.h'). */ | |
847 | ||
848 | /* Set if the cc value is actually in the 80387, so a floating point | |
849 | conditional branch must be output. */ | |
850 | #define CC_IN_80387 04000 | |
851 | ||
852 | /* Store in cc_status the expressions | |
853 | that the condition codes will describe | |
854 | after execution of an instruction whose pattern is EXP. | |
855 | Do not alter them if the instruction would not alter the cc's. */ | |
856 | ||
857 | #define NOTICE_UPDATE_CC(EXP, INSN) \ | |
858 | notice_update_cc((EXP)) | |
859 | ||
860 | /* Output a signed jump insn. Use template NORMAL ordinarily, or | |
861 | FLOAT following a floating point comparison. | |
862 | Use NO_OV following an arithmetic insn that set the cc's | |
863 | before a test insn that was deleted. | |
864 | NO_OV may be zero, meaning final should reinsert the test insn | |
865 | because the jump cannot be handled properly without it. */ | |
866 | ||
867 | #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \ | |
868 | { \ | |
869 | if (cc_status.flags & CC_IN_80387) \ | |
870 | return FLOAT; \ | |
871 | if (cc_status.flags & CC_NO_OVERFLOW) \ | |
872 | return NO_OV; \ | |
873 | return NORMAL; \ | |
874 | } | |
875 | \f | |
876 | /* Control the assembler format that we output. */ | |
877 | ||
878 | #ifdef ATT | |
879 | #include <syms.h> | |
880 | #else | |
881 | #define FILNMLEN 14 | |
882 | #endif | |
883 | ||
884 | /* How to refer to registers in assembler output. | |
885 | This sequence is indexed by compiler's hard-register-number (see above). */ | |
886 | ||
887 | /* In order to refer to the first 8 regs as 32 bit regs prefix an "e" | |
888 | For non floating point regs, the following are the HImode names. | |
889 | */ | |
890 | ||
891 | ||
892 | #define HI_REGISTER_NAMES \ | |
893 | {"ax","dx","cx","bx","si","di","bp","sp", \ | |
894 | "st","st(1)"} | |
895 | /* ,"st(2)","st(3)","st(4)","st(5)" } */ | |
896 | #define REGISTER_NAMES HI_REGISTER_NAMES | |
897 | ||
898 | /* Note we are omitting these since currently I don't know how | |
899 | to get gcc to use these, since they want the same but different | |
900 | number as al, and ax. | |
901 | */ | |
902 | ||
903 | /* note the last four are not really qi_registsers, but | |
904 | the md will have to never output movb into one of them | |
905 | only a movw . There is no movb into the hardware reg | |
906 | esi that I can find */ | |
907 | ||
908 | #define QI_REGISTER_NAMES \ | |
909 | {"al", "dl", "cl", "bl", "si", "di", "bp", "sp",} | |
910 | ||
911 | /* | |
912 | Don't know how to use these, yet. They overlap with ax,dx,cx,bx | |
913 | and so would clobber al,dl,cl,bl | |
914 | #define QI_REGISTER_NAMES_TOP \ | |
915 | {"ah", \ | |
916 | "dh", \ | |
917 | "ch", \ | |
918 | "bh", } | |
919 | */ | |
920 | ||
921 | /* How to renumber registers for dbxand gdb. */ | |
922 | ||
923 | /* {0,2,1,3,6,7,4,5,12,13,14,15,16,17} */ | |
924 | #define DBX_REGISTER_NUMBER(n) \ | |
925 | ((n)==0?0 :(n)==1?2 :(n)==2?1 :(n)==3?3 :(n)==4?6 :(n)==5?7 :(n)==6?4 :(n)==7?5 :(n)==8?12 :(n)==9?12 :(n)) | |
926 | ||
927 | /* This is how to output the definition of a user-level label named NAME, | |
928 | such as the label on a static function or variable NAME. */ | |
929 | ||
930 | #define ASM_OUTPUT_LABEL(FILE,NAME) \ | |
931 | (assemble_name (FILE, NAME), fputs (":\n", FILE)) | |
932 | ||
933 | /* This is how to output an assembler line defining a `double' constant. */ | |
934 | ||
935 | #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ | |
936 | fprintf (FILE, "%s%.22e\n",ASM_DOUBLE, (VALUE)) | |
937 | ||
938 | ||
939 | /* This is how to output an assembler line defining a `float' constant. */ | |
940 | ||
941 | #define ASM_OUTPUT_FLOAT(FILE,VALUE) \ | |
942 | do { union { float f; long l;} tem; \ | |
943 | tem.f = (VALUE); \ | |
944 | fputs(ASM_LONG,FILE); \ | |
945 | fprintf((FILE), "0x%x\n", tem.l); \ | |
946 | } while (0) | |
947 | ||
948 | ||
949 | /* Store in OUTPUT a string (made with alloca) containing | |
950 | an assembler-name for a local static variable named NAME. | |
951 | LABELNO is an integer which is different for each call. */ | |
952 | ||
953 | #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ | |
954 | ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ | |
955 | sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) | |
956 | ||
957 | ||
958 | ||
959 | /* This is how to output an assembler line defining an `int' constant. */ | |
960 | ||
961 | #define ASM_OUTPUT_INT(FILE,VALUE) \ | |
962 | ( fprintf (FILE,ASM_LONG), \ | |
963 | output_addr_const (FILE,(VALUE)), \ | |
964 | putc('\n',FILE)) | |
965 | ||
966 | /* Likewise for `char' and `short' constants. */ | |
967 | /* is this supposed to do align too?? */ | |
968 | ||
969 | #define ASM_OUTPUT_SHORT(FILE,VALUE) \ | |
970 | ( fprintf (FILE,ASM_SHORT), \ | |
971 | output_addr_const (FILE,(VALUE)), \ | |
972 | putc('\n',FILE)) | |
973 | ||
974 | /* | |
975 | #define ASM_OUTPUT_SHORT(FILE,VALUE) \ | |
976 | ( fputs (ASM_BYTE,FILE), \ | |
977 | output_addr_const (FILE,(VALUE)), \ | |
978 | fputs ( ",",FILE), \ | |
979 | output_addr_const (FILE,(VALUE)), \ | |
980 | fputs (" >> 8\n",FILE)) | |
981 | */ | |
982 | ||
983 | ||
984 | #define ASM_OUTPUT_CHAR(FILE,VALUE) \ | |
985 | ( fprintf (FILE, ASM_BYTE), \ | |
986 | output_addr_const (FILE,(VALUE)), \ | |
987 | putc('\n',FILE)) | |
988 | ||
989 | /* This is how to output an assembler line for a numeric constant byte. */ | |
990 | ||
991 | #define ASM_OUTPUT_BYTE(FILE,VALUE) \ | |
992 | fprintf ((FILE), "%s0x%x\n", ASM_BYTE, (VALUE)) | |
993 | ||
994 | /* This is how to output an insn to push a register on the stack. | |
995 | It need not be very fast code. */ | |
996 | ||
997 | #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ | |
998 | fprintf (FILE, "\tpushl e%s\n", reg_names[REGNO]) | |
999 | ||
1000 | /* This is how to output an insn to pop a register from the stack. | |
1001 | It need not be very fast code. */ | |
1002 | ||
1003 | #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ | |
1004 | fprintf (FILE, "\tpopl e%s\n", reg_names[REGNO]) | |
1005 | ||
1006 | /* This is how to output an element of a case-vector that is absolute. | |
1007 | */ | |
1008 | ||
1009 | #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
1010 | fprintf (FILE, "%s%s%d\n",ASM_LONG,LPREFIX, VALUE) | |
1011 | ||
1012 | /* This is how to output an element of a case-vector that is relative. | |
1013 | We don't use these on the 386 yet, because the ATT assembler can't do | |
1014 | forward reference the differences. | |
1015 | */ | |
1016 | ||
1017 | #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) abort(); \ | |
1018 | fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL) | |
1019 | ||
1020 | /* Define the parentheses used to group arithmetic operations | |
1021 | in assembler code. */ | |
1022 | ||
1023 | #define ASM_OPEN_PAREN "" | |
1024 | #define ASM_CLOSE_PAREN "" | |
1025 | ||
1026 | /* Define results of standard character escape sequences. */ | |
1027 | #define TARGET_BELL 007 | |
1028 | #define TARGET_BS 010 | |
1029 | #define TARGET_TAB 011 | |
1030 | #define TARGET_NEWLINE 012 | |
1031 | #define TARGET_VT 013 | |
1032 | #define TARGET_FF 014 | |
1033 | #define TARGET_CR 015 | |
1034 | ||
1035 | /* Print operand X (an rtx) in assembler syntax to file FILE. | |
1036 | CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. | |
1037 | The CODE z takes the size of operand from the following digit, and | |
1038 | outputs b,w,or l respectively. | |
1039 | ||
1040 | On the 80386, we use several such letters: | |
1041 | f -- float insn (print a CONST_DOUBLE as a float rather than in hex). | |
1042 | L,W,B,Q,S -- print the opcode suffix for specified size of operand. | |
1043 | R -- print the prefix for register names. | |
1044 | z -- print the opcode suffix for the size of the current operand. | |
1045 | * -- print a star (in certain assembler syntax) | |
1046 | w -- print the operand as if it's a "word" (HImode) even if it isn't. | |
1047 | w -- print the operand as if it's a byte (QImode) even if it isn't. | |
1048 | c -- don't print special prefixes before constant operands. */ | |
1049 | ||
1050 | #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ | |
1051 | ((CODE) == '*') | |
1052 | ||
1053 | #define PRINT_OPERAND(FILE, X, CODE) \ | |
1054 | print_operand (FILE, X, CODE) | |
1055 | \f | |
1056 | ||
1057 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ | |
1058 | print_operand_address (FILE, ADDR) | |
1059 | ||
1060 | /* Routines in gnulib that return floats must return them in an fp reg, | |
1061 | just as other functions do which return such values. | |
1062 | These macros make that happen. */ | |
1063 | ||
1064 | #define SFVALUE float | |
1065 | #define INTIFY(FLOATVAL) FLOATVAL | |
1066 | ||
1067 | /* Nonzero if INSN magically clobbers register REGNO. */ | |
1068 | ||
1069 | #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) \ | |
1070 | (FP_REGNO_P (REGNO) \ | |
1071 | && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER)) | |
1072 | ||
1073 | /* a letter which is not needed by the normal asm syntax, which | |
1074 | we can use for operand syntax in the extended asm */ | |
1075 | ||
1076 | #define ASM_OPERAND_LETTER '#' | |
1077 | \f | |
1078 | ||
1079 | /* | |
1080 | Local variables: | |
1081 | version-control: t | |
1082 | End: | |
1083 | */ |