projects / unix-history / blame
| Commit | Line | Data |
|---|---|---|
| bdc5e0ad CT |
1 | /* |
| 2 | * Copyright (c) 1992 The Regents of the University of California. | |
| 3 | * All rights reserved. | |
| 4 | * | |
| 5 | * This software was developed by the Computer Systems Engineering group | |
| 6 | * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and | |
| 7 | * contributed to Berkeley. | |
| 8 | * | |
| 9 | * %sccs.include.redist.c% | |
| 10 | * | |
| 11 | * @(#)trap.h 7.1 (Berkeley) %G% | |
| 12 | * | |
| 13 | * from: $Header: trap.h,v 1.8 92/07/03 18:49:02 torek Exp $ | |
| 14 | */ | |
| 15 | ||
| 16 | #ifndef _MACHINE_TRAP_H | |
| 17 | #define _MACHINE_TRAP_H | |
| 18 | /* | |
| 19 | * | |
| 20 | * The SPARC has a Trap Base Register (TBR) which holds the upper 20 bits | |
| 21 | * of the trap vector table. The next eight bits are supplied by the | |
| 22 | * hardware when the trap occurs, and the bottom four bits are always | |
| 23 | * zero (so that we can shove up to 16 bytes of executable code---exactly | |
| 24 | * four instructions---into each trap vector). | |
| 25 | * | |
| 26 | * The hardware allocates half the trap vectors to hardware and half to | |
| 27 | * software. | |
| 28 | * | |
| 29 | * Traps have priorities assigned (lower number => higher priority). | |
| 30 | */ | |
| 31 | ||
| 32 | #if defined(KERNEL) && !defined(LOCORE) | |
| 33 | struct trapvec { | |
| 34 | int tv_instr[4]; /* the four instructions */ | |
| 35 | }; | |
| 36 | extern struct trapvec trapbase[256]; /* the 256 vectors */ | |
| 37 | #endif | |
| 38 | ||
| 39 | /* trap vec (pri) description */ | |
| 40 | #define T_RESET 0x00 /* (1) not actually vectored; jumps to 0 */ | |
| 41 | #define T_TEXTFAULT 0x01 /* (2) address fault during instr fetch */ | |
| 42 | #define T_ILLINST 0x02 /* (3) illegal instruction */ | |
| 43 | #define T_PRIVINST 0x03 /* (4) privileged instruction */ | |
| 44 | #define T_FPDISABLED 0x04 /* (5) fp instr while fp disabled */ | |
| 45 | #define T_WINOF 0x05 /* (6) register window overflow */ | |
| 46 | #define T_WINUF 0x06 /* (7) register window underflow */ | |
| 47 | #define T_ALIGN 0x07 /* (8) address not properly aligned */ | |
| 48 | #define T_FPE 0x08 /* (9) floating point exception */ | |
| 49 | #define T_DATAFAULT 0x09 /* (10) address fault during data fetch */ | |
| 50 | #define T_TAGOF 0x0a /* (11) tag overflow */ | |
| 51 | /* 0x0b unused */ | |
| 52 | /* 0x0c unused */ | |
| 53 | /* 0x0d unused */ | |
| 54 | /* 0x0e unused */ | |
| 55 | /* 0x0f unused */ | |
| 56 | /* 0x10 unused */ | |
| 57 | #define T_L1INT 0x11 /* (27) level 1 interrupt */ | |
| 58 | #define T_L2INT 0x12 /* (26) level 2 interrupt */ | |
| 59 | #define T_L3INT 0x13 /* (25) level 3 interrupt */ | |
| 60 | #define T_L4INT 0x14 /* (24) level 4 interrupt */ | |
| 61 | #define T_L5INT 0x15 /* (23) level 5 interrupt */ | |
| 62 | #define T_L6INT 0x16 /* (22) level 6 interrupt */ | |
| 63 | #define T_L7INT 0x17 /* (21) level 7 interrupt */ | |
| 64 | #define T_L8INT 0x18 /* (20) level 8 interrupt */ | |
| 65 | #define T_L9INT 0x19 /* (19) level 9 interrupt */ | |
| 66 | #define T_L10INT 0x1a /* (18) level 10 interrupt */ | |
| 67 | #define T_L11INT 0x1b /* (17) level 11 interrupt */ | |
| 68 | #define T_L12INT 0x1c /* (16) level 12 interrupt */ | |
| 69 | #define T_L13INT 0x1d /* (15) level 13 interrupt */ | |
| 70 | #define T_L14INT 0x1e /* (14) level 14 interrupt */ | |
| 71 | #define T_L15INT 0x1f /* (13) level 15 interrupt */ | |
| 72 | /* 0x20 unused */ | |
| 73 | /* through 0x23 unused */ | |
| 74 | #define T_CPDISABLED 0x24 /* (5) coprocessor instr while disabled */ | |
| 75 | /* 0x25 unused */ | |
| 76 | /* through 0x27 unused */ | |
| 77 | #define T_CPEXCEPTION 0x28 /* (9) coprocessor exception */ | |
| 78 | /* 0x29 unused */ | |
| 79 | /* through 0x7f unused */ | |
| 80 | ||
| 81 | /* beginning of `user' vectors (from trap instructions) - all priority 12 */ | |
| 82 | #define T_SUN_SYSCALL 0x80 /* system call */ | |
| 83 | #define T_BREAKPOINT 0x81 /* breakpoint `instruction' */ | |
| 84 | #define T_DIV0 0x82 /* division routine was handed 0 */ | |
| 85 | #define T_FLUSHWIN 0x83 /* flush windows */ | |
| 86 | #define T_CLEANWIN 0x84 /* provide clean windows */ | |
| 87 | #define T_RANGECHECK 0x85 /* ? */ | |
| 88 | #define T_FIXALIGN 0x86 /* fix up unaligned accesses */ | |
| 89 | #define T_INTOF 0x87 /* integer overflow ? */ | |
| 90 | #define T_KGDB_EXEC 0x88 /* for kernel gdb */ | |
| 91 | #define T_BSD_SYSCALL 0x89 /* BSD system call */ | |
| 92 | ||
| 93 | /* 0x8a..0xff are currently unallocated */ | |
| 94 | ||
| 95 | #ifdef KERNEL /* pseudo traps for locore.s */ | |
| 96 | #define T_RWRET -1 /* need first user window for trap return */ | |
| 97 | #define T_AST -2 /* no-op, just needed reschedule or profile */ | |
| 98 | #endif | |
| 99 | ||
| 100 | /* flags to system call (flags in %g1 along with syscall number) */ | |
| 101 | #define SYSCALL_G2RFLAG 0x400 /* on success, return to %g2 rather than npc */ | |
| 102 | #define SYSCALL_G7RFLAG 0x800 /* use %g7 as above (deprecated) */ | |
| 103 | ||
| 104 | /* | |
| 105 | * `software trap' macros to keep people happy (sparc v8 manual says not | |
| 106 | * to set the upper bits). | |
| 107 | */ | |
| 108 | #define ST_BREAKPOINT (T_BREAKPOINT & 0x7f) | |
| 109 | #define ST_DIV0 (T_DIV0 & 0x7f) | |
| 110 | #define ST_FLUSHWIN (T_FLUSHWIN & 0x7f) | |
| 111 | #define ST_SYSCALL (T_BSD_SYSCALL & 0x7f) | |
| 112 | ||
| 113 | #endif /* _MACHINE_TRAP_H_ */ |