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adding GNU dc ("desk calculator")
[unix-history] / sys / i386 / isa / vector.s
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15637ed4
RG		 1/* vector.s */
2/*
3 * PATCHES MAGIC LEVEL PATCH THAT GOT US HERE
4 * -------------------- ----- ----------------------
5 * CURRENT PATCH LEVEL: 1 00167
6 * -------------------- ----- ----------------------
7 *
8 * 04 Jun 93 Bruce Evans Fixed irq_num vs id_num for multiple
9 * devices configed on the same irq with
10 * respect to ipending.
11 *
12 */
13
14#include "i386/isa/icu.h"
15#include "i386/isa/isa.h"
16#include "vector.h"
17
18#define ICU_EOI 0x20 /* XXX - define elsewhere */
19
20#define IRQ_BIT(irq_num) (1 << ((irq_num) % 8))
21#define IRQ_BYTE(irq_num) ((irq_num) / 8)
22
23#define ENABLE_ICU1 \
24 movb $ICU_EOI,%al ; /* as soon as possible send EOI ... */ \
25 FASTER_NOP ; /* ... ASAP ... */ \
26 outb %al,$IO_ICU1 /* ... to clear in service bit */
27#ifdef AUTO_EOI_1
28#undef ENABLE_ICU1 /* we now use auto-EOI to reduce i/o */
29#define ENABLE_ICU1
30#endif
31
32#define ENABLE_ICU1_AND_2 \
33 movb $ICU_EOI,%al ; /* as above */ \
34 FASTER_NOP ; \
35 outb %al,$IO_ICU2 ; /* but do second icu first */ \
36 FASTER_NOP ; \
37 outb %al,$IO_ICU1 /* then first icu */
38#ifdef AUTO_EOI_2
39#undef ENABLE_ICU1_AND_2 /* data sheet says no auto-EOI on slave ... */
40#define ENABLE_ICU1_AND_2 /* ... but it works */
41#endif
42
43/*
44 * Macros for interrupt interrupt entry, call to handler, and exit.
45 *
46 * XXX - the interrupt frame is set up to look like a trap frame. This is
47 * usually a waste of time. The only interrupt handlers that want a frame
48 * are the clock handler (it wants a clock frame), the npx handler (it's
49 * easier to do right all in assembler). The interrupt return routine
50 * needs a trap frame for rare AST's (it could easily convert the frame).
51 * The direct costs of setting up a trap frame are two pushl's (error
52 * code and trap number), an addl to get rid of these, and pushing and
53 * popping the call-saved regs %esi, %edi and %ebp twice, The indirect
54 * costs are making the driver interface nonuniform so unpending of
55 * interrupts is more complicated and slower (call_driver(unit) would
56 * be easier than ensuring an interrupt frame for all handlers. Finally,
57 * there are some struct copies in the npx handler and maybe in the clock
58 * handler that could be avoided by working more with pointers to frames
59 * instead of frames.
60 *
61 * XXX - should we do a cld on every system entry to avoid the requirement
62 * for scattered cld's?
63 *
64 * Coding notes for *.s:
65 *
66 * If possible, avoid operations that involve an operand size override.
67 * Word-sized operations might be smaller, but the operand size override
68 * makes them slower on on 486's and no faster on 386's unless perhaps
69 * the instruction pipeline is depleted. E.g.,
70 *
71 * Use movl to seg regs instead of the equivalent but more descriptive
72 * movw - gas generates an irelevant (slower) operand size override.
73 *
74 * Use movl to ordinary regs in preference to movw and especially
75 * in preference to movz[bw]l. Use unsigned (long) variables with the
76 * top bits clear instead of unsigned short variables to provide more
77 * opportunities for movl.
78 *
79 * If possible, use byte-sized operations. They are smaller and no slower.
80 *
81 * Use (%reg) instead of 0(%reg) - gas generates larger code for the latter.
82 *
83 * If the interrupt frame is made more flexible, INTR can push %eax first
84 * and decide the ipending case with less overhead, e.g., by avoiding
85 * loading segregs.
86 */
87
88#define FAST_INTR(unit, irq_num, id_num, handler, enable_icus) \
89 pushl %eax ; /* save only call-used registers */ \
90 pushl %ecx ; \
91 pushl %edx ; \
92 pushl %ds ; \
93 /* pushl %es ; know compiler doesn't do string insns */ \
94 movl $KDSEL,%eax ; \
95 movl %ax,%ds ; \
96 /* movl %ax,%es ; */ \
97 SHOW_CLI ; /* although it interferes with "ASAP" */ \
98 pushl $unit ; \
99 call handler ; /* do the work ASAP */ \
100 enable_icus ; /* (re)enable ASAP (helps edge trigger?) */ \
101 addl $4,%esp ; \
102 incl _cnt+V_INTR ; /* book-keeping can wait */ \
103 COUNT_EVENT(_intrcnt_actv, id_num) ; \
104 SHOW_STI ; \
105 /* popl %es ; */ \
106 popl %ds ; \
107 popl %edx; \
108 popl %ecx; \
109 popl %eax; \
110 iret
111
112#define INTR(unit, irq_num, id_num, mask, handler, icu, enable_icus, reg, stray) \
113 pushl $0 ; /* dummy error code */ \
114 pushl $T_ASTFLT ; \
115 pushal ; \
116 pushl %ds ; /* save our data and extra segments ... */ \
117 pushl %es ; \
118 movl $KDSEL,%eax ; /* ... and reload with kernel's own ... */ \
119 movl %ax,%ds ; /* ... early in case SHOW_A_LOT is on */ \
120 movl %ax,%es ; \
121 SHOW_CLI ; /* interrupt did an implicit cli */ \
122 movb _imen + IRQ_BYTE(irq_num),%al ; \
123 orb $IRQ_BIT(irq_num),%al ; \
124 movb %al,_imen + IRQ_BYTE(irq_num) ; \
125 SHOW_IMEN ; \
126 FASTER_NOP ; \
127 outb %al,$icu+1 ; \
128 enable_icus ; \
129 incl _cnt+V_INTR ; /* tally interrupts */ \
130 movl _cpl,%eax ; \
131 testb $IRQ_BIT(irq_num),%reg ; \
132 jne 2f ; \
1331: ; \
134 COUNT_EVENT(_intrcnt_actv, id_num) ; \
135 movl _cpl,%eax ; \
136 pushl %eax ; \
137 pushl $unit ; \
138 orl mask,%eax ; \
139 movl %eax,_cpl ; \
140 SHOW_CPL ; \
141 SHOW_STI ; \
142 sti ; \
143 call handler ; \
144 movb _imen + IRQ_BYTE(irq_num),%al ; \
145 andb $~IRQ_BIT(irq_num),%al ; \
146 movb %al,_imen + IRQ_BYTE(irq_num) ; \
147 SHOW_IMEN ; \
148 FASTER_NOP ; \
149 outb %al,$icu+1 ; \
150 jmp doreti ; \
151; \
152 ALIGN_TEXT ; \
1532: ; \
154 COUNT_EVENT(_intrcnt_pend, id_num) ; \
155 movl $1b,%eax ; /* register resume address */ \
156 /* XXX - someday do it at attach time */ \
157 movl %eax,Vresume + (irq_num) * 4 ; \
158 orb $IRQ_BIT(irq_num),_ipending + IRQ_BYTE(irq_num) ; \
159 SHOW_IPENDING ; \
160 popl %es ; \
161 popl %ds ; \
162 popal ; \
163 addl $4+4,%esp ; \
164 iret
165
166/*
167 * vector.h has defined a macro 'BUILD_VECTORS' containing a big list of info
168 * about vectors, including a submacro 'BUILD_VECTOR' that operates on the
169 * info about each vector. We redefine 'BUILD_VECTOR' to expand the info
170 * in different ways. Here we expand it to a list of interrupt handlers.
171 * This order is of course unimportant. Elsewhere we expand it to inline
172 * linear search code for which the order is a little more important and
173 * concatenating the code with no holes is very important.
174 *
175 * XXX - now there is BUILD_FAST_VECTOR as well as BUILD_VECTOR.
176 *
177 * The info consists of the following items for each vector:
178 *
179 * name (identifier): name of the vector; used to build labels
180 * unit (expression): unit number to call the device driver with
181 * irq_num (number): number of the IRQ to handled (0-15)
182 * id_num (number): uniq numeric id for handler (assigned by config)
183 * mask (blank-ident): priority mask used
184 * handler (blank-ident): interrupt handler to call
185 * icu_num (number): (1 + irq_num / 8) converted for label building
186 * icu_enables (number): 1 for icu_num == 1, 1_AND_2 for icu_num == 2
187 * reg (blank-ident): al for icu_num == 1, ah for icu_num == 2
188 *
189 * 'irq_num' is converted in several ways at config time to get around
190 * limitations in cpp. The macros have blanks after commas iff they would
191 * not mess up identifiers and numbers.
192 */
193
194#undef BUILD_FAST_VECTOR
195#define BUILD_FAST_VECTOR(name, unit, irq_num, id_num, mask, handler, \
196 icu_num, icu_enables, reg) \
197 .globl handler ; \
198 .text ; \
199 .globl _V/**/name ; \
200 SUPERALIGN_TEXT ; \
201_V/**/name: ; \
202 FAST_INTR(unit, irq_num, id_num, handler, ENABLE_ICU/**/icu_enables)
203
204#undef BUILD_VECTOR
205#define BUILD_VECTOR(name, unit, irq_num, id_num, mask, handler, \
206 icu_num, icu_enables, reg) \
207 .globl handler ; \
208 .text ; \
209 .globl _V/**/name ; \
210 SUPERALIGN_TEXT ; \
211_V/**/name: ; \
212 INTR(unit,irq_num,id_num, mask, handler, IO_ICU/**/icu_num, \
213 ENABLE_ICU/**/icu_enables, reg,)
214
215 BUILD_VECTORS
216
217 /* hardware interrupt catcher (IDT 32 - 47) */
218 .globl _isa_strayintr
219
220#define STRAYINTR(irq_num, icu_num, icu_enables, reg) \
221IDTVEC(intr/**/irq_num) ; \
222 INTR(irq_num,irq_num,irq_num, _highmask, _isa_strayintr, \
223 IO_ICU/**/icu_num, ENABLE_ICU/**/icu_enables, reg,stray)
224
225/*
226 * XXX - the mask (1 << 2) == IRQ_SLAVE will be generated for IRQ 2, instead
227 * of the mask IRQ2 (defined as IRQ9 == (1 << 9)). But IRQ 2 "can't happen".
228 * In fact, all stray interrupts "can't happen" except for bugs. The
229 * "stray" IRQ 7 is documented behaviour of the 8259. It happens when there
230 * is a glitch on any of its interrupt inputs. Does it really interrupt when
231 * IRQ 7 is masked?
232 *
233 * XXX - unpend doesn't work for these, it sends them to the real handler.
234 *
235 * XXX - the race bug during initialization may be because I changed the
236 * order of switching from the stray to the real interrupt handler to before
237 * enabling interrupts. The old order looked unsafe but maybe it is OK with
238 * the stray interrupt handler installed. But these handlers only reduce
239 * the window of vulnerability - it is still open at the end of
240 * isa_configure().
241 *
242 * XXX - many comments are stale.
243 */
244
245 STRAYINTR(0,1,1, al)
246 STRAYINTR(1,1,1, al)
247 STRAYINTR(2,1,1, al)
248 STRAYINTR(3,1,1, al)
249 STRAYINTR(4,1,1, al)
250 STRAYINTR(5,1,1, al)
251 STRAYINTR(6,1,1, al)
252 STRAYINTR(8,2,1_AND_2, ah)
253 STRAYINTR(9,2,1_AND_2, ah)
254 STRAYINTR(10,2,1_AND_2, ah)
255 STRAYINTR(11,2,1_AND_2, ah)
256 STRAYINTR(12,2,1_AND_2, ah)
257 STRAYINTR(13,2,1_AND_2, ah)
258 STRAYINTR(14,2,1_AND_2, ah)
259 STRAYINTR(15,2,1_AND_2, ah)
260IDTVEC(intrdefault)
261 STRAYINTR(7,1,1, al) /* XXX */
262#if 0
263 INTRSTRAY(255, _highmask, 255) ; call _isa_strayintr ; INTREXIT2
264#endif
265/*
266 * These are the interrupt counters, I moved them here from icu.s so that
267 * they are with the name table. rgrimes
268 *
269 * There are now lots of counters, this has been redone to work with
270 * Bruce Evans intr-0.1 code, which I modified some more to make it all
271 * work with vmstat.
272 */
273 .data
274Vresume: .space 16 * 4 /* where to resume intr handler after unpend */
275 .globl _intrcnt
276_intrcnt: /* used by vmstat to calc size of table */
277 .globl _intrcnt_bad7
278_intrcnt_bad7: .space 4 /* glitches on irq 7 */
279 .globl _intrcnt_bad15
280_intrcnt_bad15: .space 4 /* glitches on irq 15 */
281 .globl _intrcnt_stray
282_intrcnt_stray: .space 4 /* total count of stray interrupts */
283 .globl _intrcnt_actv
284_intrcnt_actv: .space NR_REAL_INT_HANDLERS * 4 /* active interrupts */
285 .globl _intrcnt_pend
286_intrcnt_pend: .space NR_REAL_INT_HANDLERS * 4 /* pending interrupts */
287 .globl _intrcnt_spl
288_intrcnt_spl: .space 32 * 4 /* XXX 32 should not be hard coded ? */
289 .globl _intrcnt_show
290_intrcnt_show: .space 8 * 4 /* XXX 16 should not be hard coded ? */
291 .globl _eintrcnt
292_eintrcnt: /* used by vmstat to calc size of table */
293
294/*
295 * Build the interrupt name table for vmstat
296 */
297
298#undef BUILD_FAST_VECTOR
299#define BUILD_FAST_VECTOR BUILD_VECTOR
300
301#undef BUILD_VECTOR
302#define BUILD_VECTOR(name, unit, irq_num, id_num, mask, handler, \
303 icu_num, icu_enables, reg) \
304 .ascii "name irq" ; \
305 .asciz "irq_num"
306/*
307 * XXX - use the STRING and CONCAT macros from <sys/cdefs.h> to stringize
308 * and concatenate names above and elsewhere.
309 */
310
311 .text
312 .globl _intrnames, _eintrnames
313_intrnames:
314 BUILD_VECTOR(bad,,7,,,,,,)
315 BUILD_VECTOR(bad,,15,,,,,,)
316 BUILD_VECTOR(stray,,,,,,,,)
317 BUILD_VECTORS
318
319#undef BUILD_FAST_VECTOR
320#define BUILD_FAST_VECTOR BUILD_VECTOR
321
322#undef BUILD_VECTOR
323#define BUILD_VECTOR(name, unit, irq_num, id_num, mask, handler, \
324 icu_num, icu_enables, reg) \
325 .asciz "name pend"
326
327 BUILD_VECTORS
328
329/*
330 * now the spl names
331 */
332 .asciz "unpend_v"
333 .asciz "doreti"
334 .asciz "p0!ni"
335 .asciz "!p0!ni"
336 .asciz "p0ni"
337 .asciz "netisr_raw"
338 .asciz "netisr_ip"
339 .asciz "netisr_imp"
340 .asciz "netisr_ns"
341 .asciz "softclock"
342 .asciz "trap"
343 .asciz "doreti_exit2"
344 .asciz "splbio"
345 .asciz "splclock"
346 .asciz "splhigh"
347 .asciz "splimp"
348 .asciz "splnet"
349 .asciz "splsoftclock"
350 .asciz "spltty"
351 .asciz "spl0"
352 .asciz "netisr_raw2"
353 .asciz "netisr_ip2"
354 .asciz "splx"
355 .asciz "splx!0"
356 .asciz "unpend_V"
357 .asciz "spl25" /* spl25-spl31 are spares */
358 .asciz "spl26"
359 .asciz "spl27"
360 .asciz "spl28"
361 .asciz "spl29"
362 .asciz "spl30"
363 .asciz "spl31"
364/*
365 * now the mask names
366 */
367 .asciz "cli"
368 .asciz "cpl"
369 .asciz "imen"
370 .asciz "ipending"
371 .asciz "sti"
372 .asciz "mask5" /* mask5-mask7 are spares */
373 .asciz "mask6"
374 .asciz "mask7"
375
376_eintrnames:
Continuous source code history from original PDP-7 UNIX to FreeBSD 2, the first fully unencumbered FreeBSD release.