[unix-history] / usr / src / sys / vax / mba / mbavar.h

/*	mbavar.h	4.12	81/03/03	*/

/*
 * VAX Massbus adapter registers
 */

struct mba_regs
{
	int	mba_csr;		/* configuration register */
	int	mba_cr;			/* control register */
	int	mba_sr;			/* status register */
	int	mba_var;		/* virtual address register */
	int	mba_bcr;		/* byte count register */
	int	mba_dr;
	int	mba_pad1[250];
	struct mba_drv {		/* per drive registers */
		int	mbd_cs1;		/* control status */
		int	mbd_ds;			/* drive status */
		int	mbd_er1;		/* error register */
		int	mbd_mr1;		/* maintenance register */
		int	mbd_as;			/* attention status */
		int	mbd_da;			/* desired address (disks) */
#define	mbd_fc	mbd_da				/* frame count (tapes) */
		int	mbd_dt;			/* drive type */
		int	mbd_la;			/* look ahead (disks) */
#define	mbd_ck	mbd_la				/* ??? (tapes) */
		int	mbd_sn;			/* serial number */
		int	mbd_of;			/* ??? */
#define	mbd_tc	mbd_of				/* ??? */
		int	mbd_fill[22];
	} mba_drv[8];
	struct	pte mba_map[256];	/* io space virtual map */
	int	mba_pad2[256*5];	/* to size of a nexus */
};

/*
 * Bits in mba_cr
 */
#define	MBAINIT		0x1		/* init mba */
#define	MBAIE		0x4		/* enable mba interrupts */

/*
 * Bits in mba_sr
 */
#define	MBS_DTBUSY	0x80000000	/* data transfer busy */
#define	MBS_NRCONF	0x40000000	/* no response confirmation */
#define	MBS_CRD		0x20000000	/* corrected read data */
#define	MBS_CBHUNG	0x00800000	/* control bus hung */
#define	MBS_PGE		0x00080000	/* programming error */
#define	MBS_NED		0x00040000	/* non-existant drive */
#define	MBS_MCPE	0x00020000	/* massbus control parity error */
#define	MBS_ATTN	0x00010000	/* attention from massbus */
#define	MBS_SPE		0x00004000	/* silo parity error */
#define	MBS_DTCMP	0x00002000	/* data transfer completed */
#define	MBS_DTABT	0x00001000	/* data transfer aborted */
#define	MBS_DLT		0x00000800	/* data late */
#define	MBS_WCKUP	0x00000400	/* write check upper */
#define	MBS_WCKLWR	0x00000200	/* write check lower */
#define	MBS_MXF		0x00000100	/* miss transfer error */
#define	MBS_MBEXC	0x00000080	/* massbus exception */
#define	MBS_MDPE	0x00000040	/* massbus data parity error */
#define	MBS_MAPPE	0x00000020	/* page frame map parity error */
#define	MBS_INVMAP	0x00000010	/* invalid map */
#define	MBS_ERRCONF	0x00000008	/* error confirmation */
#define	MBS_RDS		0x00000004	/* read data substitute */
#define	MBS_ISTIMO	0x00000002	/* interface sequence timeout */
#define	MBS_RDTIMO	0x00000001	/* read data timeout */

#define MBASR_BITS \
"\20\40DTBUSY\37NRCONF\36CRD\30CBHUNG\24PGE\23NED\22MCPE\21ATTN\
\17SPE\16DTCMP\15DTABT\14DLT\13WCKUP\12WCKLWR\11MXF\10MBEXC\7MDPE\
\6MAPPE\5INVMAP\4ERRCONF\3RDS\2ISTIMO\1RDTIMO"

#define	MBASR_HARD	(MBS_PGE|MBS_ERRCONF|MBS_ISTIMO|MBS_RDTIMO)

#define MBAEBITS	(~(MBS_DTBUSY|MBS_CRD|MBS_ATTN|MBS_DTCMP))

extern	char	mbasr_bits[];

/*
 * Commands for mbd_cs1
 */
#define	MBD_WCOM	0x30
#define	MBD_RCOM	0x38
#define	MBD_GO		0x1

/*
 * Bits in mbd_ds.
 */
#define	MBD_DRY		0x80		/* drive ready */
#define	MBD_MOL		0x1000		/* medium on line */
#define	MBD_DPR		0x100		/* drive present */
#define	MBD_ERR		0x4000		/* error in drive */

/*
 * Bits in mbd_dt
 */
#define	MBDT_NSA	0x8000		/* not sector addressible */
#define	MBDT_TAP	0x4000		/* is a tape */
#define	MBDT_MOH	0x2000		/* moving head */
#define	MBDT_7CH	0x1000		/* 7 channel */
#define	MBDT_DRQ	0x800		/* drive request required */
#define	MBDT_SPR	0x400		/* slave present */

#define	MBDT_TYPE	0x1ff
#define	MBDT_MASK	(MBDT_NSA|MBDT_TAP|MBDT_TYPE)

/* type codes for disk drives */
#define	MBDT_RP04	020
#define	MBDT_RP05	021
#define	MBDT_RP06	022
#define	MBDT_RP07	042
#define	MBDT_RM03	024
#define	MBDT_RM05	027
#define	MBDT_RM80	026

/* type codes for tape drives */
#define	MBDT_TM03	050
#define	MBDT_TE16	051
#define	MBDT_TU45	052
#define	MBDT_TU77	054
#define	MBDT_TU78	0140		/* can't handle these (yet) */

/*
 * Each driver has an array of pointers to these structures, one for
 * each device it is willing to handle.  At bootstrap time, the
 * driver tables are filled in;
 */
struct	mba_info {
	struct	mba_driver *mi_driver;
	short	mi_name;	/* two character generic name */
	short	mi_unit;	/* unit number to the system */
	short	mi_mbanum;	/* the mba it is on */
	short	mi_drive;	/* controller on mba */
	short	mi_slave;	/* slave to controller (TM03/TU16) */
	short	mi_dk;		/* driver number for iostat */
	short	mi_alive;	/* device exists */
	short	mi_type;	/* driver specific unit type */
	struct	buf mi_tab;	/* head of queue for this device */
	struct	mba_info *mi_forw;
/* we could compute these every time, but hereby save time */
	struct	mba_regs *mi_mba;
	struct	mba_drv *mi_drv;
	struct	mba_hd *mi_hd;
};

/*
 * The initialization routine uses the information in the mbinit table
 * to initialize the drive type routines in the drivers and the
 * mbahd array summarizing which devices are hooked to which massbus slots.
 */
struct	mba_hd {
	short	mh_active;
	short	mh_ndrive;
	struct	mba_regs *mh_mba;	/* virt addr of mba */
	struct	mba_regs *mh_physmba;	/* phys addr of mba */
	struct	mba_info *mh_mbip[8];	/* what is attached */
	struct	mba_info *mh_actf;	/* head of queue to transfer */
	struct	mba_info *mh_actl;	/* tail of queue to transfer */
};
/*
 * Values for flags; normally MH_NOSEEK will be set when there is
 * only a single drive on an massbus.
 */
#define	MH_NOSEEK	1
#define	MH_NOSEARCH	2

/*
 * Each massbus driver defines entries for a set of routines
 * as well as an array of types which are acceptable to it.
 */
struct mba_driver {
	int	(*md_dkinit)();		/* setup dk info (mspw) */
	int	(*md_ustart)();		/* unit start routine */
	int	(*md_start)();		/* setup a data transfer */
	int	(*md_dtint)();		/* data transfer complete */
	int	(*md_ndint)();		/* non-data transfer interrupt */
	short	*md_type;		/* array of drive type codes */
	struct	mba_info **md_info;	/* backpointers to mbinit structs */
};

/*
 * Possible return values from unit start routines.
 */
#define	MBU_NEXT	0		/* skip to next operation */
#define	MBU_BUSY	1		/* dual port busy; wait for intr */
#define	MBU_STARTED	2		/* non-data transfer started */
#define	MBU_DODATA	3		/* data transfer ready; start mba */

/*
 * Possible return values from data transfer interrupt handling routines
 */
#define	MBD_DONE	0		/* data transfer complete */
#define	MBD_RETRY	1		/* error occurred, please retry */
#define	MBD_RESTARTED	2		/* driver restarted i/o itself */

/*
 * Possible return values from non-data-transfer interrupt handling routines
 */
#define	MBN_DONE	0		/* non-data transfer complete */
#define	MBN_RETRY	1		/* failed; retry the operation */

/*
 * Clear attention status for specified drive.
 */
#define	mbclrattn(mi)	((mi)->mi_mba->mba_drv[0].mbd_as = 1 << (mi)->mi_drive)

/*
 * Kernel definitions related to mba.
 */
#ifdef KERNEL
#if NMBA > 0
struct	mba_hd mba_hd[NMBA];
extern	Xmba0int(), Xmba1int(), Xmba2int(), Xmba3int();
extern	struct	mba_info mbinit[];	/* blanks for filling mba_info */
int	nummba;
#endif
#endif
Commit	Line	Data
c4a6465b	1	/* mbavar.h 4.12 81/03/03 */
3ed87cd4 BJ	2
	3	/*
	4	* VAX Massbus adapter registers
	5	*/
	6
97fedd9e	7	struct mba_regs
4d9e9e73	8	{
97fedd9e BJ	9	int mba_csr; /* configuration register */
	10	int mba_cr; /* control register */
	11	int mba_sr; /* status register */
	12	int mba_var; /* virtual address register */
	13	int mba_bcr; /* byte count register */
	14	int mba_dr;
	15	int mba_pad1[250];
	16	struct mba_drv { /* per drive registers */
	17	int mbd_cs1; /* control status */
	18	int mbd_ds; /* drive status */
	19	int mbd_er1; /* error register */
	20	int mbd_mr1; /* maintenance register */
	21	int mbd_as; /* attention status */
	22	int mbd_da; /* desired address (disks) */
	23	#define mbd_fc mbd_da /* frame count (tapes) */
	24	int mbd_dt; /* drive type */
	25	int mbd_la; /* look ahead (disks) */
	26	#define mbd_ck mbd_la /* ??? (tapes) */
	27	int mbd_sn; /* serial number */
	28	int mbd_of; /* ??? */
	29	#define mbd_tc mbd_of /* ??? */
	30	int mbd_fill[22];
	31	} mba_drv[8];
	32	struct pte mba_map[256]; /* io space virtual map */
	33	int mba_pad2[2565]; / to size of a nexus */
4d9e9e73	34	};
97fedd9e BJ	35
	36	/*
	37	* Bits in mba_cr
	38	*/
	39	#define MBAINIT 0x1 /* init mba */
	40	#define MBAIE 0x4 /* enable mba interrupts */
	41
4d9e9e73	42	/*
97fedd9e BJ	43	* Bits in mba_sr
	44	*/
	45	#define MBS_DTBUSY 0x80000000 /* data transfer busy */
	46	#define MBS_NRCONF 0x40000000 /* no response confirmation */
	47	#define MBS_CRD 0x20000000 /* corrected read data */
	48	#define MBS_CBHUNG 0x00800000 /* control bus hung */
	49	#define MBS_PGE 0x00080000 /* programming error */
	50	#define MBS_NED 0x00040000 /* non-existant drive */
	51	#define MBS_MCPE 0x00020000 /* massbus control parity error */
	52	#define MBS_ATTN 0x00010000 /* attention from massbus */
	53	#define MBS_SPE 0x00004000 /* silo parity error */
	54	#define MBS_DTCMP 0x00002000 /* data transfer completed */
	55	#define MBS_DTABT 0x00001000 /* data transfer aborted */
	56	#define MBS_DLT 0x00000800 /* data late */
	57	#define MBS_WCKUP 0x00000400 /* write check upper */
	58	#define MBS_WCKLWR 0x00000200 /* write check lower */
	59	#define MBS_MXF 0x00000100 /* miss transfer error */
	60	#define MBS_MBEXC 0x00000080 /* massbus exception */
	61	#define MBS_MDPE 0x00000040 /* massbus data parity error */
	62	#define MBS_MAPPE 0x00000020 /* page frame map parity error */
	63	#define MBS_INVMAP 0x00000010 /* invalid map */
	64	#define MBS_ERRCONF 0x00000008 /* error confirmation */
	65	#define MBS_RDS 0x00000004 /* read data substitute */
	66	#define MBS_ISTIMO 0x00000002 /* interface sequence timeout */
	67	#define MBS_RDTIMO 0x00000001 /* read data timeout */
	68
4656c503 BJ	69	#define MBASR_BITS \
	70	"\20\40DTBUSY\37NRCONF\36CRD\30CBHUNG\24PGE\23NED\22MCPE\21ATTN\
	71	\17SPE\16DTCMP\15DTABT\14DLT\13WCKUP\12WCKLWR\11MXF\10MBEXC\7MDPE\
	72	\6MAPPE\5INVMAP\4ERRCONF\3RDS\2ISTIMO\1RDTIMO"
c4a6465b BJ	73
	74	#define MBASR_HARD (MBS_PGE\|MBS_ERRCONF\|MBS_ISTIMO\|MBS_RDTIMO)
	75
97fedd9e	76	#define MBAEBITS (~(MBS_DTBUSY\|MBS_CRD\|MBS_ATTN\|MBS_DTCMP))
c4a6465b	77
4656c503	78	extern char mbasr_bits[];
97fedd9e BJ	79
	80	/*
	81	* Commands for mbd_cs1
	82	*/
	83	#define MBD_WCOM 0x30
	84	#define MBD_RCOM 0x38
	85	#define MBD_GO 0x1
	86
	87	/*
	88	* Bits in mbd_ds.
	89	*/
	90	#define MBD_DRY 0x80 /* drive ready */
	91	#define MBD_MOL 0x1000 /* medium on line */
	92	#define MBD_DPR 0x100 /* drive present */
	93	#define MBD_ERR 0x4000 /* error in drive */
	94
	95	/*
	96	* Bits in mbd_dt
4d9e9e73 BJ	97	*/
	98	#define MBDT_NSA 0x8000 /* not sector addressible */
	99	#define MBDT_TAP 0x4000 /* is a tape */
	100	#define MBDT_MOH 0x2000 /* moving head */
	101	#define MBDT_7CH 0x1000 /* 7 channel */
	102	#define MBDT_DRQ 0x800 /* drive request required */
	103	#define MBDT_SPR 0x400 /* slave present */
	104
	105	#define MBDT_TYPE 0x1ff
	106	#define MBDT_MASK (MBDT_NSA\|MBDT_TAP\|MBDT_TYPE)
	107
97fedd9e	108	/* type codes for disk drives */
4d9e9e73 BJ	109	#define MBDT_RP04 020
	110	#define MBDT_RP05 021
	111	#define MBDT_RP06 022
	112	#define MBDT_RP07 042
	113	#define MBDT_RM03 024
	114	#define MBDT_RM05 027
	115	#define MBDT_RM80 026
	116
97fedd9e	117	/* type codes for tape drives */
4d9e9e73 BJ	118	#define MBDT_TM03 050
	119	#define MBDT_TE16 051
	120	#define MBDT_TU45 052
	121	#define MBDT_TU77 054
97fedd9e	122	#define MBDT_TU78 0140 /* can't handle these (yet) */
4d9e9e73 BJ	123
4d9e9e73 BJ	124	/*
97fedd9e BJ	125	* Each driver has an array of pointers to these structures, one for
	126	* each device it is willing to handle. At bootstrap time, the
	127	* driver tables are filled in;
4d9e9e73	128	*/
97fedd9e BJ	129	struct mba_info {
	130	struct mba_driver *mi_driver;
	131	short mi_name; /* two character generic name */
	132	short mi_unit; /* unit number to the system */
	133	short mi_mbanum; /* the mba it is on */
	134	short mi_drive; /* controller on mba */
	135	short mi_slave; /* slave to controller (TM03/TU16) */
6a2942e9	136	short mi_dk; /* driver number for iostat */
97fedd9e BJ	137	short mi_alive; /* device exists */
97fedd9e BJ	138	short mi_type; /* driver specific unit type */
97fedd9e BJ	139	struct buf mi_tab; /* head of queue for this device */
	140	struct mba_info *mi_forw;
	141	/* we could compute these every time, but hereby save time */
	142	struct mba_regs *mi_mba;
	143	struct mba_drv *mi_drv;
	144	struct mba_hd *mi_hd;
3ed87cd4 BJ	145	};
3ed87cd4 BJ	146
97fedd9e BJ	147	/*
	148	* The initialization routine uses the information in the mbinit table
	149	* to initialize the drive type routines in the drivers and the
	150	* mbahd array summarizing which devices are hooked to which massbus slots.
	151	*/
	152	struct mba_hd {
	153	short mh_active;
bbe0bf68	154	short mh_ndrive;
97fedd9e BJ	155	struct mba_regs mh_mba; / virt addr of mba */
	156	struct mba_regs mh_physmba; / phys addr of mba */
	157	struct mba_info mh_mbip[8]; / what is attached */
	158	struct mba_info mh_actf; / head of queue to transfer */
	159	struct mba_info mh_actl; / tail of queue to transfer */
9feb5e5d	160	};
97fedd9e BJ	161	/*
	162	* Values for flags; normally MH_NOSEEK will be set when there is
	163	* only a single drive on an massbus.
	164	*/
	165	#define MH_NOSEEK 1
	166	#define MH_NOSEARCH 2
3ed87cd4	167
97fedd9e BJ	168	/*
	169	* Each massbus driver defines entries for a set of routines
	170	* as well as an array of types which are acceptable to it.
	171	*/
	172	struct mba_driver {
	173	int (md_dkinit)(); / setup dk info (mspw) */
	174	int (md_ustart)(); / unit start routine */
	175	int (md_start)(); / setup a data transfer */
	176	int (md_dtint)(); / data transfer complete */
	177	int (md_ndint)(); / non-data transfer interrupt */
	178	short md_type; / array of drive type codes */
	179	struct mba_info *md_info; / backpointers to mbinit structs */
	180	};
3ed87cd4	181
97fedd9e BJ	182	/*
	183	* Possible return values from unit start routines.
	184	*/
	185	#define MBU_NEXT 0 /* skip to next operation */
	186	#define MBU_BUSY 1 /* dual port busy; wait for intr */
	187	#define MBU_STARTED 2 /* non-data transfer started */
	188	#define MBU_DODATA 3 /* data transfer ready; start mba */
3ed87cd4	189
97fedd9e BJ	190	/*
	191	* Possible return values from data transfer interrupt handling routines
	192	*/
	193	#define MBD_DONE 0 /* data transfer complete */
	194	#define MBD_RETRY 1 /* error occurred, please retry */
	195	#define MBD_RESTARTED 2 /* driver restarted i/o itself */
3ed87cd4	196
97fedd9e BJ	197	/*
	198	* Possible return values from non-data-transfer interrupt handling routines
	199	*/
	200	#define MBN_DONE 0 /* non-data transfer complete */
	201	#define MBN_RETRY 1 /* failed; retry the operation */
d75b699b	202
97fedd9e BJ	203	/*
	204	* Clear attention status for specified drive.
	205	*/
	206	#define mbclrattn(mi) ((mi)->mi_mba->mba_drv[0].mbd_as = 1 << (mi)->mi_drive)
6a2942e9 BJ	207
	208	/*
	209	* Kernel definitions related to mba.
	210	*/
	211	#ifdef KERNEL
b9b45ab9	212	#if NMBA > 0
9feb5e5d	213	struct mba_hd mba_hd[NMBA];
6a2942e9 BJ	214	extern Xmba0int(), Xmba1int(), Xmba2int(), Xmba3int();
	215	extern struct mba_info mbinit[]; /* blanks for filling mba_info */
	216	int nummba;
	217	#endif
b9b45ab9	218	#endif