Commit | Line | Data |
---|---|---|
cc34e2e1 DR |
1 | # |
2 | /* | |
3 | * Copyright 1973 Bell Telephone Laboratories Inc | |
4 | */ | |
5 | ||
6 | /* | |
7 | * GP DR11C driver used for C/A/T | |
8 | */ | |
9 | ||
10 | #include "../param.h" | |
11 | #include "../user.h" | |
12 | #include "../tty.h" | |
13 | ||
14 | #define CATADDR 0167750 | |
15 | #define PCAT 9 | |
16 | #define CATHIWAT 60 | |
17 | #define CATLOWAT 15 | |
18 | ||
19 | struct { | |
20 | int catlock; | |
21 | struct clist oq; | |
22 | } cat; | |
23 | ||
24 | struct { | |
25 | int catcsr; | |
26 | int catbuf; | |
27 | }; | |
28 | ||
29 | ctopen(dev) | |
30 | { | |
31 | if (cat.catlock==0) { | |
32 | cat.catlock++; | |
33 | CATADDR->catcsr =| IENABLE; | |
34 | } else | |
35 | u.u_error = ENXIO; | |
36 | } | |
37 | ||
38 | ctclose() | |
39 | { | |
40 | cat.catlock = 0; | |
41 | } | |
42 | ||
43 | ctwrite(dev) | |
44 | { | |
45 | register c; | |
46 | extern lbolt; | |
47 | ||
48 | while ((c=cpass()) >= 0) { | |
49 | spl5(); | |
50 | while (cat.oq.c_cc > CATHIWAT) | |
51 | sleep(&cat.oq, PCAT); | |
52 | while (putc(c, &cat.oq) < 0) | |
53 | sleep(&lbolt, PCAT); | |
54 | catintr(); | |
55 | spl0(); | |
56 | } | |
57 | } | |
58 | ||
59 | catintr() | |
60 | { | |
61 | register int c; | |
62 | ||
63 | if (CATADDR->catcsr&DONE && (c=getc(&cat.oq))>=0) { | |
64 | CATADDR->catbuf = c; | |
65 | if (cat.oq.c_cc==0 || cat.oq.c_cc==CATLOWAT) | |
66 | wakeup(&cat.oq); | |
67 | } else { | |
68 | if (cat.catlock==0) | |
69 | CATADDR->catcsr = 0; | |
70 | } | |
71 | } |