Commit | Line | Data |
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38b9bcf4 DR |
1 | # |
2 | /* | |
3 | * Copyright 1973 Bell Telephone Laboratories Inc | |
4 | */ | |
5 | ||
6 | /* | |
7 | * DH-11 driver | |
8 | * This driver calls on the DHDM driver. | |
9 | * If the DH has no DM11-BB, then this driver will | |
10 | * be fake. To insure loading of the correct DM code, | |
11 | * lib2 should have dhdm.o dh.o and dhfdm.o in that order. | |
12 | */ | |
13 | ||
14 | #include "../param.h" | |
15 | #include "../conf.h" | |
16 | #include "../user.h" | |
17 | #include "../tty.h" | |
18 | #include "../proc.h" | |
19 | ||
20 | #define DHADDR 0160020 | |
21 | #define NDH11 16 | |
22 | ||
23 | struct tty dh11[NDH11]; | |
24 | int ndh11 NDH11; | |
25 | ||
26 | #define BITS6 01 | |
27 | #define BITS7 02 | |
28 | #define BITS8 03 | |
29 | #define TWOSB 04 | |
30 | #define PENABLE 020 | |
31 | #define OPAR 040 /* beware DEC manuals */ | |
32 | #define HDUPLX 040000 | |
33 | ||
34 | #define IENABLE 030100 | |
35 | #define PERROR 010000 | |
36 | #define FRERROR 020000 | |
37 | #define SSPEED 7 /* standard speed: 300 baud */ | |
38 | ||
39 | #define PS 0177776 | |
40 | ||
41 | int dhsar; | |
42 | struct dhregs { | |
43 | int dhcsr; | |
44 | int dhnxch; | |
45 | int dhlpr; | |
46 | int dhcar; | |
47 | int dhbcr; | |
48 | int dhbar; | |
49 | int dhbreak; | |
50 | int dhsilo; | |
51 | }; | |
52 | ||
53 | dhopen(dev, flag) | |
54 | { | |
55 | register struct tty *tp; | |
56 | extern dhstart(); | |
57 | ||
58 | if (dev.d_minor >= NDH11) { | |
59 | u.u_error = ENXIO; | |
60 | return; | |
61 | } | |
62 | tp = &dh11[dev.d_minor]; | |
63 | tp->t_addr = dhstart; | |
64 | DHADDR->dhcsr =| IENABLE; | |
65 | tp->t_state =| WOPEN|SSTART; | |
66 | if ((tp->t_state&ISOPEN) == 0) { | |
67 | tp->t_erase = CERASE; | |
68 | tp->t_kill = CKILL; | |
69 | tp->t_speeds = SSPEED | (SSPEED<<8); | |
70 | tp->t_flags = ODDP|EVENP|ECHO; | |
71 | dhparam(tp); | |
72 | } | |
73 | dmopen(dev); | |
74 | tp->t_state =& ~WOPEN; | |
75 | tp->t_state =| ISOPEN; | |
76 | if (u.u_procp->p_ttyp == 0) | |
77 | u.u_procp->p_ttyp = tp; | |
78 | } | |
79 | ||
80 | dhclose(dev) | |
81 | { | |
82 | register struct tty *tp; | |
83 | ||
84 | tp = &dh11[dev.d_minor]; | |
85 | dmclose(dev); | |
86 | tp->t_state =& (CARR_ON|SSTART); | |
87 | wflushtty(tp); | |
88 | } | |
89 | ||
90 | dhread(dev) | |
91 | { | |
92 | register struct tty *tp; | |
93 | ||
94 | tp = &dh11[dev.d_minor]; | |
95 | if ((tp->t_state&CARR_ON) != 0) | |
96 | ttread(tp); | |
97 | } | |
98 | ||
99 | dhwrite(dev) | |
100 | { | |
101 | register struct tty *tp; | |
102 | ||
103 | tp = &dh11[dev.d_minor]; | |
104 | if ((tp->t_state&CARR_ON) != 0) | |
105 | ttwrite(tp); | |
106 | } | |
107 | ||
108 | dhrint() | |
109 | { | |
110 | register struct tty *tp; | |
111 | register int c; | |
112 | ||
113 | while ((c = DHADDR->dhnxch) < 0) { /* char. present */ | |
114 | tp = &dh11[(c>>8)&017]; | |
115 | if (tp >= &dh11[NDH11]) | |
116 | continue; | |
117 | if((tp->t_state&ISOPEN)==0 || (c&PERROR)) { | |
118 | wakeup(tp); | |
119 | continue; | |
120 | } | |
121 | if (c&FRERROR) /* break */ | |
122 | if (tp->t_flags&RAW) | |
123 | c = 0; /* null (for getty) */ | |
124 | else | |
125 | c = 0177; /* DEL (intr) */ | |
126 | ttyinput(c, tp); | |
127 | } | |
128 | } | |
129 | ||
130 | dhsgtty(dev, av) | |
131 | int *av; | |
132 | { | |
133 | register struct tty *tp; | |
134 | register r; | |
135 | ||
136 | tp = &dh11[dev.d_minor]; | |
137 | if (ttystty(tp, av)) | |
138 | return; | |
139 | dhparam(tp); | |
140 | } | |
141 | ||
142 | dhparam(atp) | |
143 | struct tty *atp; | |
144 | { | |
145 | register struct tty *tp; | |
146 | register int lpr; | |
147 | ||
148 | tp = atp; | |
149 | spl5(); | |
150 | DHADDR->dhcsr.lobyte = (tp - dh11) | IENABLE; | |
151 | lpr = (tp->t_speeds.hibyte<<10) | (tp->t_speeds.lobyte<<6); | |
152 | if (tp->t_speeds.lobyte == 4) /* 134.5 baud */ | |
153 | lpr =| BITS6|PENABLE|HDUPLX; else | |
154 | if (tp->t_flags&EVENP) | |
155 | if (tp->t_flags&ODDP) | |
156 | lpr =| BITS8; else | |
157 | lpr =| BITS7|PENABLE; else | |
158 | lpr =| BITS7|OPAR|PENABLE; | |
159 | if (tp->t_speeds.lobyte == 3) /* 110 baud */ | |
160 | lpr =| TWOSB; | |
161 | DHADDR->dhlpr = lpr; | |
162 | spl0(); | |
163 | } | |
164 | ||
165 | dhxint() | |
166 | { | |
167 | register struct tty *tp; | |
168 | register ttybit, bar; | |
169 | ||
170 | bar = DHADDR->dhbar; | |
171 | DHADDR->dhcsr =& ~0101060; | |
172 | bar = (bar|dhsar)^bar; | |
173 | ttybit = 1; | |
174 | for (tp = dh11; tp < &dh11[NDH11]; tp++) { | |
175 | if(bar&ttybit) { | |
176 | dhsar =& ~ttybit; | |
177 | tp->t_state =& ~BUSY; | |
178 | dhstart(tp); | |
179 | } | |
180 | ttybit =<< 1; | |
181 | } | |
182 | } | |
183 | ||
184 | dhstart(atp) | |
185 | struct tty *atp; | |
186 | { | |
187 | extern ttrstrt(); | |
188 | register lineno, c; | |
189 | register struct tty *tp; | |
190 | int sps; | |
191 | struct { int int; }; | |
192 | ||
193 | sps = PS->int; | |
194 | spl5(); | |
195 | tp = atp; | |
196 | if (tp->t_state&(TIMEOUT|BUSY) || (tp->t_outq.c_cc==0)) | |
197 | return; | |
198 | if ((c = getc(&tp->t_outq))<=0177) { | |
199 | tp->t_char = c; | |
200 | lineno = tp-dh11; | |
201 | DHADDR->dhcsr.lobyte = lineno | IENABLE; | |
202 | DHADDR->dhcar = &tp->t_char; | |
203 | DHADDR->dhbcr = -1; | |
204 | lineno = 1<<lineno; | |
205 | DHADDR->dhbar =| lineno; | |
206 | dhsar =| lineno; | |
207 | tp->t_state =| BUSY; | |
208 | } else { | |
209 | timeout(ttrstrt, tp, (c&0177)+6); | |
210 | tp->t_state =| TIMEOUT; | |
211 | } | |
212 | if (tp->t_outq.c_cc == 0 || tp->t_outq.c_cc == TTLOWAT) | |
213 | wakeup(&tp->t_outq); | |
214 | PS->int = sps; | |
215 | } |